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authorFlorian Fainelli <florian@openwrt.org>2009-06-27 15:51:27 +0000
committerFlorian Fainelli <florian@openwrt.org>2009-06-27 15:51:27 +0000
commitb89b571a5ae7bf38c9fa7a4fb6408cecabd31a71 (patch)
tree1d4291c72bdd87ecb4e707461d9e009424f02f7c /target/linux/brcm63xx
parent2cc8e734a94c5df77dd1f9ec8db35ffedb6a099c (diff)
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[brcm63xx] more missing register definitions for bcm6338
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@16579 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/brcm63xx')
-rw-r--r--target/linux/brcm63xx/files/arch/mips/bcm63xx/cpu.c14
-rw-r--r--target/linux/brcm63xx/files/include/asm-mips/mach-bcm63xx/bcm63xx_cpu.h47
2 files changed, 52 insertions, 9 deletions
diff --git a/target/linux/brcm63xx/files/arch/mips/bcm63xx/cpu.c b/target/linux/brcm63xx/files/arch/mips/bcm63xx/cpu.c
index 3e27671a8c..2b1a9b46da 100644
--- a/target/linux/brcm63xx/files/arch/mips/bcm63xx/cpu.c
+++ b/target/linux/brcm63xx/files/arch/mips/bcm63xx/cpu.c
@@ -38,12 +38,22 @@ static const unsigned long bcm96338_regs_base[] = {
[RSET_PERF] = BCM_6338_PERF_BASE,
[RSET_TIMER] = BCM_6338_TIMER_BASE,
[RSET_WDT] = BCM_6338_WDT_BASE,
- [RSET_UDC0] = BCM_6338_UDC0_BASE,
[RSET_UART0] = BCM_6338_UART0_BASE,
[RSET_GPIO] = BCM_6338_GPIO_BASE,
- [RSET_SDRAM] = BCM_6338_SDRAM_BASE,
[RSET_SPI] = BCM_6338_SPI_BASE,
+ [RSET_OHCI0] = BCM_6338_OHCI0_BASE,
+ [RSET_OHCI_PRIV] = BCM_6338_OHCI_PRIV_BASE,
+ [RSET_USBH_PRIV] = BCM_6338_USBH_PRIV_BASE,
+ [RSET_UDC0] = BCM_6338_UDC0_BASE,
+ [RSET_MPI] = BCM_6338_MPI_BASE,
+ [RSET_PCMCIA] = BCM_6338_PCMCIA_BASE,
+ [RSET_SDRAM] = BCM_6338_SDRAM_BASE,
+ [RSET_DSL] = BCM_6338_DSL_BASE,
+ [RSET_ENET0] = BCM_6338_ENET0_BASE,
+ [RSET_ENET1] = BCM_6338_ENET1_BASE,
+ [RSET_ENETDMA] = BCM_6338_ENETDMA_BASE,
[RSET_MEMC] = BCM_6338_MEMC_BASE,
+ [RSET_DDR] = BCM_6338_DDR_BASE,
};
static const int bcm96338_irqs[] = {
diff --git a/target/linux/brcm63xx/files/include/asm-mips/mach-bcm63xx/bcm63xx_cpu.h b/target/linux/brcm63xx/files/include/asm-mips/mach-bcm63xx/bcm63xx_cpu.h
index 9bce14440e..6209f47bcc 100644
--- a/target/linux/brcm63xx/files/include/asm-mips/mach-bcm63xx/bcm63xx_cpu.h
+++ b/target/linux/brcm63xx/files/include/asm-mips/mach-bcm63xx/bcm63xx_cpu.h
@@ -123,21 +123,30 @@ enum bcm63xx_regs_set {
#define BCM_6338_DSL_LMEM_BASE (0xfff00000)
#define BCM_6338_PERF_BASE (0xfffe0000)
-#define BCM_6338_BB_BASE (0xfffe0100) /* bus bridge registers */
+#define BCM_6338_BB_BASE (0xdeadbeef)
#define BCM_6338_TIMER_BASE (0xfffe0200)
#define BCM_6338_WDT_BASE (0xfffe021c)
#define BCM_6338_UART0_BASE (0xfffe0300)
#define BCM_6338_GPIO_BASE (0xfffe0400)
#define BCM_6338_SPI_BASE (0xfffe0c00)
+#define BCM_6338_UDC0_BASE (0xdeadbeef)
+#define BCM_6338_USBDMA_BASE (0xfffe2400)
+#define BCM_6338_OHCI0_BASE (0xdeadbeef)
+#define BCM_6338_OHCI_PRIV_BASE (0xdeadbeef)
+#define BCM_6338_USBH_PRIV_BASE (0xdeadbeef)
+#define BCM_6338_MPI_BASE (0xdeadbeef)
+#define BCM_6338_PCMCIA_BASE (0xdeadbeef)
+#define BCM_6338_SDRAM_REGS_BASE (0xfffe3100)
#define BCM_6338_DSL_BASE (0xfffe1000)
#define BCM_6338_SAR_BASE (0xfffe2000)
-#define BCM_6338_ENETDMA_BASE (0xfffe2400)
-#define BCM_6338_USBDMA_BASE (0xfffe2400)
+#define BCM_6338_UBUS_BASE (0xdeadbeef)
#define BCM_6338_ENET0_BASE (0xfffe2800)
-#define BCM_6338_UDC0_BASE (0xfffe3000) /* USB_CTL_BASE */
-#define BCM_6338_SDRAM_REGS_BASE (0xfffe3100)
+#define BCM_6338_ENET1_BASE (0xdeadbeef)
+#define BCM_6338_ENETDMA_BASE (0xfffe3800)
+#define BCM_6338_EHCI0_BASE (0xdeadbeef)
#define BCM_6338_SDRAM_BASE (0xfffe3100)
#define BCM_6338_MEMC_BASE (0xdeadbeef)
+#define BCM_6338_DDR_BASE (0xdeadbeef)
/*
* 6345 register sets base address
@@ -228,10 +237,34 @@ static inline unsigned long bcm63xx_regset_address(enum bcm63xx_regs_set set)
return BCM_6338_GPIO_BASE;
case RSET_SPI:
return BCM_6338_SPI_BASE;
- case RSET_MEMC:
- return BCM_6338_MEMC_BASE;
+ case RSET_UDC0:
+ return BCM_6338_UDC0_BASE;
+ case RSET_OHCI0:
+ return BCM_6338_OHCI0_BASE;
+ case RSET_OHCI_PRIV:
+ return BCM_6338_OHCI_PRIV_BASE;
+ case RSET_USBH_PRIV:
+ return BCM_6338_USBH_PRIV_BASE;
+ case RSET_MPI:
+ return BCM_6338_MPI_BASE;
+ case RSET_PCMCIA:
+ return BCM_6338_PCMCIA_BASE;
+ case RSET_DSL:
+ return BCM_6338_DSL_BASE;
+ case RSET_ENET0:
+ return BCM_6338_ENET0_BASE;
+ case RSET_ENET1:
+ return BCM_6338_ENET1_BASE;
+ case RSET_ENETDMA:
+ return BCM_6338_ENETDMA_BASE;
+ case RSET_EHCI0:
+ return BCM_6338_EHCI0_BASE;
case RSET_SDRAM:
return BCM_6338_SDRAM_BASE;
+ case RSET_MEMC:
+ return BCM_6338_MEMC_BASE;
+ case RSET_DDR:
+ return BCM_6338_DDR_BASE;
}
#endif
#ifdef CONFIG_BCM63XX_CPU_6345