diff options
author | Jonas Gorski <jonas.gorski@gmail.com> | 2017-02-07 12:31:02 +0100 |
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committer | Jonas Gorski <jonas.gorski@gmail.com> | 2017-06-04 11:33:43 +0200 |
commit | b50fd8c2b3abdd557bd7d2bb5628f03b20801350 (patch) | |
tree | a4f71f0f10c0c3b2c2f0a5000f695bfd699ca5d8 /target/linux/brcm63xx/patches-4.4/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch | |
parent | 2a2b16210bbc8c5881286d2ff742f3bdf1a7fd9c (diff) | |
download | upstream-b50fd8c2b3abdd557bd7d2bb5628f03b20801350.tar.gz upstream-b50fd8c2b3abdd557bd7d2bb5628f03b20801350.tar.bz2 upstream-b50fd8c2b3abdd557bd7d2bb5628f03b20801350.zip |
brcm63xx: register SPI controllers through DT
Register SPI controllers through device tree. We will wire up the clocks
at a later stage.
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Diffstat (limited to 'target/linux/brcm63xx/patches-4.4/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch')
-rw-r--r-- | target/linux/brcm63xx/patches-4.4/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch | 67 |
1 files changed, 54 insertions, 13 deletions
diff --git a/target/linux/brcm63xx/patches-4.4/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch b/target/linux/brcm63xx/patches-4.4/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch index 1b844fd7d5..9dfa834b20 100644 --- a/target/linux/brcm63xx/patches-4.4/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch +++ b/target/linux/brcm63xx/patches-4.4/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch @@ -11,10 +11,11 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> --- a/arch/mips/bcm63xx/dev-flash.c +++ b/arch/mips/bcm63xx/dev-flash.c -@@ -17,9 +17,12 @@ +@@ -17,9 +17,13 @@ #include <linux/mtd/partitions.h> #include <linux/mtd/physmap.h> #include <linux/mtd/spi-nor.h> ++#include <linux/of.h> +#include <linux/spi/spi.h> +#include <linux/spi/flash.h> @@ -24,7 +25,7 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> #include <bcm63xx_regs.h> #include <bcm63xx_io.h> -@@ -66,6 +69,21 @@ void __init bcm63xx_flash_force_phys_bas +@@ -66,6 +70,46 @@ void __init bcm63xx_flash_force_phys_bas mtd_resources[0].end = end; } @@ -43,10 +44,35 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> + }, +}; + ++static void bcm63xx_of_update_spi_flash_speed(struct device_node *np, ++ unsigned int new_hz) ++{ ++ struct property *max_hz; ++ __be32 *hz; ++ ++ max_hz = kzalloc(sizeof(*max_hz) + sizeof(*hz), GFP_KERNEL); ++ if (!max_hz) ++ return; ++ ++ max_hz->name = kstrdup("spi-max-frequency", GFP_KERNEL); ++ if (!max_hz->name) { ++ kfree(max_hz); ++ return; ++ } ++ ++ max_hz->value = max_hz + 1; ++ max_hz->length = sizeof(*hz); ++ ++ hz = max_hz->value; ++ *hz = cpu_to_be32(new_hz); ++ ++ of_update_property(np, max_hz); ++} ++ static int __init bcm63xx_detect_flash_type(void) { u32 val; -@@ -73,9 +91,15 @@ static int __init bcm63xx_detect_flash_t +@@ -73,9 +117,15 @@ static int __init bcm63xx_detect_flash_t switch (bcm63xx_get_cpu_id()) { case BCM6318_CPU_ID: /* only support serial flash */ @@ -62,7 +88,7 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> if (val & STRAPBUS_6328_BOOT_SEL_SERIAL) return BCM63XX_FLASH_TYPE_SERIAL; else -@@ -94,12 +118,20 @@ static int __init bcm63xx_detect_flash_t +@@ -94,12 +144,20 @@ static int __init bcm63xx_detect_flash_t return BCM63XX_FLASH_TYPE_SERIAL; case BCM6362_CPU_ID: val = bcm_misc_readl(MISC_STRAPBUS_6362_REG); @@ -83,7 +109,7 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> switch (val & STRAPBUS_6368_BOOT_SEL_MASK) { case STRAPBUS_6368_BOOT_SEL_NAND: return BCM63XX_FLASH_TYPE_NAND; -@@ -110,6 +142,11 @@ static int __init bcm63xx_detect_flash_t +@@ -110,6 +168,11 @@ static int __init bcm63xx_detect_flash_t } case BCM63268_CPU_ID: val = bcm_misc_readl(MISC_STRAPBUS_63268_REG); @@ -95,20 +121,35 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> if (val & STRAPBUS_63268_BOOT_SEL_SERIAL) return BCM63XX_FLASH_TYPE_SERIAL; else -@@ -195,8 +232,14 @@ int __init bcm63xx_flash_register(void) +@@ -176,6 +239,7 @@ void __init bcm63xx_flash_detect(void) + + int __init bcm63xx_flash_register(void) + { ++ struct device_node *np; + u32 val; + + switch (flash_type) { +@@ -195,8 +259,21 @@ int __init bcm63xx_flash_register(void) return platform_device_register(&mtd_dev); case BCM63XX_FLASH_TYPE_SERIAL: - pr_warn("unsupported serial flash detected\n"); - return -ENODEV; -+ if (BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6362() || -+ BCMCPU_IS_63268()) { -+ bcm63xx_spi_flash_info[0].bus_num = 1; -+ bcm63xx_spi_flash_info[0].mode = SPI_RX_DUAL; -+ } ++ np = of_find_compatible_node(NULL, NULL, "jedec,spi-nor"); ++ if (np) { ++ bcm63xx_of_update_spi_flash_speed(np, bcm63xx_spi_flash_info[0].max_speed_hz); ++ of_node_put(np); ++ return 0; ++ } else { ++ if (BCMCPU_IS_6318() || BCMCPU_IS_6328() || ++ BCMCPU_IS_6362() || BCMCPU_IS_63268()) { ++ bcm63xx_spi_flash_info[0].bus_num = 1; ++ bcm63xx_spi_flash_info[0].mode = SPI_RX_DUAL; ++ } + -+ return spi_register_board_info(bcm63xx_spi_flash_info, -+ ARRAY_SIZE(bcm63xx_spi_flash_info)); ++ return spi_register_board_info(bcm63xx_spi_flash_info, ++ ARRAY_SIZE(bcm63xx_spi_flash_info)); ++ } case BCM63XX_FLASH_TYPE_NAND: pr_warn("unsupported NAND flash detected\n"); return -ENODEV; |