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| author | Jonas Gorski <jogo@openwrt.org> | 2015-12-02 22:24:46 +0000 |
|---|---|---|
| committer | Jonas Gorski <jogo@openwrt.org> | 2015-12-02 22:24:46 +0000 |
| commit | e395433178224ff1e2a6053105d12936b46c7576 (patch) | |
| tree | 6fd6e2bb8019d78d1b8a57d63516ebbe3cff47f6 /target/linux/brcm63xx/patches-4.4/338-MIPS-BCM63XX-increase-number-of-IRQs.patch | |
| parent | 621677154f39f2e0b698a558b8b795db84a8e014 (diff) | |
| download | upstream-e395433178224ff1e2a6053105d12936b46c7576.tar.gz upstream-e395433178224ff1e2a6053105d12936b46c7576.tar.bz2 upstream-e395433178224ff1e2a6053105d12936b46c7576.zip | |
brcm63xx: add linux 4.4 support
Only netboot tested. Flash at your own risk.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 47702
Diffstat (limited to 'target/linux/brcm63xx/patches-4.4/338-MIPS-BCM63XX-increase-number-of-IRQs.patch')
| -rw-r--r-- | target/linux/brcm63xx/patches-4.4/338-MIPS-BCM63XX-increase-number-of-IRQs.patch | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/target/linux/brcm63xx/patches-4.4/338-MIPS-BCM63XX-increase-number-of-IRQs.patch b/target/linux/brcm63xx/patches-4.4/338-MIPS-BCM63XX-increase-number-of-IRQs.patch new file mode 100644 index 0000000000..9132e42312 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.4/338-MIPS-BCM63XX-increase-number-of-IRQs.patch @@ -0,0 +1,39 @@ +From 6f5658c845cf1f79213b1d20423a04967259fdaa Mon Sep 17 00:00:00 2001 +From: Jonas Gorski <jogo@openwrt.org> +Date: Sun, 15 Dec 2013 20:46:26 +0100 +Subject: [PATCH 48/53] MIPS: BCM63XX: increase number of IRQs + +Newer SoCs have 128 bit wide irq registers, thus 128 available internal +interupts. +--- + arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h | 4 +++- + arch/mips/include/asm/mach-bcm63xx/irq.h | 2 +- + 2 files changed, 4 insertions(+), 2 deletions(-) + +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h +@@ -1,10 +1,12 @@ + #ifndef BCM63XX_IRQ_H_ + #define BCM63XX_IRQ_H_ + ++#include <irq.h> + #include <bcm63xx_cpu.h> + + #define IRQ_INTERNAL_BASE 8 +-#define IRQ_EXTERNAL_BASE 100 ++#define NR_INTERNAL_IRQS 128 ++#define IRQ_EXTERNAL_BASE (IRQ_INTERNAL_BASE + NR_INTERNAL_IRQS) + #define IRQ_EXT_0 (IRQ_EXTERNAL_BASE + 0) + #define IRQ_EXT_1 (IRQ_EXTERNAL_BASE + 1) + #define IRQ_EXT_2 (IRQ_EXTERNAL_BASE + 2) +--- a/arch/mips/include/asm/mach-bcm63xx/irq.h ++++ b/arch/mips/include/asm/mach-bcm63xx/irq.h +@@ -1,7 +1,7 @@ + #ifndef __ASM_MACH_BCM63XX_IRQ_H + #define __ASM_MACH_BCM63XX_IRQ_H + +-#define NR_IRQS 128 ++#define NR_IRQS 256 + #define MIPS_CPU_IRQ_BASE 0 + + #endif |