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author | Jonas Gorski <jogo@openwrt.org> | 2013-06-30 13:10:00 +0000 |
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committer | Jonas Gorski <jogo@openwrt.org> | 2013-06-30 13:10:00 +0000 |
commit | e7d93889d79d7ae97c70fcbb164f60f81dc10f01 (patch) | |
tree | 7bc2d16490f666f55a2e7738a1bfb004b972a10e /target/linux/brcm63xx/patches-3.9/109-MIPS-BCM63XX-disable-SMP-also-on-BCM3368.patch | |
parent | 66f8f30f473eebdf2c36b5b4841ab23fb53726c7 (diff) | |
download | upstream-e7d93889d79d7ae97c70fcbb164f60f81dc10f01.tar.gz upstream-e7d93889d79d7ae97c70fcbb164f60f81dc10f01.tar.bz2 upstream-e7d93889d79d7ae97c70fcbb164f60f81dc10f01.zip |
bcm63xx: make smp kernels boot on older SoCs
Enhance BMIPS support so SMP kernels work on older chips.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 37099
Diffstat (limited to 'target/linux/brcm63xx/patches-3.9/109-MIPS-BCM63XX-disable-SMP-also-on-BCM3368.patch')
-rw-r--r-- | target/linux/brcm63xx/patches-3.9/109-MIPS-BCM63XX-disable-SMP-also-on-BCM3368.patch | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/target/linux/brcm63xx/patches-3.9/109-MIPS-BCM63XX-disable-SMP-also-on-BCM3368.patch b/target/linux/brcm63xx/patches-3.9/109-MIPS-BCM63XX-disable-SMP-also-on-BCM3368.patch new file mode 100644 index 0000000000..dbb2ae4e34 --- /dev/null +++ b/target/linux/brcm63xx/patches-3.9/109-MIPS-BCM63XX-disable-SMP-also-on-BCM3368.patch @@ -0,0 +1,36 @@ +From 32d4b03c0aedb96022e86a67a560f6eaf488200a Mon Sep 17 00:00:00 2001 +From: Jonas Gorski <jogo@openwrt.org> +Date: Fri, 28 Jun 2013 00:25:13 +0200 +Subject: [PATCH 10/10] MIPS: BCM63XX: disable SMP also on BCM3368 + +BCM3368 has the same shared TLB as BCM6358. + +Signed-off-by: Jonas Gorski <jogo@openwrt.org> +--- + arch/mips/bcm63xx/prom.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +--- a/arch/mips/bcm63xx/prom.c ++++ b/arch/mips/bcm63xx/prom.c +@@ -64,9 +64,9 @@ void __init prom_init(void) + + if (cpu_is_bmips4350()) { + /* +- * BCM6328 might not have its second CPU enabled, while BCM6358 +- * needs special handling for its shared TLB, so disable SMP +- * for now. ++ * BCM6328 might not have its second CPU enabled, while BCM3368 ++ * and BCM6358 need special handling for their shared TLB, so ++ * disable SMP for now. + */ + if (BCMCPU_IS_6328()) { + reg = bcm_readl(BCM_6328_OTP_BASE + +@@ -74,7 +74,7 @@ void __init prom_init(void) + + if (reg & OTP_6328_REG3_TP1_DISABLED) + bmips_smp_enabled = 0; +- } else if (BCMCPU_IS_6358()) { ++ } else if (BCMCPU_IS_3368() || BCMCPU_IS_6358()) { + bmips_smp_enabled = 0; + } + |