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| author | Jonas Gorski <jogo@openwrt.org> | 2013-04-23 13:55:36 +0000 |
|---|---|---|
| committer | Jonas Gorski <jogo@openwrt.org> | 2013-04-23 13:55:36 +0000 |
| commit | 90986b5581772a3767f5af2cadbde7310a3df296 (patch) | |
| tree | 5a83f720d472bd1e039b021f92b9ff552d16cbe2 /target/linux/brcm63xx/patches-3.8/313-MIPS-BCM63XX-enable-pcie-for-BCM6362.patch | |
| parent | 2a1a16d2d55b02dd145db1be84999b88895595e5 (diff) | |
| download | upstream-90986b5581772a3767f5af2cadbde7310a3df296.tar.gz upstream-90986b5581772a3767f5af2cadbde7310a3df296.tar.bz2 upstream-90986b5581772a3767f5af2cadbde7310a3df296.zip | |
bcm63xx: update patches with upstream submissions
SVN-Revision: 36407
Diffstat (limited to 'target/linux/brcm63xx/patches-3.8/313-MIPS-BCM63XX-enable-pcie-for-BCM6362.patch')
| -rw-r--r-- | target/linux/brcm63xx/patches-3.8/313-MIPS-BCM63XX-enable-pcie-for-BCM6362.patch | 52 |
1 files changed, 0 insertions, 52 deletions
diff --git a/target/linux/brcm63xx/patches-3.8/313-MIPS-BCM63XX-enable-pcie-for-BCM6362.patch b/target/linux/brcm63xx/patches-3.8/313-MIPS-BCM63XX-enable-pcie-for-BCM6362.patch deleted file mode 100644 index 467b5fe1b1..0000000000 --- a/target/linux/brcm63xx/patches-3.8/313-MIPS-BCM63XX-enable-pcie-for-BCM6362.patch +++ /dev/null @@ -1,52 +0,0 @@ -From 2f94c414e554531e2a65a7c4a7fa2d1ba0380c0a Mon Sep 17 00:00:00 2001 -From: Jonas Gorski <jonas.gorski@gmail.com> -Date: Mon, 21 Nov 2011 00:53:26 +0100 -Subject: [PATCH 29/72] MIPS: BCM63XX: enable pcie for BCM6362 - -Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> ---- - arch/mips/pci/pci-bcm63xx.c | 19 ++++++++++++++++--- - 1 file changed, 16 insertions(+), 3 deletions(-) - ---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h -+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h -@@ -1401,7 +1401,8 @@ - /************************************************************************* - * _REG relative to RSET_MISC - *************************************************************************/ --#define MISC_SERDES_CTRL_REG 0x0 -+#define MISC_SERDES_CTRL_6328_REG 0x0 -+#define MISC_SERDES_CTRL_6362_REG 0x4 - #define SERDES_PCIE_EN (1 << 0) - #define SERDES_PCIE_EXD_EN (1 << 15) - ---- a/arch/mips/pci/pci-bcm63xx.c -+++ b/arch/mips/pci/pci-bcm63xx.c -@@ -121,11 +121,17 @@ void __iomem *pci_iospace_start; - static void __init bcm63xx_reset_pcie(void) - { - u32 val; -+ u32 reg; - - /* enable SERDES */ -- val = bcm_misc_readl(MISC_SERDES_CTRL_REG); -+ if (BCMCPU_IS_6328()) -+ reg = MISC_SERDES_CTRL_6328_REG; -+ else -+ reg = MISC_SERDES_CTRL_6362_REG; -+ -+ val = bcm_misc_readl(reg); - val |= SERDES_PCIE_EN | SERDES_PCIE_EXD_EN; -- bcm_misc_writel(val, MISC_SERDES_CTRL_REG); -+ bcm_misc_writel(val, reg); - - /* reset the PCIe core */ - bcm63xx_core_set_reset(BCM63XX_RESET_PCIE, 1); -@@ -330,6 +336,7 @@ static int __init bcm63xx_pci_init(void) - - switch (bcm63xx_get_cpu_id()) { - case BCM6328_CPU_ID: -+ case BCM6362_CPU_ID: - return bcm63xx_register_pcie(); - case BCM6348_CPU_ID: - case BCM6358_CPU_ID: |