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author | Jonas Gorski <jogo@openwrt.org> | 2014-12-01 00:51:51 +0000 |
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committer | Jonas Gorski <jogo@openwrt.org> | 2014-12-01 00:51:51 +0000 |
commit | 29b06c76c3c91635b5d82ca9f20ed8062b94ebf0 (patch) | |
tree | f7d3454fc9f6488d9a525185b9779d22f4154b3a /target/linux/brcm63xx/patches-3.14/343-MIPS-BCM63XX-add-PCIe-support-for-BCM6318.patch | |
parent | 69df57900e7885a54eb77b56035b2d824f78c926 (diff) | |
download | upstream-29b06c76c3c91635b5d82ca9f20ed8062b94ebf0.tar.gz upstream-29b06c76c3c91635b5d82ca9f20ed8062b94ebf0.tar.bz2 upstream-29b06c76c3c91635b5d82ca9f20ed8062b94ebf0.zip |
brcm63xx: convert to irq domain
Add irq-domain aware irqchip drivers for the irq controllers of bcm63xx
and switch to use them.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@43454 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/brcm63xx/patches-3.14/343-MIPS-BCM63XX-add-PCIe-support-for-BCM6318.patch')
-rw-r--r-- | target/linux/brcm63xx/patches-3.14/343-MIPS-BCM63XX-add-PCIe-support-for-BCM6318.patch | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target/linux/brcm63xx/patches-3.14/343-MIPS-BCM63XX-add-PCIe-support-for-BCM6318.patch b/target/linux/brcm63xx/patches-3.14/343-MIPS-BCM63XX-add-PCIe-support-for-BCM6318.patch index 3ba33576fd..3ac08b471e 100644 --- a/target/linux/brcm63xx/patches-3.14/343-MIPS-BCM63XX-add-PCIe-support-for-BCM6318.patch +++ b/target/linux/brcm63xx/patches-3.14/343-MIPS-BCM63XX-add-PCIe-support-for-BCM6318.patch @@ -79,7 +79,7 @@ Subject: [PATCH 53/53] MIPS: BCM63XX: add PCIe support for BCM6318 #define BCM_PCIE_MEM_END_PA_6328 (BCM_PCIE_MEM_BASE_PA_6328 + \ --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h -@@ -1542,6 +1542,17 @@ +@@ -1543,6 +1543,17 @@ * _REG relative to RSET_PCIE *************************************************************************/ @@ -97,7 +97,7 @@ Subject: [PATCH 53/53] MIPS: BCM63XX: add PCIe support for BCM6318 #define PCIE_CONFIG2_REG 0x408 #define CONFIG2_BAR1_SIZE_EN 1 #define CONFIG2_BAR1_SIZE_MASK 0xf -@@ -1587,7 +1598,54 @@ +@@ -1588,7 +1599,54 @@ #define PCIE_RC_INT_C (1 << 2) #define PCIE_RC_INT_D (1 << 3) |