diff options
author | Felix Fietkau <nbd@openwrt.org> | 2015-03-28 13:21:09 +0000 |
---|---|---|
committer | Felix Fietkau <nbd@openwrt.org> | 2015-03-28 13:21:09 +0000 |
commit | 693e5aae4160a69958b64fed77daa1696392fb0b (patch) | |
tree | 51a93795a4e0f0d24f306356dbaa711d559e9c0e /target/linux/brcm63xx/patches-3.14/023-MIPS-BCM63XX-add-cpu-argument-to-dispatch-internal.patch | |
parent | 130acd0f4c69273ff720406d4e2f748487bb4cd8 (diff) | |
download | upstream-693e5aae4160a69958b64fed77daa1696392fb0b.tar.gz upstream-693e5aae4160a69958b64fed77daa1696392fb0b.tar.bz2 upstream-693e5aae4160a69958b64fed77daa1696392fb0b.zip |
brcm63xx: remove linux 3.14 support
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
SVN-Revision: 45089
Diffstat (limited to 'target/linux/brcm63xx/patches-3.14/023-MIPS-BCM63XX-add-cpu-argument-to-dispatch-internal.patch')
-rw-r--r-- | target/linux/brcm63xx/patches-3.14/023-MIPS-BCM63XX-add-cpu-argument-to-dispatch-internal.patch | 70 |
1 files changed, 0 insertions, 70 deletions
diff --git a/target/linux/brcm63xx/patches-3.14/023-MIPS-BCM63XX-add-cpu-argument-to-dispatch-internal.patch b/target/linux/brcm63xx/patches-3.14/023-MIPS-BCM63XX-add-cpu-argument-to-dispatch-internal.patch deleted file mode 100644 index 395dc13d8d..0000000000 --- a/target/linux/brcm63xx/patches-3.14/023-MIPS-BCM63XX-add-cpu-argument-to-dispatch-internal.patch +++ /dev/null @@ -1,70 +0,0 @@ -From 43ebef8162adfa7789cb915e60e46103965d7efd Mon Sep 17 00:00:00 2001 -From: Jonas Gorski <jogo@openwrt.org> -Date: Fri, 26 Apr 2013 11:21:16 +0200 -Subject: [PATCH 06/10] MIPS: BCM63XX: add cpu argument to dispatch internal - -Signed-off-by: Jonas Gorski <jogo@openwrt.org> ---- - arch/mips/bcm63xx/irq.c | 18 ++++++++++-------- - 1 file changed, 10 insertions(+), 8 deletions(-) - ---- a/arch/mips/bcm63xx/irq.c -+++ b/arch/mips/bcm63xx/irq.c -@@ -19,9 +19,10 @@ - #include <bcm63xx_io.h> - #include <bcm63xx_irq.h> - -+ - static u32 irq_stat_addr[2]; - static u32 irq_mask_addr[2]; --static void (*dispatch_internal)(void); -+static void (*dispatch_internal)(int cpu); - static int is_ext_irq_cascaded; - static unsigned int ext_irq_count; - static unsigned int ext_irq_start, ext_irq_end; -@@ -54,19 +55,20 @@ static inline void handle_internal(int i - */ - - #define BUILD_IPIC_INTERNAL(width) \ --void __dispatch_internal_##width(void) \ -+void __dispatch_internal_##width(int cpu) \ - { \ - u32 pending[width / 32]; \ - unsigned int src, tgt; \ - bool irqs_pending = false; \ -- static unsigned int i; \ -+ static unsigned int i[2]; \ -+ unsigned int *next = &i[cpu]; \ - \ - /* read registers in reverse order */ \ - for (src = 0, tgt = (width / 32); src < (width / 32); src++) { \ - u32 val; \ - \ -- val = bcm_readl(irq_stat_addr[0] + src * sizeof(u32)); \ -- val &= bcm_readl(irq_mask_addr[0] + src * sizeof(u32)); \ -+ val = bcm_readl(irq_stat_addr[cpu] + src * sizeof(u32)); \ -+ val &= bcm_readl(irq_mask_addr[cpu] + src * sizeof(u32)); \ - pending[--tgt] = val; \ - \ - if (val) \ -@@ -77,9 +79,9 @@ void __dispatch_internal_##width(void) - return; \ - \ - while (1) { \ -- unsigned int to_call = i; \ -+ unsigned int to_call = *next; \ - \ -- i = (i + 1) & (width - 1); \ -+ *next = (*next + 1) & (width - 1); \ - if (pending[to_call / 32] & (1 << (to_call & 0x1f))) { \ - handle_internal(to_call); \ - break; \ -@@ -129,7 +131,7 @@ asmlinkage void plat_irq_dispatch(void) - if (cause & CAUSEF_IP1) - do_IRQ(1); - if (cause & CAUSEF_IP2) -- dispatch_internal(); -+ dispatch_internal(0); - if (!is_ext_irq_cascaded) { - if (cause & CAUSEF_IP3) - do_IRQ(IRQ_EXT_0); |