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| author | Florian Fainelli <florian@openwrt.org> | 2014-01-15 19:05:57 +0000 |
|---|---|---|
| committer | Florian Fainelli <florian@openwrt.org> | 2014-01-15 19:05:57 +0000 |
| commit | bf4f1feb7a208c17c91011fb614a54f8f2440f26 (patch) | |
| tree | 17d696e516e1043ba794a4ce2f62b5e0cd961ea4 /target/linux/brcm63xx/patches-3.10/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch | |
| parent | a467c52eca666b81c319cb9437234ce2e6e230ec (diff) | |
| download | upstream-bf4f1feb7a208c17c91011fb614a54f8f2440f26.tar.gz upstream-bf4f1feb7a208c17c91011fb614a54f8f2440f26.tar.bz2 upstream-bf4f1feb7a208c17c91011fb614a54f8f2440f26.zip | |
brcm63xx: add USB support to BCM6318
BCM6318 has a special initialization sequence which involves touching
PLL control registers in the USBH_PRIV register space, as well as
toggling a bit the Simulation control register.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
SVN-Revision: 39302
Diffstat (limited to 'target/linux/brcm63xx/patches-3.10/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch')
| -rw-r--r-- | target/linux/brcm63xx/patches-3.10/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target/linux/brcm63xx/patches-3.10/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch b/target/linux/brcm63xx/patches-3.10/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch index 696c9a884a..a740d4d1b5 100644 --- a/target/linux/brcm63xx/patches-3.10/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch +++ b/target/linux/brcm63xx/patches-3.10/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch @@ -115,7 +115,7 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> return -ENODEV; --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h -@@ -818,6 +818,7 @@ +@@ -824,6 +824,7 @@ #define GPIO_STRAPBUS_REG 0x40 #define STRAPBUS_6358_BOOT_SEL_PARALLEL (1 << 1) #define STRAPBUS_6358_BOOT_SEL_SERIAL (0 << 1) @@ -123,7 +123,7 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> #define STRAPBUS_6368_BOOT_SEL_MASK 0x3 #define STRAPBUS_6368_BOOT_SEL_NAND 0 #define STRAPBUS_6368_BOOT_SEL_SERIAL 1 -@@ -1668,6 +1669,7 @@ +@@ -1682,6 +1683,7 @@ #define STRAPBUS_63268_FCVO_MASK (0xf << STRAPBUS_63268_FCVO_SHIFT) #define MISC_STRAPBUS_6328_REG 0x240 |