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| author | Jonas Gorski <jogo@openwrt.org> | 2014-06-21 19:23:28 +0000 |
|---|---|---|
| committer | Jonas Gorski <jogo@openwrt.org> | 2014-06-21 19:23:28 +0000 |
| commit | 21d65bb185225a3a5369756fc44acbbbfbc2f651 (patch) | |
| tree | 4c18455910033e540eeb1d15eb98131bcc7ccf7c /target/linux/brcm63xx/patches-3.10/334-MIPS-BCM63XX-detect-BCM6368-variants.patch | |
| parent | f695fa358aafe1a96825977dd7d598354b1828f6 (diff) | |
| download | upstream-21d65bb185225a3a5369756fc44acbbbfbc2f651.tar.gz upstream-21d65bb185225a3a5369756fc44acbbbfbc2f651.tar.bz2 upstream-21d65bb185225a3a5369756fc44acbbbfbc2f651.zip | |
brcm63xx: update variant detection patches and fix VARID shift
The variant id field shift was wrong, causing the variant detection
to fail.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 41295
Diffstat (limited to 'target/linux/brcm63xx/patches-3.10/334-MIPS-BCM63XX-detect-BCM6368-variants.patch')
| -rw-r--r-- | target/linux/brcm63xx/patches-3.10/334-MIPS-BCM63XX-detect-BCM6368-variants.patch | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/target/linux/brcm63xx/patches-3.10/334-MIPS-BCM63XX-detect-BCM6368-variants.patch b/target/linux/brcm63xx/patches-3.10/334-MIPS-BCM63XX-detect-BCM6368-variants.patch new file mode 100644 index 0000000000..266f3607d2 --- /dev/null +++ b/target/linux/brcm63xx/patches-3.10/334-MIPS-BCM63XX-detect-BCM6368-variants.patch @@ -0,0 +1,48 @@ +From 825cc67e56b5e624a05f6850a86d91508b786848 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski <jogo@openwrt.org> +Date: Sat, 7 Dec 2013 14:36:56 +0100 +Subject: [PATCH 24/44] MIPS: BCM63XX: detect BCM6368 variants + +The DSL-less BCM6368 variant BCM6367 uses a different chip id. Apart +from missing DSL, there is no difference to BCM6368, so treat it such. + +Signed-off-by: Jonas Gorski <jogo@openwrt.org> +--- + arch/mips/bcm63xx/cpu.c | 4 ++++ + arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 3 +++ + 2 files changed, 7 insertions(+) + +--- a/arch/mips/bcm63xx/cpu.c ++++ b/arch/mips/bcm63xx/cpu.c +@@ -392,8 +392,12 @@ void __init bcm63xx_cpu_init(void) + + break; + case BCM6368_CPU_ID: ++ case BCM6369_CPU_ID: + bcm63xx_regs_base = bcm6368_regs_base; + bcm63xx_irqs = bcm6368_irqs; ++ ++ /* BCM6369 is a BCM6368 without xDSL, so treat it the same */ ++ bcm63xx_cpu_id = BCM6368_CPU_ID; + break; + default: + panic("unsupported broadcom CPU %x", bcm63xx_cpu_id); +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h +@@ -20,6 +20,7 @@ + #define BCM6361_CPU_ID 0x6361 + #define BCM6362_CPU_ID 0x6362 + #define BCM6368_CPU_ID 0x6368 ++#define BCM6369_CPU_ID 0x6369 + + void __init bcm63xx_cpu_init(void); + u32 bcm63xx_get_cpu_variant(void); +@@ -106,6 +107,8 @@ static inline u16 __pure bcm63xx_get_cpu + (bcm63xx_get_cpu_variant() == BCM6362_CPU_ID) + #define BCMCPU_VARIANT_IS_6368() \ + (bcm63xx_get_cpu_variant() == BCM6368_CPU_ID) ++#define BCMCPU_VARIANT_IS_6369() \ ++ (bcm63xx_get_cpu_variant() == BCM6369_CPU_ID) + + /* + * While registers sets are (mostly) the same across 63xx CPU, base |