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author | Jonas Gorski <jogo@openwrt.org> | 2014-01-13 12:13:26 +0000 |
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committer | Jonas Gorski <jogo@openwrt.org> | 2014-01-13 12:13:26 +0000 |
commit | 76164e1a3659d623cbd8b704559bf6241521011f (patch) | |
tree | ad57a442583a461ff7df57bd7f79bd83d74245d2 /target/linux/brcm63xx/patches-3.10/334-MIPS-BCM63XX-add-support-for-BCM6368-variants.patch | |
parent | db36359f48ffa15ecfc9d5285d47c09bb95e8fa8 (diff) | |
download | upstream-76164e1a3659d623cbd8b704559bf6241521011f.tar.gz upstream-76164e1a3659d623cbd8b704559bf6241521011f.tar.bz2 upstream-76164e1a3659d623cbd8b704559bf6241521011f.zip |
brcm63xx: add support for chip variants
Some SoCs have variants which are mostly the same, but use a different
chip id (or not). Add code for detecting them and handling them as
their standard counterparts.
This adds support for e.g. BCM6369.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 39269
Diffstat (limited to 'target/linux/brcm63xx/patches-3.10/334-MIPS-BCM63XX-add-support-for-BCM6368-variants.patch')
-rw-r--r-- | target/linux/brcm63xx/patches-3.10/334-MIPS-BCM63XX-add-support-for-BCM6368-variants.patch | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/target/linux/brcm63xx/patches-3.10/334-MIPS-BCM63XX-add-support-for-BCM6368-variants.patch b/target/linux/brcm63xx/patches-3.10/334-MIPS-BCM63XX-add-support-for-BCM6368-variants.patch new file mode 100644 index 0000000000..19539cf31e --- /dev/null +++ b/target/linux/brcm63xx/patches-3.10/334-MIPS-BCM63XX-add-support-for-BCM6368-variants.patch @@ -0,0 +1,44 @@ +From 311b0246d51e09d13464e76abb0e231c855dd333 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski <jogo@openwrt.org> +Date: Sat, 7 Dec 2013 14:36:56 +0100 +Subject: [PATCH 44/53] MIPS: BCM63XX: add support for BCM6368 variants + +--- + arch/mips/bcm63xx/cpu.c | 4 ++++ + arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 3 +++ + 2 files changed, 7 insertions(+) + +--- a/arch/mips/bcm63xx/cpu.c ++++ b/arch/mips/bcm63xx/cpu.c +@@ -392,8 +392,12 @@ void __init bcm63xx_cpu_init(void) + + break; + case BCM6368_CPU_ID: ++ case BCM6369_CPU_ID: + bcm63xx_regs_base = bcm6368_regs_base; + bcm63xx_irqs = bcm6368_irqs; ++ ++ /* BCM6369 is a BCM6368 without xDSL, so treat it the same */ ++ bcm63xx_cpu_id = BCM6368_CPU_ID; + break; + default: + panic("unsupported broadcom CPU %x", bcm63xx_cpu_id); +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h +@@ -20,6 +20,7 @@ + #define BCM6361_CPU_ID 0x6361 + #define BCM6362_CPU_ID 0x6362 + #define BCM6368_CPU_ID 0x6368 ++#define BCM6369_CPU_ID 0x6369 + + void __init bcm63xx_cpu_init(void); + u32 bcm63xx_get_cpu_variant(void); +@@ -106,6 +107,8 @@ static inline u16 __pure bcm63xx_get_cpu + (bcm63xx_get_cpu_variant() == BCM6362_CPU_ID) + #define BCMCPU_VARIANT_IS_6368() \ + (bcm63xx_get_cpu_variant() == BCM6368_CPU_ID) ++#define BCMCPU_VARIANT_IS_6369() \ ++ (bcm63xx_get_cpu_variant() == BCM6369_CPU_ID) + + /* + * While registers sets are (mostly) the same across 63xx CPU, base |