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author | Jonas Gorski <jogo@openwrt.org> | 2014-06-21 19:23:28 +0000 |
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committer | Jonas Gorski <jogo@openwrt.org> | 2014-06-21 19:23:28 +0000 |
commit | 21d65bb185225a3a5369756fc44acbbbfbc2f651 (patch) | |
tree | 4c18455910033e540eeb1d15eb98131bcc7ccf7c /target/linux/brcm63xx/patches-3.10/331-MIPS-BCM63XX-define-variant-id-field.patch | |
parent | f695fa358aafe1a96825977dd7d598354b1828f6 (diff) | |
download | upstream-21d65bb185225a3a5369756fc44acbbbfbc2f651.tar.gz upstream-21d65bb185225a3a5369756fc44acbbbfbc2f651.tar.bz2 upstream-21d65bb185225a3a5369756fc44acbbbfbc2f651.zip |
brcm63xx: update variant detection patches and fix VARID shift
The variant id field shift was wrong, causing the variant detection
to fail.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 41295
Diffstat (limited to 'target/linux/brcm63xx/patches-3.10/331-MIPS-BCM63XX-define-variant-id-field.patch')
-rw-r--r-- | target/linux/brcm63xx/patches-3.10/331-MIPS-BCM63XX-define-variant-id-field.patch | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/target/linux/brcm63xx/patches-3.10/331-MIPS-BCM63XX-define-variant-id-field.patch b/target/linux/brcm63xx/patches-3.10/331-MIPS-BCM63XX-define-variant-id-field.patch index 0ffc5bd0f5..2e21c65009 100644 --- a/target/linux/brcm63xx/patches-3.10/331-MIPS-BCM63XX-define-variant-id-field.patch +++ b/target/linux/brcm63xx/patches-3.10/331-MIPS-BCM63XX-define-variant-id-field.patch @@ -1,8 +1,11 @@ -From 9cd8b4a2ee9d0e6a5b91845bdd6f4b7e114fc8c4 Mon Sep 17 00:00:00 2001 +From 3bd8e2535265f06f79ed9c0ad788405441e091dc Mon Sep 17 00:00:00 2001 From: Jonas Gorski <jogo@openwrt.org> Date: Sat, 7 Dec 2013 14:22:41 +0100 -Subject: [PATCH 41/53] MIPS: BCM63XX: define variant id field +Subject: [PATCH 21/45] MIPS: BCM63XX: define variant id field +Some SoC have a variant id field in the chip id register. + +Signed-off-by: Jonas Gorski <jogo@openwrt.org> --- arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 2 ++ 1 file changed, 2 insertions(+) @@ -13,7 +16,7 @@ Subject: [PATCH 41/53] MIPS: BCM63XX: define variant id field #define PERF_REV_REG 0x0 #define REV_CHIPID_SHIFT 16 #define REV_CHIPID_MASK (0xffff << REV_CHIPID_SHIFT) -+#define REV_VARID_SHIFT 8 ++#define REV_VARID_SHIFT 12 +#define REV_VARID_MASK (0xf << REV_VARID_SHIFT) #define REV_REVID_SHIFT 0 #define REV_REVID_MASK (0xff << REV_REVID_SHIFT) |