diff options
| author | Jonas Gorski <jogo@openwrt.org> | 2014-01-13 12:13:26 +0000 |
|---|---|---|
| committer | Jonas Gorski <jogo@openwrt.org> | 2014-01-13 12:13:26 +0000 |
| commit | 76164e1a3659d623cbd8b704559bf6241521011f (patch) | |
| tree | ad57a442583a461ff7df57bd7f79bd83d74245d2 /target/linux/brcm63xx/patches-3.10/331-MIPS-BCM63XX-define-variant-id-field.patch | |
| parent | db36359f48ffa15ecfc9d5285d47c09bb95e8fa8 (diff) | |
| download | upstream-76164e1a3659d623cbd8b704559bf6241521011f.tar.gz upstream-76164e1a3659d623cbd8b704559bf6241521011f.tar.bz2 upstream-76164e1a3659d623cbd8b704559bf6241521011f.zip | |
brcm63xx: add support for chip variants
Some SoCs have variants which are mostly the same, but use a different
chip id (or not). Add code for detecting them and handling them as
their standard counterparts.
This adds support for e.g. BCM6369.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 39269
Diffstat (limited to 'target/linux/brcm63xx/patches-3.10/331-MIPS-BCM63XX-define-variant-id-field.patch')
| -rw-r--r-- | target/linux/brcm63xx/patches-3.10/331-MIPS-BCM63XX-define-variant-id-field.patch | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/target/linux/brcm63xx/patches-3.10/331-MIPS-BCM63XX-define-variant-id-field.patch b/target/linux/brcm63xx/patches-3.10/331-MIPS-BCM63XX-define-variant-id-field.patch new file mode 100644 index 0000000000..0ffc5bd0f5 --- /dev/null +++ b/target/linux/brcm63xx/patches-3.10/331-MIPS-BCM63XX-define-variant-id-field.patch @@ -0,0 +1,20 @@ +From 9cd8b4a2ee9d0e6a5b91845bdd6f4b7e114fc8c4 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski <jogo@openwrt.org> +Date: Sat, 7 Dec 2013 14:22:41 +0100 +Subject: [PATCH 41/53] MIPS: BCM63XX: define variant id field + +--- + arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h +@@ -9,6 +9,8 @@ + #define PERF_REV_REG 0x0 + #define REV_CHIPID_SHIFT 16 + #define REV_CHIPID_MASK (0xffff << REV_CHIPID_SHIFT) ++#define REV_VARID_SHIFT 8 ++#define REV_VARID_MASK (0xf << REV_VARID_SHIFT) + #define REV_REVID_SHIFT 0 + #define REV_REVID_MASK (0xff << REV_REVID_SHIFT) + |