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| author | Florian Fainelli <florian@openwrt.org> | 2011-08-02 18:55:46 +0000 |
|---|---|---|
| committer | Florian Fainelli <florian@openwrt.org> | 2011-08-02 18:55:46 +0000 |
| commit | 11c412877095f3d6e754038a6c83be278d613393 (patch) | |
| tree | 34330b9634559b8673054e75fd941fafaf2038d2 /target/linux/brcm63xx/patches-3.0/452-board_V2500V.patch | |
| parent | c4af036ec73d84d04e5299f5749cc5103988b15f (diff) | |
| download | upstream-11c412877095f3d6e754038a6c83be278d613393.tar.gz upstream-11c412877095f3d6e754038a6c83be278d613393.tar.bz2 upstream-11c412877095f3d6e754038a6c83be278d613393.zip | |
improve BCM6345 support
- runtime detect the amount of memory available
- define EBI_BASE as MPI_BASE to get rid of chip-select specific hacks
- fix GPIO control
SVN-Revision: 27880
Diffstat (limited to 'target/linux/brcm63xx/patches-3.0/452-board_V2500V.patch')
| -rw-r--r-- | target/linux/brcm63xx/patches-3.0/452-board_V2500V.patch | 17 |
1 files changed, 8 insertions, 9 deletions
diff --git a/target/linux/brcm63xx/patches-3.0/452-board_V2500V.patch b/target/linux/brcm63xx/patches-3.0/452-board_V2500V.patch index 12d03f3f70..f28a10d6cc 100644 --- a/target/linux/brcm63xx/patches-3.0/452-board_V2500V.patch +++ b/target/linux/brcm63xx/patches-3.0/452-board_V2500V.patch @@ -72,9 +72,9 @@ #endif #ifdef CONFIG_BCM63XX_CPU_6358 -@@ -2070,6 +2128,22 @@ void __init board_prom_init(void) - val &= MPI_CSBASE_BASE_MASK; - } +@@ -2064,6 +2122,22 @@ void __init board_prom_init(void) + val = bcm_mpi_readl(MPI_CSBASE_REG(0)); + val &= MPI_CSBASE_BASE_MASK; boot_addr = (u8 *)KSEG1ADDR(val); + printk(KERN_INFO PFX "Boot address 0x%08x\n",(unsigned int)boot_addr); + @@ -95,17 +95,16 @@ /* dump cfe version */ cfe = boot_addr + BCM963XX_CFE_VERSION_OFFSET; -@@ -2274,6 +2348,14 @@ int __init board_register_devices(void) - val = bcm_mpi_readl(MPI_CSBASE_REG(0)); - val &= MPI_CSBASE_BASE_MASK; - } -+ +@@ -2265,6 +2339,13 @@ int __init board_register_devices(void) + val = bcm_mpi_readl(MPI_CSBASE_REG(0)); + val &= MPI_CSBASE_BASE_MASK; + + /* BT Voyager 2500V has 8 Meg flash in two 4 Meg banks */ + /* Loading from CFE always uses Bank 0 */ + if (!strcmp(board.name, "V2500V_BB")) { + printk(KERN_INFO PFX "V2500V: Start in Bank 0\n"); + val = val + 0x400000; // Select Bank 0 start address -+ } ++ } + mtd_resources[0].start = val; mtd_resources[0].end = 0x1FFFFFFF; |