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authorJonas Gorski <jonas.gorski@gmail.com>2017-02-07 12:31:02 +0100
committerJonas Gorski <jonas.gorski@gmail.com>2017-06-04 11:33:43 +0200
commitb50fd8c2b3abdd557bd7d2bb5628f03b20801350 (patch)
treea4f71f0f10c0c3b2c2f0a5000f695bfd699ca5d8 /target/linux/brcm63xx/dts/bcm6338.dtsi
parent2a2b16210bbc8c5881286d2ff742f3bdf1a7fd9c (diff)
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brcm63xx: register SPI controllers through DT
Register SPI controllers through device tree. We will wire up the clocks at a later stage. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Diffstat (limited to 'target/linux/brcm63xx/dts/bcm6338.dtsi')
-rw-r--r--target/linux/brcm63xx/dts/bcm6338.dtsi11
1 files changed, 11 insertions, 0 deletions
diff --git a/target/linux/brcm63xx/dts/bcm6338.dtsi b/target/linux/brcm63xx/dts/bcm6338.dtsi
index 7d48e86b8c..1811acfed8 100644
--- a/target/linux/brcm63xx/dts/bcm6338.dtsi
+++ b/target/linux/brcm63xx/dts/bcm6338.dtsi
@@ -6,6 +6,7 @@
aliases {
pflash = &pflash;
gpio0 = &gpio0;
+ spi0 = &lsspi;
};
cpus {
@@ -44,6 +45,7 @@
#size-cells = <1>;
ranges;
compatible = "simple-bus";
+ interrupt-parent = <&periph_intc>;
periph_intc: interrupt-controller@fffe000c {
compatible = "brcm,bcm6345-l1-intc";
@@ -76,5 +78,14 @@
ngpios = <8>;
};
+
+ lsspi: spi@fffe0c00 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,bcm6348-spi";
+ reg = <0xfffe0c00 0x40>;
+ interrupts = <1>;
+ /* clocks = <&clkctl 9>; */
+ };
};
};