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authorJonas Gorski <jogo@openwrt.org>2014-12-01 00:52:07 +0000
committerJonas Gorski <jogo@openwrt.org>2014-12-01 00:52:07 +0000
commite8068f0b1b4e53559ae0c58910b8905bee9b61ab (patch)
treecf44e0daeb888e0b4c69d9bf8483088a05239b96 /target/linux/brcm63xx/dts/bcm6328.dtsi
parent443d730da80775f4e6740f947b447e0bffef3644 (diff)
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brcm63xx: register interrupt-controllers through DT when possible
Add the required nodes for the interrupt controllers and register them through DT when a DTB is present. Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 43457
Diffstat (limited to 'target/linux/brcm63xx/dts/bcm6328.dtsi')
-rw-r--r--target/linux/brcm63xx/dts/bcm6328.dtsi30
1 files changed, 30 insertions, 0 deletions
diff --git a/target/linux/brcm63xx/dts/bcm6328.dtsi b/target/linux/brcm63xx/dts/bcm6328.dtsi
index c9940c16de..0ed186e185 100644
--- a/target/linux/brcm63xx/dts/bcm6328.dtsi
+++ b/target/linux/brcm63xx/dts/bcm6328.dtsi
@@ -14,6 +14,14 @@
};
};
+ cpu_intc: interrupt-controller {
+ #address-cells = <0>;
+ compatible = "mti,cpu-interrupt-controller";
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
memory { device_type = "memory"; reg = <0 0>; };
ubus@10000000 {
@@ -21,5 +29,27 @@
#size-cells = <1>;
ranges;
compatible = "simple-bus";
+
+ ext_intc: interrupt-controller@10000018 {
+ compatible = "brcm,bcm6345-ext-intc";
+ reg = <0x10000018 0x4>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ interrupt-parent = <&periph_intc>;
+ interrupts = <24>, <25>, <26>, <27>;
+ };
+
+ periph_intc: interrupt-controller@10000020 {
+ compatible = "brcm,bcm6345-l2-intc";
+ reg = <0x10000020 0x10>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-parent = <&cpu_intc>;
+ interrupts = <2>;
+ };
};
};