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authorJonas Gorski <jogo@openwrt.org>2015-02-27 17:39:07 +0000
committerJonas Gorski <jogo@openwrt.org>2015-02-27 17:39:07 +0000
commit9a65e1a5706a9ae9ed45761fa78c863e5b811642 (patch)
tree6acd33fb69d26f74004c234885ff6ecc6f6a6695 /target/linux/brcm63xx/dts/bcm3368.dtsi
parent69b327247ca2e9a9b1c9ee8daafaccc507a165c3 (diff)
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brcm63xx: use dtb for cvg834g
Add a dtsi for bcm3368, add a dts and profile for cvg834g, and convert it to use ImageDTB. Since HCS requires more arguments, enhance the max arguments of the call. The image name is intentionally left blank to prevent non-initramfs images to be built, as they currently contain no rootfs and consequently won't work. Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 44561
Diffstat (limited to 'target/linux/brcm63xx/dts/bcm3368.dtsi')
-rw-r--r--target/linux/brcm63xx/dts/bcm3368.dtsi75
1 files changed, 75 insertions, 0 deletions
diff --git a/target/linux/brcm63xx/dts/bcm3368.dtsi b/target/linux/brcm63xx/dts/bcm3368.dtsi
new file mode 100644
index 0000000000..dba73b56cc
--- /dev/null
+++ b/target/linux/brcm63xx/dts/bcm3368.dtsi
@@ -0,0 +1,75 @@
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "brcm,bcm3368";
+
+ aliases {
+ pflash = &pflash;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ compatible = "brcm,bmips4350", "mips,mips4Kc";
+ device_type = "cpu";
+ reg = <0>;
+ };
+
+ cpu@1 {
+ compatible = "brcm,bmips4350", "mips,mips4Kc";
+ device_type = "cpu";
+ reg = <1>;
+ };
+ };
+
+ cpu_intc: interrupt-controller {
+ #address-cells = <0>;
+ compatible = "mti,cpu-interrupt-controller";
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ memory { device_type = "memory"; reg = <0 0>; };
+
+ pflash: nor@1e000000 {
+ compatible = "cfi-flash";
+ reg = <0x1e000000 0x2000000>;
+ bank-width = <2>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ status = "disabled";
+ };
+
+ ubus@fff00000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ compatible = "simple-bus";
+
+ periph_intc: interrupt-controller@fff8c00c {
+ compatible = "brcm,bcm6345-periph-intc";
+ reg = <0xfffe000c 0x8>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-parent = <&cpu_intc>;
+ interrupts = <2>;
+ };
+
+ ext_intc0: interrupt-controller@fff8c014 {
+ compatible = "brcm,bcm6345-ext-intc";
+ reg = <0xfffe0014 0x4>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ interrupt-parent = <&periph_intc>;
+ interrupts = <24>, <25>, <26>, <27>;
+ };
+ };
+};