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authorJonas Gorski <jonas.gorski@gmail.com>2017-02-07 12:31:02 +0100
committerJonas Gorski <jonas.gorski@gmail.com>2017-06-04 11:33:43 +0200
commitb50fd8c2b3abdd557bd7d2bb5628f03b20801350 (patch)
treea4f71f0f10c0c3b2c2f0a5000f695bfd699ca5d8 /target/linux/brcm63xx/dts/bcm3368.dtsi
parent2a2b16210bbc8c5881286d2ff742f3bdf1a7fd9c (diff)
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brcm63xx: register SPI controllers through DT
Register SPI controllers through device tree. We will wire up the clocks at a later stage. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Diffstat (limited to 'target/linux/brcm63xx/dts/bcm3368.dtsi')
-rw-r--r--target/linux/brcm63xx/dts/bcm3368.dtsi12
1 files changed, 11 insertions, 1 deletions
diff --git a/target/linux/brcm63xx/dts/bcm3368.dtsi b/target/linux/brcm63xx/dts/bcm3368.dtsi
index 5c2052962c..29dae01d79 100644
--- a/target/linux/brcm63xx/dts/bcm3368.dtsi
+++ b/target/linux/brcm63xx/dts/bcm3368.dtsi
@@ -7,6 +7,7 @@
pflash = &pflash;
gpio0 = &gpio0;
gpio1 = &gpio1;
+ spi0 = &lsspi;
};
cpus {
@@ -51,6 +52,7 @@
#size-cells = <1>;
ranges;
compatible = "simple-bus";
+ interrupt-parent = <&periph_intc>;
periph_intc: interrupt-controller@fff8c00c {
compatible = "brcm,bcm6345-l1-intc";
@@ -70,7 +72,6 @@
interrupt-controller;
#interrupt-cells = <2>;
- interrupt-parent = <&periph_intc>;
interrupts = <25>, <26>, <27>, <28>;
};
@@ -91,5 +92,14 @@
gpio-controller;
#gpio-cells = <2>;
};
+
+ lsspi: spi@fff8c800 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,bcm6358-spi";
+ reg = <0xfff8c800 0x70c>;
+ interrupts = <1>;
+ /* clocks = <&clkctl 9>; */
+ };
};
};