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authorHauke Mehrtens <hauke@openwrt.org>2012-09-20 14:51:57 +0000
committerHauke Mehrtens <hauke@openwrt.org>2012-09-20 14:51:57 +0000
commit8403c0dc750a1a92c987a104462dc48f1bbd20dd (patch)
tree235d5fa5847c7c8f9ef11ada44f84b3e59f2b61e /target/linux/brcm47xx
parent039dcc7b78432313e3c9ee70299e504343e2c25f (diff)
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[brcm47xx]: deactivate mips wait instruction for MIPS 74K on Broadcom SoCs
When not removing support for the wait instruction, when ruining on the BCM4706 SoC the system stops after msleep() without an exception. I haven't seen this problem on the other Broadcom SoCs with a 74K CPU, but in the Broadcom SDK it is deactivated for all CPUs of this type. git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33496 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/brcm47xx')
-rw-r--r--target/linux/brcm47xx/patches-3.3/170-fix-74k-cpu.patch12
1 files changed, 12 insertions, 0 deletions
diff --git a/target/linux/brcm47xx/patches-3.3/170-fix-74k-cpu.patch b/target/linux/brcm47xx/patches-3.3/170-fix-74k-cpu.patch
new file mode 100644
index 0000000000..6eee89532b
--- /dev/null
+++ b/target/linux/brcm47xx/patches-3.3/170-fix-74k-cpu.patch
@@ -0,0 +1,12 @@
+--- a/arch/mips/kernel/cpu-probe.c
++++ b/arch/mips/kernel/cpu-probe.c
+@@ -209,9 +209,6 @@ void __init check_wait(void)
+ break;
+
+ case CPU_74K:
+- cpu_wait = r4k_wait;
+- if ((c->processor_id & 0xff) >= PRID_REV_ENCODE_332(2, 1, 0))
+- cpu_wait = r4k_wait_irqoff;
+ break;
+
+ case CPU_TX49XX: