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author | Hauke Mehrtens <hauke@hauke-m.de> | 2012-11-24 20:07:25 +0000 |
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committer | Hauke Mehrtens <hauke@hauke-m.de> | 2012-11-24 20:07:25 +0000 |
commit | c62d86ecb87f695d9065a29e6ec4cd49ea5f21ad (patch) | |
tree | 2780e1b6c67e659e1139bdf4ac01364588a84de2 /target/linux/brcm47xx/patches-3.6/550-ssb-set-the-pmu-watchdog-if-available.patch | |
parent | 60e0e0d6e64604de77dd6a5daf641b80408c1701 (diff) | |
download | upstream-c62d86ecb87f695d9065a29e6ec4cd49ea5f21ad.tar.gz upstream-c62d86ecb87f695d9065a29e6ec4cd49ea5f21ad.tar.bz2 upstream-c62d86ecb87f695d9065a29e6ec4cd49ea5f21ad.zip |
brcm47xx: update watchdog driver
This watchdog driver should work with SoC having a PMU.
This fixes #11720.
SVN-Revision: 34323
Diffstat (limited to 'target/linux/brcm47xx/patches-3.6/550-ssb-set-the-pmu-watchdog-if-available.patch')
-rw-r--r-- | target/linux/brcm47xx/patches-3.6/550-ssb-set-the-pmu-watchdog-if-available.patch | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/target/linux/brcm47xx/patches-3.6/550-ssb-set-the-pmu-watchdog-if-available.patch b/target/linux/brcm47xx/patches-3.6/550-ssb-set-the-pmu-watchdog-if-available.patch new file mode 100644 index 0000000000..f7cc07bcd7 --- /dev/null +++ b/target/linux/brcm47xx/patches-3.6/550-ssb-set-the-pmu-watchdog-if-available.patch @@ -0,0 +1,54 @@ +--- a/drivers/ssb/driver_chipcommon.c ++++ b/drivers/ssb/driver_chipcommon.c +@@ -288,6 +288,24 @@ static u32 ssb_chipco_alp_clock(struct s + return 20000000; + } + ++static u32 ssb_chipco_watchdog_get_max_timer(struct ssb_chipcommon *cc) ++{ ++ u32 nb; ++ ++ if (cc->capabilities & SSB_CHIPCO_CAP_PMU) { ++ if (cc->dev->id.revision < 26) ++ nb = 16; ++ else ++ nb = (cc->dev->id.revision >= 37) ? 32 : 24; ++ } else { ++ nb = 28; ++ } ++ if (nb == 32) ++ return 0xffffffff; ++ else ++ return (1 << nb) - 1; ++} ++ + void ssb_chipcommon_init(struct ssb_chipcommon *cc) + { + if (!cc->dev) +@@ -405,8 +423,24 @@ void ssb_chipco_timing_init(struct ssb_c + /* Set chip watchdog reset timer to fire in 'ticks' backplane cycles */ + void ssb_chipco_watchdog_timer_set(struct ssb_chipcommon *cc, u32 ticks) + { +- /* instant NMI */ +- chipco_write32(cc, SSB_CHIPCO_WATCHDOG, ticks); ++ u32 maxt; ++ enum ssb_clkmode clkmode; ++ ++ maxt = ssb_chipco_watchdog_get_max_timer(cc); ++ if (cc->capabilities & SSB_CHIPCO_CAP_PMU) { ++ if (ticks == 1) ++ ticks = 2; ++ else if (ticks > maxt) ++ ticks = maxt; ++ chipco_write32(cc, SSB_CHIPCO_PMU_WATCHDOG, ticks); ++ } else { ++ clkmode = ticks ? SSB_CLKMODE_FAST : SSB_CLKMODE_DYNAMIC; ++ ssb_chipco_set_clockmode(cc, clkmode); ++ if (ticks > maxt) ++ ticks = maxt; ++ /* instant NMI */ ++ chipco_write32(cc, SSB_CHIPCO_WATCHDOG, ticks); ++ } + } + + void ssb_chipco_irq_mask(struct ssb_chipcommon *cc, u32 mask, u32 value) |