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| author | Hauke Mehrtens <hauke@hauke-m.de> | 2013-09-18 14:36:03 +0000 |
|---|---|---|
| committer | Hauke Mehrtens <hauke@hauke-m.de> | 2013-09-18 14:36:03 +0000 |
| commit | 6dd2e9ae2cdb882906bdb2f13546ba831d6b41b1 (patch) | |
| tree | 993b5569d9a4c098c3595a6d83f5d04ad9ef8fe6 /target/linux/brcm47xx/patches-3.10/520-MIPS-BCM47XX-fix-clock-detection-for-BCM5354-with-20.patch | |
| parent | 4c52ed50d73492f1e4a1443a9479abe5c938a552 (diff) | |
| download | upstream-6dd2e9ae2cdb882906bdb2f13546ba831d6b41b1.tar.gz upstream-6dd2e9ae2cdb882906bdb2f13546ba831d6b41b1.tar.bz2 upstream-6dd2e9ae2cdb882906bdb2f13546ba831d6b41b1.zip | |
brcm47xx: update the clock fixes for BCM5354
This updates the patches for BCM5354 to the version send for upstream
Linux inclusion.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
SVN-Revision: 38037
Diffstat (limited to 'target/linux/brcm47xx/patches-3.10/520-MIPS-BCM47XX-fix-clock-detection-for-BCM5354-with-20.patch')
| -rw-r--r-- | target/linux/brcm47xx/patches-3.10/520-MIPS-BCM47XX-fix-clock-detection-for-BCM5354-with-20.patch | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/target/linux/brcm47xx/patches-3.10/520-MIPS-BCM47XX-fix-clock-detection-for-BCM5354-with-20.patch b/target/linux/brcm47xx/patches-3.10/520-MIPS-BCM47XX-fix-clock-detection-for-BCM5354-with-20.patch new file mode 100644 index 0000000000..346e33530b --- /dev/null +++ b/target/linux/brcm47xx/patches-3.10/520-MIPS-BCM47XX-fix-clock-detection-for-BCM5354-with-20.patch @@ -0,0 +1,41 @@ +--- a/arch/mips/bcm47xx/time.c ++++ b/arch/mips/bcm47xx/time.c +@@ -27,10 +27,14 @@ + #include <linux/ssb/ssb.h> + #include <asm/time.h> + #include <bcm47xx.h> ++#include <bcm47xx_nvram.h> + + void __init plat_time_init(void) + { + unsigned long hz = 0; ++ u16 chip_id = 0; ++ char buf[10]; ++ int len; + + /* + * Use deterministic values for initial counter interrupt +@@ -43,15 +47,23 @@ void __init plat_time_init(void) + #ifdef CONFIG_BCM47XX_SSB + case BCM47XX_BUS_TYPE_SSB: + hz = ssb_cpu_clock(&bcm47xx_bus.ssb.mipscore) / 2; ++ chip_id = bcm47xx_bus.ssb.chip_id; + break; + #endif + #ifdef CONFIG_BCM47XX_BCMA + case BCM47XX_BUS_TYPE_BCMA: + hz = bcma_cpu_clock(&bcm47xx_bus.bcma.bus.drv_mips) / 2; ++ chip_id = bcm47xx_bus.bcma.bus.chipinfo.id; + break; + #endif + } + ++ if (chip_id == 0x5354) { ++ len = bcm47xx_nvram_getenv("clkfreq", buf, sizeof(buf)); ++ if (len >= 0 && !strncmp(buf, "200", 4)) ++ hz = 100000000; ++ } ++ + if (!hz) + hz = 100000000; + |