brcm2708: rename all patches from raspberrypi git tree to use 950 prefix

Right now all brcm2708 patches are extracted from the non-mainline
raspberrypi/linux git tree. Many of them are hacks and/or are unneeded
in LEDE. Raspberry Pi is getting better and better mainline support so
it would be nice to finally start maintaining patches in a cleaner way:
1) Backport patches accepted in upstream tree
2) Start using upstream drivers
3) Pick only these patches that are needed for more complete support

Handling above tasks requires grouping patches - ideally using the same
prefixes as generic ones. It means we should rename existing patches to
use some high prefix. This will allow e.g. use 0xx for backported code.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Stijn Tintel <stijn@linux-ipv6.be>

1 files changed, 58 insertions, 0 deletions

diff --git a/target/linux/brcm2708/patches-4.9/950-0171-drm-vc4-Set-up-SCALER_DISPCTRL-at-boot.patch b/target/linux/brcm2708/patches-4.9/950-0171-drm-vc4-Set-up-SCALER_DISPCTRL-at-boot.patch
new file mode 100644
index 0000000000..1a425cac00
--- /dev/null
+++ b/target/linux/brcm2708/patches-4.9/950-0171-drm-vc4-Set-up-SCALER_DISPCTRL-at-boot.patch
@@ -0,0 +1,58 @@
+From e79b86a0c5ccd0e8c16e31b2d494d43e997253d1 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Thu, 15 Sep 2016 15:25:23 +0100
+Subject: [PATCH] drm/vc4: Set up SCALER_DISPCTRL at boot.
+
+We want the HVS on, obviously, and we also want DSP3 (PV1's source) to
+be muxed from HVS channel 2 like we expect in vc4_crtc.c.  The
+firmware wasn't setting the DSP3 mux up when both the LCD and HDMI
+were disabled.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/gpu/drm/vc4/vc4_hvs.c  | 14 ++++++++++++++
+ drivers/gpu/drm/vc4/vc4_regs.h |  3 +++
+ 2 files changed, 17 insertions(+)
+
+--- a/drivers/gpu/drm/vc4/vc4_hvs.c
++++ b/drivers/gpu/drm/vc4/vc4_hvs.c
+@@ -170,6 +170,7 @@ static int vc4_hvs_bind(struct device *d
+ 	struct vc4_dev *vc4 = drm->dev_private;
+ 	struct vc4_hvs *hvs = NULL;
+ 	int ret;
++	u32 dispctrl;
+ 
+ 	hvs = devm_kzalloc(&pdev->dev, sizeof(*hvs), GFP_KERNEL);
+ 	if (!hvs)
+@@ -211,6 +212,19 @@ static int vc4_hvs_bind(struct device *d
+ 		return ret;
+ 
+ 	vc4->hvs = hvs;
++
++	dispctrl = HVS_READ(SCALER_DISPCTRL);
++
++	dispctrl |= SCALER_DISPCTRL_ENABLE;
++
++	/* Set DSP3 (PV1) to use HVS channel 2, which would otherwise
++	 * be unused.
++	 */
++	dispctrl &= ~SCALER_DISPCTRL_DSP3_MUX_MASK;
++	dispctrl |= VC4_SET_FIELD(2, SCALER_DISPCTRL_DSP3_MUX);
++
++	HVS_WRITE(SCALER_DISPCTRL, dispctrl);
++
+ 	return 0;
+ }
+ 
+--- a/drivers/gpu/drm/vc4/vc4_regs.h
++++ b/drivers/gpu/drm/vc4/vc4_regs.h
+@@ -244,6 +244,9 @@
+ # define SCALER_DISPCTRL_ENABLE			BIT(31)
+ # define SCALER_DISPCTRL_DSP2EISLUR		BIT(15)
+ # define SCALER_DISPCTRL_DSP1EISLUR		BIT(14)
++# define SCALER_DISPCTRL_DSP3_MUX_MASK		VC4_MASK(19, 18)
++# define SCALER_DISPCTRL_DSP3_MUX_SHIFT		18
++
+ /* Enables Display 0 short line and underrun contribution to
+  * SCALER_DISPSTAT_IRQDISP0.  Note that short frame contributions are
+  * always enabled.