brcm2708: rename all patches from raspberrypi git tree to use 950 prefix

Right now all brcm2708 patches are extracted from the non-mainline
raspberrypi/linux git tree. Many of them are hacks and/or are unneeded
in LEDE. Raspberry Pi is getting better and better mainline support so
it would be nice to finally start maintaining patches in a cleaner way:
1) Backport patches accepted in upstream tree
2) Start using upstream drivers
3) Pick only these patches that are needed for more complete support

Handling above tasks requires grouping patches - ideally using the same
prefixes as generic ones. It means we should rename existing patches to
use some high prefix. This will allow e.g. use 0xx for backported code.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Stijn Tintel <stijn@linux-ipv6.be>

1 files changed, 83 insertions, 0 deletions

diff --git a/target/linux/brcm2708/patches-4.9/950-0125-BCM270X_DT-Add-spi0-cs-overlay.patch b/target/linux/brcm2708/patches-4.9/950-0125-BCM270X_DT-Add-spi0-cs-overlay.patch
new file mode 100644
index 0000000000..2fd8366f4e
--- /dev/null
+++ b/target/linux/brcm2708/patches-4.9/950-0125-BCM270X_DT-Add-spi0-cs-overlay.patch
@@ -0,0 +1,83 @@
+From 48eea36959fb8d854b4cf1ee4284646be5a279e0 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Mon, 16 Jan 2017 14:53:12 +0000
+Subject: [PATCH] BCM270X_DT: Add spi0-cs overlay
+
+The spi0-cs overlay allows the software chip selectts to be modified
+using the cs0_pin and cs1_pin parameters.
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.org>
+---
+ arch/arm/boot/dts/overlays/Makefile            |  1 +
+ arch/arm/boot/dts/overlays/README              |  9 +++++++-
+ arch/arm/boot/dts/overlays/spi0-cs-overlay.dts | 29 ++++++++++++++++++++++++++
+ 3 files changed, 38 insertions(+), 1 deletion(-)
+ create mode 100644 arch/arm/boot/dts/overlays/spi0-cs-overlay.dts
+
+--- a/arch/arm/boot/dts/overlays/Makefile
++++ b/arch/arm/boot/dts/overlays/Makefile
+@@ -83,6 +83,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
+ 	smi-nand.dtbo \
+ 	spi-gpio35-39.dtbo \
+ 	spi-rtc.dtbo \
++	spi0-cs.dtbo \
+ 	spi0-hw-cs.dtbo \
+ 	spi1-1cs.dtbo \
+ 	spi1-2cs.dtbo \
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -1138,7 +1138,7 @@ Params: <None>
+ 
+ 
+ Name:   spi-gpio35-39
+-Info:   move SPI function block to GPIO 35 to 39
++Info:   Move SPI function block to GPIO 35 to 39
+ Load:   dtoverlay=spi-gpio35-39
+ Params: <None>
+ 
+@@ -1149,6 +1149,13 @@ Load:   dtoverlay=spi-rtc,<param>=<val>
+ Params: pcf2123                 Select the PCF2123 device
+ 
+ 
++Name:   spi0-cs
++Info:   Allows the (software) CS pins for SPI0 to be changed
++Load:   dtoverlay=spi0-cs,<param>=<val>
++Params: cs0_pin                 GPIO pin for CS0 (default 8)
++        cs1_pin                 GPIO pin for CS1 (default 7)
++
++
+ Name:   spi0-hw-cs
+ Info:   Re-enables hardware CS/CE (chip selects) for SPI0
+ Load:   dtoverlay=spi0-hw-cs
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/spi0-cs-overlay.dts
+@@ -0,0 +1,29 @@
++/dts-v1/;
++/plugin/;
++
++
++/ {
++	compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
++
++	fragment@0 {
++		target = <&spi0_cs_pins>;
++		frag0: __overlay__ {
++			brcm,pins = <8 7>;
++		};
++	};
++
++	fragment@1 {
++		target = <&spi0>;
++		frag1: __overlay__ {
++			cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
++			status = "okay";
++		};
++	};
++
++	__overrides__ {
++		cs0_pin  = <&frag0>,"brcm,pins:0",
++			   <&frag1>,"cs-gpios:4";
++		cs1_pin  = <&frag0>,"brcm,pins:4",
++			   <&frag1>,"cs-gpios:16";
++	};
++};