brcm2708: drop 4.9 support

Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>

1 files changed, 0 insertions, 235 deletions

diff --git a/target/linux/brcm2708/patches-4.9/031-v4.10-0001-ARM-dts-bcm283x-Define-standard-pinctrl-groups-in-th.patch b/target/linux/brcm2708/patches-4.9/031-v4.10-0001-ARM-dts-bcm283x-Define-standard-pinctrl-groups-in-th.patch
deleted file mode 100644
index ac9bd2ba03..0000000000
--- a/target/linux/brcm2708/patches-4.9/031-v4.10-0001-ARM-dts-bcm283x-Define-standard-pinctrl-groups-in-th.patch
+++ /dev/null
@@ -1,235 +0,0 @@
-From 21ff843931b2e5a9b628ac56fd0f2e4355890096 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Mon, 19 Sep 2016 10:43:18 +0200
-Subject: [PATCH] ARM: dts: bcm283x: Define standard pinctrl groups in the gpio
- node.
-
-The BCM2835-ARM-Peripherals.pdf documentation specifies what the
-function selects do for the pins, and there are a bunch of obvious
-groupings to be made.  With these created, we'll be able to replace
-bcm2835-rpi.dtsi's main "set all of these pins to alt0" with
-references to specific groups we want enabled.
-
-Also add pinctrl groups for emmc and sdhost.
-
-Based on patches by Eric Anholt, with fixups by Gerd Hoffmann.
-
-Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
-Signed-off-by: Eric Anholt <eric@anholt.net>
-Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
----
- arch/arm/boot/dts/bcm283x.dtsi | 203 +++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 203 insertions(+)
-
---- a/arch/arm/boot/dts/bcm283x.dtsi
-+++ b/arch/arm/boot/dts/bcm283x.dtsi
-@@ -137,6 +137,209 @@
- 
- 			interrupt-controller;
- 			#interrupt-cells = <2>;
-+
-+			/* Defines pin muxing groups according to
-+			 * BCM2835-ARM-Peripherals.pdf page 102.
-+			 *
-+			 * While each pin can have its mux selected
-+			 * for various functions individually, some
-+			 * groups only make sense to switch to a
-+			 * particular function together.
-+			 */
-+			dpi_gpio0: dpi_gpio0 {
-+				brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
-+					     12 13 14 15 16 17 18 19
-+					     20 21 22 23 24 25 26 27>;
-+				brcm,function = <BCM2835_FSEL_ALT2>;
-+			};
-+			emmc_gpio22: emmc_gpio22 {
-+				brcm,pins = <22 23 24 25 26 27>;
-+				brcm,function = <BCM2835_FSEL_ALT3>;
-+			};
-+			emmc_gpio34: emmc_gpio34 {
-+				brcm,pins = <34 35 36 37 38 39>;
-+				brcm,function = <BCM2835_FSEL_ALT3>;
-+				brcm,pull = <BCM2835_PUD_OFF
-+					     BCM2835_PUD_UP
-+					     BCM2835_PUD_UP
-+					     BCM2835_PUD_UP
-+					     BCM2835_PUD_UP
-+					     BCM2835_PUD_UP>;
-+			};
-+			emmc_gpio48: emmc_gpio48 {
-+				brcm,pins = <48 49 50 51 52 53>;
-+				brcm,function = <BCM2835_FSEL_ALT3>;
-+			};
-+
-+			gpclk0_gpio4: gpclk0_gpio4 {
-+				brcm,pins = <4>;
-+				brcm,function = <BCM2835_FSEL_ALT0>;
-+			};
-+			gpclk1_gpio5: gpclk1_gpio5 {
-+				brcm,pins = <5>;
-+				brcm,function = <BCM2835_FSEL_ALT0>;
-+			};
-+			gpclk1_gpio42: gpclk1_gpio42 {
-+				brcm,pins = <42>;
-+				brcm,function = <BCM2835_FSEL_ALT0>;
-+			};
-+			gpclk1_gpio44: gpclk1_gpio44 {
-+				brcm,pins = <44>;
-+				brcm,function = <BCM2835_FSEL_ALT0>;
-+			};
-+			gpclk2_gpio6: gpclk2_gpio6 {
-+				brcm,pins = <6>;
-+				brcm,function = <BCM2835_FSEL_ALT0>;
-+			};
-+			gpclk2_gpio43: gpclk2_gpio43 {
-+				brcm,pins = <43>;
-+				brcm,function = <BCM2835_FSEL_ALT0>;
-+			};
-+
-+			i2c0_gpio0: i2c0_gpio0 {
-+				brcm,pins = <0 1>;
-+				brcm,function = <BCM2835_FSEL_ALT0>;
-+			};
-+			i2c0_gpio32: i2c0_gpio32 {
-+				brcm,pins = <32 34>;
-+				brcm,function = <BCM2835_FSEL_ALT0>;
-+			};
-+			i2c0_gpio44: i2c0_gpio44 {
-+				brcm,pins = <44 45>;
-+				brcm,function = <BCM2835_FSEL_ALT1>;
-+			};
-+			i2c1_gpio2: i2c1_gpio2 {
-+				brcm,pins = <2 3>;
-+				brcm,function = <BCM2835_FSEL_ALT0>;
-+			};
-+			i2c1_gpio44: i2c1_gpio44 {
-+				brcm,pins = <44 45>;
-+				brcm,function = <BCM2835_FSEL_ALT2>;
-+			};
-+			i2c_slave_gpio18: i2c_slave_gpio18 {
-+				brcm,pins = <18 19 20 21>;
-+				brcm,function = <BCM2835_FSEL_ALT3>;
-+			};
-+
-+			jtag_gpio4: jtag_gpio4 {
-+				brcm,pins = <4 5 6 12 13>;
-+				brcm,function = <BCM2835_FSEL_ALT4>;
-+			};
-+			jtag_gpio22: jtag_gpio22 {
-+				brcm,pins = <22 23 24 25 26 27>;
-+				brcm,function = <BCM2835_FSEL_ALT4>;
-+			};
-+
-+			pcm_gpio18: pcm_gpio18 {
-+				brcm,pins = <18 19 20 21>;
-+				brcm,function = <BCM2835_FSEL_ALT0>;
-+			};
-+			pcm_gpio28: pcm_gpio28 {
-+				brcm,pins = <28 29 30 31>;
-+				brcm,function = <BCM2835_FSEL_ALT2>;
-+			};
-+
-+			pwm0_gpio12: pwm0_gpio12 {
-+				brcm,pins = <12>;
-+				brcm,function = <BCM2835_FSEL_ALT0>;
-+			};
-+			pwm0_gpio18: pwm0_gpio18 {
-+				brcm,pins = <18>;
-+				brcm,function = <BCM2835_FSEL_ALT5>;
-+			};
-+			pwm0_gpio40: pwm0_gpio40 {
-+				brcm,pins = <40>;
-+				brcm,function = <BCM2835_FSEL_ALT0>;
-+			};
-+			pwm1_gpio13: pwm1_gpio13 {
-+				brcm,pins = <13>;
-+				brcm,function = <BCM2835_FSEL_ALT0>;
-+			};
-+			pwm1_gpio19: pwm1_gpio19 {
-+				brcm,pins = <19>;
-+				brcm,function = <BCM2835_FSEL_ALT5>;
-+			};
-+			pwm1_gpio41: pwm1_gpio41 {
-+				brcm,pins = <41>;
-+				brcm,function = <BCM2835_FSEL_ALT0>;
-+			};
-+			pwm1_gpio45: pwm1_gpio45 {
-+				brcm,pins = <45>;
-+				brcm,function = <BCM2835_FSEL_ALT0>;
-+			};
-+
-+			sdhost_gpio48: sdhost_gpio48 {
-+				brcm,pins = <48 49 50 51 52 53>;
-+				brcm,function = <BCM2835_FSEL_ALT0>;
-+			};
-+
-+			spi0_gpio7: spi0_gpio7 {
-+				brcm,pins = <7 8 9 10 11>;
-+				brcm,function = <BCM2835_FSEL_ALT0>;
-+			};
-+			spi0_gpio35: spi0_gpio35 {
-+				brcm,pins = <35 36 37 38 39>;
-+				brcm,function = <BCM2835_FSEL_ALT0>;
-+			};
-+			spi1_gpio16: spi1_gpio16 {
-+				brcm,pins = <16 17 18 19 20 21>;
-+				brcm,function = <BCM2835_FSEL_ALT4>;
-+			};
-+			spi2_gpio40: spi2_gpio40 {
-+				brcm,pins = <40 41 42 43 44 45>;
-+				brcm,function = <BCM2835_FSEL_ALT4>;
-+			};
-+
-+			uart0_gpio14: uart0_gpio14 {
-+				brcm,pins = <14 15>;
-+				brcm,function = <BCM2835_FSEL_ALT0>;
-+			};
-+			/* Separate from the uart0_gpio14 group
-+			 * because it conflicts with spi1_gpio16, and
-+			 * people often run uart0 on the two pins
-+			 * without flow contrl.
-+			 */
-+			uart0_ctsrts_gpio16: uart0_ctsrts_gpio16 {
-+				brcm,pins = <16 17>;
-+				brcm,function = <BCM2835_FSEL_ALT3>;
-+			};
-+			uart0_gpio30: uart0_gpio30 {
-+				brcm,pins = <30 31>;
-+				brcm,function = <BCM2835_FSEL_ALT3>;
-+			};
-+			uart0_ctsrts_gpio32: uart0_ctsrts_gpio32 {
-+				brcm,pins = <32 33>;
-+				brcm,function = <BCM2835_FSEL_ALT3>;
-+			};
-+
-+			uart1_gpio14: uart1_gpio14 {
-+				brcm,pins = <14 15>;
-+				brcm,function = <BCM2835_FSEL_ALT5>;
-+			};
-+			uart1_ctsrts_gpio16: uart1_ctsrts_gpio16 {
-+				brcm,pins = <16 17>;
-+				brcm,function = <BCM2835_FSEL_ALT5>;
-+			};
-+			uart1_gpio32: uart1_gpio32 {
-+				brcm,pins = <32 33>;
-+				brcm,function = <BCM2835_FSEL_ALT5>;
-+			};
-+			uart1_ctsrts_gpio30: uart1_ctsrts_gpio30 {
-+				brcm,pins = <30 31>;
-+				brcm,function = <BCM2835_FSEL_ALT5>;
-+			};
-+			uart1_gpio36: uart1_gpio36 {
-+				brcm,pins = <36 37 38 39>;
-+				brcm,function = <BCM2835_FSEL_ALT2>;
-+			};
-+			uart1_gpio40: uart1_gpio40 {
-+				brcm,pins = <40 41>;
-+				brcm,function = <BCM2835_FSEL_ALT5>;
-+			};
-+			uart1_ctsrts_gpio42: uart1_ctsrts_gpio42 {
-+				brcm,pins = <42 43>;
-+				brcm,function = <BCM2835_FSEL_ALT5>;
-+			};
- 		};
- 
- 		uart0: serial@7e201000 {