diff options
| author | Hauke Mehrtens <hauke@hauke-m.de> | 2017-01-13 22:35:45 +0100 |
|---|---|---|
| committer | Hauke Mehrtens <hauke@hauke-m.de> | 2017-01-13 23:05:36 +0100 |
| commit | 5b089e45a649b936d5ce71930adef4fdea8a7875 (patch) | |
| tree | 7a6b53d998046f528dc255d6320f11d74da7ec62 /target/linux/brcm2708/patches-4.4/0345-clk-bcm2835-Mark-the-VPU-clock-as-critical.patch | |
| parent | 619c8fa92209fb1a30d6e68a59a13aaa102a764c (diff) | |
| download | upstream-5b089e45a649b936d5ce71930adef4fdea8a7875.tar.gz upstream-5b089e45a649b936d5ce71930adef4fdea8a7875.tar.bz2 upstream-5b089e45a649b936d5ce71930adef4fdea8a7875.zip | |
kernel: update 4.4 kernel to 4.4.42
Refresh patches on all 4.4 supported platforms.
Compile & run tested: lantiq/xrx200
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Diffstat (limited to 'target/linux/brcm2708/patches-4.4/0345-clk-bcm2835-Mark-the-VPU-clock-as-critical.patch')
| -rw-r--r-- | target/linux/brcm2708/patches-4.4/0345-clk-bcm2835-Mark-the-VPU-clock-as-critical.patch | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target/linux/brcm2708/patches-4.4/0345-clk-bcm2835-Mark-the-VPU-clock-as-critical.patch b/target/linux/brcm2708/patches-4.4/0345-clk-bcm2835-Mark-the-VPU-clock-as-critical.patch index 952ff01678..dcd6db28fa 100644 --- a/target/linux/brcm2708/patches-4.4/0345-clk-bcm2835-Mark-the-VPU-clock-as-critical.patch +++ b/target/linux/brcm2708/patches-4.4/0345-clk-bcm2835-Mark-the-VPU-clock-as-critical.patch @@ -27,7 +27,7 @@ Signed-off-by: Eric Anholt <eric@anholt.net> bool is_vpu_clock; bool is_mash_clock; }; -@@ -1242,7 +1244,7 @@ static struct clk *bcm2835_register_cloc +@@ -1244,7 +1246,7 @@ static struct clk *bcm2835_register_cloc init.parent_names = parents; init.num_parents = data->num_mux_parents; init.name = data->name; @@ -36,7 +36,7 @@ Signed-off-by: Eric Anholt <eric@anholt.net> if (data->is_vpu_clock) { init.ops = &bcm2835_vpu_clock_clk_ops; -@@ -1661,6 +1663,7 @@ static const struct bcm2835_clk_desc clk +@@ -1663,6 +1665,7 @@ static const struct bcm2835_clk_desc clk .div_reg = CM_VPUDIV, .int_bits = 12, .frac_bits = 8, |