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| author | Hauke Mehrtens <hauke@hauke-m.de> | 2017-01-13 22:35:45 +0100 |
|---|---|---|
| committer | Hauke Mehrtens <hauke@hauke-m.de> | 2017-01-13 23:05:36 +0100 |
| commit | 5b089e45a649b936d5ce71930adef4fdea8a7875 (patch) | |
| tree | 7a6b53d998046f528dc255d6320f11d74da7ec62 /target/linux/brcm2708/patches-4.4/0258-clk-bcm2835-expose-raw-clock-registers-via-debugfs.patch | |
| parent | 619c8fa92209fb1a30d6e68a59a13aaa102a764c (diff) | |
| download | upstream-5b089e45a649b936d5ce71930adef4fdea8a7875.tar.gz upstream-5b089e45a649b936d5ce71930adef4fdea8a7875.tar.bz2 upstream-5b089e45a649b936d5ce71930adef4fdea8a7875.zip | |
kernel: update 4.4 kernel to 4.4.42
Refresh patches on all 4.4 supported platforms.
Compile & run tested: lantiq/xrx200
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Diffstat (limited to 'target/linux/brcm2708/patches-4.4/0258-clk-bcm2835-expose-raw-clock-registers-via-debugfs.patch')
| -rw-r--r-- | target/linux/brcm2708/patches-4.4/0258-clk-bcm2835-expose-raw-clock-registers-via-debugfs.patch | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/target/linux/brcm2708/patches-4.4/0258-clk-bcm2835-expose-raw-clock-registers-via-debugfs.patch b/target/linux/brcm2708/patches-4.4/0258-clk-bcm2835-expose-raw-clock-registers-via-debugfs.patch index b61bd04f9a..98f08c2905 100644 --- a/target/linux/brcm2708/patches-4.4/0258-clk-bcm2835-expose-raw-clock-registers-via-debugfs.patch +++ b/target/linux/brcm2708/patches-4.4/0258-clk-bcm2835-expose-raw-clock-registers-via-debugfs.patch @@ -103,7 +103,7 @@ Acked-by: Eric Anholt <eric@anholt.net> }; struct bcm2835_pll_divider { -@@ -1151,6 +1204,26 @@ static int bcm2835_pll_divider_set_rate( +@@ -1153,6 +1206,26 @@ static int bcm2835_pll_divider_set_rate( return 0; } @@ -130,7 +130,7 @@ Acked-by: Eric Anholt <eric@anholt.net> static const struct clk_ops bcm2835_pll_divider_clk_ops = { .is_prepared = bcm2835_pll_divider_is_on, .prepare = bcm2835_pll_divider_on, -@@ -1158,6 +1231,7 @@ static const struct clk_ops bcm2835_pll_ +@@ -1160,6 +1233,7 @@ static const struct clk_ops bcm2835_pll_ .recalc_rate = bcm2835_pll_divider_get_rate, .set_rate = bcm2835_pll_divider_set_rate, .round_rate = bcm2835_pll_divider_round_rate, @@ -138,7 +138,7 @@ Acked-by: Eric Anholt <eric@anholt.net> }; /* -@@ -1399,6 +1473,31 @@ static u8 bcm2835_clock_get_parent(struc +@@ -1401,6 +1475,31 @@ static u8 bcm2835_clock_get_parent(struc return (src & CM_SRC_MASK) >> CM_SRC_SHIFT; } @@ -170,7 +170,7 @@ Acked-by: Eric Anholt <eric@anholt.net> static const struct clk_ops bcm2835_clock_clk_ops = { .is_prepared = bcm2835_clock_is_on, .prepare = bcm2835_clock_on, -@@ -1408,6 +1507,7 @@ static const struct clk_ops bcm2835_cloc +@@ -1410,6 +1509,7 @@ static const struct clk_ops bcm2835_cloc .determine_rate = bcm2835_clock_determine_rate, .set_parent = bcm2835_clock_set_parent, .get_parent = bcm2835_clock_get_parent, @@ -178,7 +178,7 @@ Acked-by: Eric Anholt <eric@anholt.net> }; static int bcm2835_vpu_clock_is_on(struct clk_hw *hw) -@@ -1426,6 +1526,7 @@ static const struct clk_ops bcm2835_vpu_ +@@ -1428,6 +1528,7 @@ static const struct clk_ops bcm2835_vpu_ .determine_rate = bcm2835_clock_determine_rate, .set_parent = bcm2835_clock_set_parent, .get_parent = bcm2835_clock_get_parent, |