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| author | Felix Fietkau <nbd@openwrt.org> | 2008-01-06 19:28:07 +0000 |
|---|---|---|
| committer | Felix Fietkau <nbd@openwrt.org> | 2008-01-06 19:28:07 +0000 |
| commit | 178721f76bf6e298b36f6cbfc725ea3ce689a57c (patch) | |
| tree | 72016cc3537dd7524b206cab8c8d44b197efec1d /target/linux/brcm-2.4/files/arch/mips/bcm947xx/pcibios.c | |
| parent | 563d234596124a2e8a3f8489b8a82bd018ed87a7 (diff) | |
| download | upstream-178721f76bf6e298b36f6cbfc725ea3ce689a57c.tar.gz upstream-178721f76bf6e298b36f6cbfc725ea3ce689a57c.tar.bz2 upstream-178721f76bf6e298b36f6cbfc725ea3ce689a57c.zip | |
update brcm-2.4 to 2.4.35.4, integrate new broadcom system code, update broadcom-wl to a contributed version (v4.150.10.5) - no bcm57xx support yet, will follow shortly
SVN-Revision: 10137
Diffstat (limited to 'target/linux/brcm-2.4/files/arch/mips/bcm947xx/pcibios.c')
| -rw-r--r-- | target/linux/brcm-2.4/files/arch/mips/bcm947xx/pcibios.c | 22 |
1 files changed, 20 insertions, 2 deletions
diff --git a/target/linux/brcm-2.4/files/arch/mips/bcm947xx/pcibios.c b/target/linux/brcm-2.4/files/arch/mips/bcm947xx/pcibios.c index 8c8f6aab59..2d8549623a 100644 --- a/target/linux/brcm-2.4/files/arch/mips/bcm947xx/pcibios.c +++ b/target/linux/brcm-2.4/files/arch/mips/bcm947xx/pcibios.c @@ -25,7 +25,6 @@ #include <typedefs.h> #include <osl.h> -#include <bcmutils.h> #include <sbconfig.h> #include <sbutils.h> #include <hndpci.h> @@ -134,7 +133,7 @@ pcibios_init(void) { ulong flags; - if (!(sbh = sb_kattach())) + if (!(sbh = sb_kattach(SB_OSH))) panic("sb_kattach failed"); spin_lock_init(&sbh_lock); @@ -312,6 +311,25 @@ pcibios_enable_device(struct pci_dev *dev, int mask) writel(0x7FF, (ulong)regs + 0x200); udelay(1); } + /* PRxxxx: War for 5354 failures. */ + if (sb_corerev(sbh) == 1) { + uint32 tmp; + + /* Change Flush control reg */ + tmp = readl((uintptr)regs + 0x400); + tmp &= ~8; + writel(tmp, (uintptr)regs + 0x400); + tmp = readl((uintptr)regs + 0x400); + printk("USB20H fcr: 0x%x\n", tmp); + + /* Change Shim control reg */ + tmp = readl((uintptr)regs + 0x304); + tmp &= ~0x100; + writel(tmp, (uintptr)regs + 0x304); + tmp = readl((uintptr)regs + 0x304); + printk("USB20H shim cr: 0x%x\n", tmp); + } + } else sb_core_reset(sbh, 0, 0); |