bmips: add new target

This target has full device tree support, thus reducing the number of
patches needed for bcm63xx, in which there's a patch for every board.

The intention is to start with a minimal amount of downstream patches and
start upstreaming all of them.

Current status:
 - Enabling EHCI/OHCI on BCM6358 causes a kernel panic.
 - BCM63268 lacks Timer Clocks/Reset support.
 - No PCI/PCIe drivers.
 - No ethernet drivers.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Acked-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>

1 files changed, 427 insertions, 0 deletions

diff --git a/target/linux/bmips/dts/bcm63268.dtsi b/target/linux/bmips/dts/bcm63268.dtsi
new file mode 100644
index 0000000000..be98bf181e
--- /dev/null
+++ b/target/linux/bmips/dts/bcm63268.dtsi
@@ -0,0 +1,427 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+/dts-v1/;
+
+#include <dt-bindings/clock/bcm63268-clock.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/interrupt-controller/bcm63268-interrupt-controller.h>
+#include <dt-bindings/reset/bcm63268-reset.h>
+#include <dt-bindings/soc/bcm63268-pm.h>
+
+/ {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	compatible = "brcm,bcm63268";
+
+	aliases {
+		nflash = &nflash;
+		pinctrl = &pinctrl;
+		serial0 = &uart0;
+		serial1 = &uart1;
+		spi0 = &lsspi;
+		spi1 = &hsspi;
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,115200n8 earlycon";
+		stdout-path = "serial0:115200n8";
+	};
+
+	clocks {
+		periph_osc: periph-osc {
+			compatible = "fixed-clock";
+
+			#clock-cells = <0>;
+
+			clock-frequency = <50000000>;
+			clock-output-names = "periph";
+		};
+
+		hsspi_osc: hsspi-osc {
+			compatible = "fixed-clock";
+
+			#clock-cells = <0>;
+
+			clock-frequency = <400000000>;
+			clock-output-names = "hsspi_osc";
+		};
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		mips-hpt-frequency = <200000000>;
+
+		cpu@0 {
+			compatible = "brcm,bmips4350", "mips,mips4Kc";
+			device_type = "cpu";
+			reg = <0>;
+		};
+
+		cpu@1 {
+			compatible = "brcm,bmips4350", "mips,mips4Kc";
+			device_type = "cpu";
+			reg = <1>;
+		};
+	};
+
+	cpu_intc: interrupt-controller {
+		#address-cells = <0>;
+		compatible = "mti,cpu-interrupt-controller";
+
+		interrupt-controller;
+		#interrupt-cells = <1>;
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0 0>;
+	};
+
+	ubus {
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		compatible = "simple-bus";
+		ranges;
+
+		periph_clk: clock-controller@10000004 {
+			compatible = "brcm,bcm63268-clocks";
+			reg = <0x10000004 0x4>;
+			#clock-cells = <1>;
+		};
+
+		pll_cntl: syscon@10000008 {
+			compatible = "syscon";
+			reg = <0x10000008 0x4>;
+			native-endian;
+		};
+
+		syscon-reboot {
+			compatible = "syscon-reboot";
+			regmap = <&pll_cntl>;
+			offset = <0x0>;
+			mask = <0x1>;
+		};
+
+		periph_rst: reset-controller@10000010 {
+			compatible = "brcm,bcm6345-reset";
+			reg = <0x10000010 0x4>;
+			#reset-cells = <1>;
+		};
+
+		ext_intc: interrupt-controller@10000018 {
+			#address-cells = <1>;
+			compatible = "brcm,bcm6345-ext-intc";
+			reg = <0x10000018 0x4>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+
+			interrupts = <BCM63268_IRQ_EXT0>,
+				     <BCM63268_IRQ_EXT1>,
+				     <BCM63268_IRQ_EXT2>,
+				     <BCM63268_IRQ_EXT3>;
+		};
+
+		periph_intc: interrupt-controller@10000020 {
+			#address-cells = <1>;
+			compatible = "brcm,bcm6345-l1-intc";
+			reg = <0x10000020 0x20>,
+			      <0x10000040 0x20>;
+
+			interrupt-controller;
+			#interrupt-cells = <1>;
+
+			interrupt-parent = <&cpu_intc>;
+			interrupts = <2>, <3>;
+		};
+
+		wdt: watchdog@1000009c {
+			compatible = "brcm,bcm7038-wdt";
+			reg = <0x1000009c 0xc>;
+
+			clocks = <&periph_osc>;
+
+			timeout-sec = <30>;
+		};
+
+		pinctrl: pin-controller@100000c0 {
+			compatible = "brcm,bcm63268-pinctrl";
+			reg = <0x100000c0 0x8>,
+			      <0x100000c8 0x8>,
+			      <0x100000d0 0x4>,
+			      <0x100000d8 0x4>,
+			      <0x100000dc 0x4>,
+			      <0x100000f8 0x4>;
+			reg-names = "dirout", "dat", "led", "mode",
+				    "ctrl", "basemode";
+
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-parent = <&ext_intc>;
+			interrupts = <0 0>, <1 0>, <2 0>, <3 0>;
+			interrupt-names = "gpio32", "gpio33", "gpio34", "gpio35";
+
+			pinctrl_serial_led: serial_led {
+				pinctrl_serial_led_clk: serial_led_clk {
+					function = "serial_led_clk";
+					pins = "gpio0";
+				};
+
+				pinctrl_serial_led_data: serial_led_data {
+					function = "serial_led_data";
+					pins = "gpio1";
+				};
+			};
+
+			pinctrl_hsspi_cs4: hsspi_cs4 {
+				function = "hsspi_cs4";
+				pins = "gpio16";
+			};
+
+			pinctrl_hsspi_cs5: hsspi_cs5 {
+				function = "hsspi_cs5";
+				pins = "gpio17";
+			};
+
+			pinctrl_hsspi_cs6: hsspi_cs6 {
+				function = "hsspi_cs6";
+				pins = "gpio8";
+			};
+
+			pinctrl_hsspi_cs7: hsspi_cs7 {
+				function = "hsspi_cs7";
+				pins = "gpio9";
+			};
+
+			pinctrl_adsl_spi: adsl_spi {
+				pinctrl_adsl_spi_miso: adsl_spi_miso {
+					function = "adsl_spi_miso";
+					pins = "gpio18";
+				};
+
+				pinctrl_adsl_spi_mosi: adsl_spi_mosi {
+					function = "adsl_spi_mosi";
+					pins = "gpio19";
+				};
+			};
+
+			pinctrl_vreq_clk: vreq_clk {
+				function = "vreq_clk";
+				pins = "gpio22";
+			};
+
+			pinctrl_pcie_clkreq_b: pcie_clkreq_b {
+				function = "pcie_clkreq_b";
+				pins = "gpio23";
+			};
+
+			pinctrl_robosw_led_clk: robosw_led_clk {
+				function = "robosw_led_clk";
+				pins = "gpio30";
+			};
+
+			pinctrl_robosw_led_data: robosw_led_data {
+				function = "robosw_led_data";
+				pins = "gpio31";
+			};
+
+			pinctrl_nand: nand {
+				function = "nand";
+				group = "nand_grp";
+			};
+
+			pinctrl_gpio35_alt: gpio35_alt {
+				function = "gpio35_alt";
+				pin = "gpio35";
+			};
+
+			pinctrl_dectpd: dectpd {
+				function = "dectpd";
+				group = "dectpd_grp";
+			};
+
+			pinctrl_vdsl_phy_override_0: vdsl_phy_override_0 {
+				function = "vdsl_phy_override_0";
+				group = "vdsl_phy_override_0_grp";
+			};
+
+			pinctrl_vdsl_phy_override_1: vdsl_phy_override_1 {
+				function = "vdsl_phy_override_1";
+				group = "vdsl_phy_override_1_grp";
+			};
+
+			pinctrl_vdsl_phy_override_2: vdsl_phy_override_2 {
+				function = "vdsl_phy_override_2";
+				group = "vdsl_phy_override_2_grp";
+			};
+
+			pinctrl_vdsl_phy_override_3: vdsl_phy_override_3 {
+				function = "vdsl_phy_override_3";
+				group = "vdsl_phy_override_3_grp";
+			};
+
+			pinctrl_dsl_gpio8: dsl_gpio8 {
+				function = "dsl_gpio8";
+				group = "dsl_gpio8";
+			};
+
+			pinctrl_dsl_gpio9: dsl_gpio9 {
+				function = "dsl_gpio9";
+				group = "dsl_gpio9";
+			};
+		};
+
+		uart0: serial@10000180 {
+			compatible = "brcm,bcm6345-uart";
+			reg = <0x10000180 0x18>;
+
+			interrupt-parent = <&periph_intc>;
+			interrupts = <BCM63268_IRQ_UART0>;
+
+			clocks = <&periph_osc>;
+			clock-names = "periph";
+
+			status = "disabled";
+		};
+
+		uart1: serial@100001a0 {
+			compatible = "brcm,bcm6345-uart";
+			reg = <0x100001a0 0x18>;
+
+			interrupt-parent = <&periph_intc>;
+			interrupts = <BCM63268_IRQ_UART1>;
+
+			clocks = <&periph_osc>;
+			clock-names = "periph";
+
+			status = "disabled";
+		};
+
+		nflash: nand@10000200 {
+			compatible = "brcm,nand-bcm6368",
+				     "brcm,brcmnand-v4.0",
+				     "brcm,brcmnand";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x10000200 0x180>,
+			      <0x10000600 0x200>,
+			      <0x100000b0 0x10>;
+			reg-names = "nand",
+				    "nand-cache",
+				    "nand-int-base";
+
+			interrupt-parent = <&periph_intc>;
+			interrupts = <BCM63268_IRQ_NAND>;
+
+			clocks = <&periph_clk BCM63268_CLK_NAND>;
+			clock-names = "nand";
+
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_nand>;
+
+			status = "disabled";
+		};
+
+		lsspi: spi@10000800 {
+			compatible = "brcm,bcm6358-spi";
+			reg = <0x10000800 0x70c>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			interrupt-parent = <&periph_intc>;
+			interrupts = <BCM63268_IRQ_LSSPI>;
+
+			clocks = <&periph_clk BCM63268_CLK_SPI>;
+			clock-names = "spi";
+
+			resets = <&periph_rst BCM63268_RST_SPI>;
+
+			status = "disabled";
+		};
+
+		hsspi: spi@10001000 {
+			compatible = "brcm,bcm6328-hsspi";
+			reg = <0x10001000 0x600>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			interrupt-parent = <&periph_intc>;
+			interrupts = <BCM63268_IRQ_HSSPI>;
+
+			clocks = <&periph_clk BCM63268_CLK_HSSPI>,
+				 <&hsspi_osc>;
+			clock-names = "hsspi",
+				      "pll";
+
+			resets = <&periph_rst BCM63268_RST_SPI>;
+
+			status = "disabled";
+		};
+
+		periph_pwr: power-controller@1000184c {
+			compatible = "brcm,bcm63268-power-controller";
+			reg = <0x1000184c 0x4>;
+			#power-domain-cells = <1>;
+		};
+
+		leds: led-controller@10001900 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "brcm,bcm6328-leds";
+			reg = <0x10001900 0x24>;
+
+			status = "disabled";
+		};
+
+		ehci: usb@10002500 {
+			compatible = "brcm,bcm63268-ehci", "generic-ehci";
+			reg = <0x10002500 0x100>;
+			big-endian;
+			ignore-oc;
+
+			interrupt-parent = <&periph_intc>;
+			interrupts = <BCM63268_IRQ_EHCI>;
+
+			phys = <&usbh 0>;
+			phy-names = "usb";
+
+			status = "disabled";
+		};
+
+		ohci: usb@10002600 {
+			compatible = "brcm,bcm63268-ohci", "generic-ohci";
+			reg = <0x10002600 0x100>;
+			big-endian;
+			no-big-frame-no;
+
+			interrupt-parent = <&periph_intc>;
+			interrupts = <BCM63268_IRQ_OHCI>;
+
+			phys = <&usbh 0>;
+			phy-names = "usb";
+
+			status = "disabled";
+		};
+
+		usbh: usb-phy@10002700 {
+			compatible = "brcm,bcm63268-usbh-phy";
+			reg = <0x10002700 0x38>;
+
+			#phy-cells = <1>;
+
+			clocks = <&periph_clk BCM63268_CLK_USBH>;
+			/* FIXME! <&timer_clk BCM63268_TCLK_USB_REF> */
+			clock-names = "usbh";
+			/* FIXME! usb_ref */
+
+			power-domains = <&periph_pwr BCM63268_POWER_DOMAIN_USBH>;
+			resets = <&periph_rst BCM63268_RST_USBH>;
+
+			status = "disabled";
+		};
+	};
+};