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author | Tomasz Maciej Nowak <tmn505@gmail.com> | 2021-07-12 18:16:30 +0200 |
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committer | Hauke Mehrtens <hauke@hauke-m.de> | 2021-09-09 21:21:11 +0200 |
commit | 601864c09eae5b22620bc7942ceae13c2f081f1e (patch) | |
tree | 09022c9cf11649cf65ce7bb0f3a6e84efc55ec75 /target/linux/bcm53xx/patches-5.4 | |
parent | 6f8143fa4af42144d2856fc3572c21bc6a50e4af (diff) | |
download | upstream-601864c09eae5b22620bc7942ceae13c2f081f1e.tar.gz upstream-601864c09eae5b22620bc7942ceae13c2f081f1e.tar.bz2 upstream-601864c09eae5b22620bc7942ceae13c2f081f1e.zip |
mvebu: limit mvneta tx queue workaround to 32 bit SoC
This patch has been carried since introduction throughout every kernel
major bump and no one has tested if the later kernels improved the
situation. The Armada 3720 SoC can only process GbE interrupts on Core 0
and this is already limited in all stable kernels, so ditch this
workaround for 64 bit SoCs.
Ref: https://git.kernel.org/torvalds/c/cf9bf871280d
Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
(cherry picked from commit cbdd2b62e4d5e0572204c37d874d32dc8610840e)
Diffstat (limited to 'target/linux/bcm53xx/patches-5.4')
0 files changed, 0 insertions, 0 deletions