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authorZoltan HERPAI <wigyori@uid0.hu>2018-12-16 11:05:58 +0100
committerZoltan HERPAI <wigyori@uid0.hu>2023-06-14 09:22:08 +0200
commit4a281a778999776b9e4c86288152630c6d3db27b (patch)
tree7f794853815f4c6effcaef1587c2b6cb9eb145d1 /target/linux/bcm53xx/patches-5.15/031-v5.17-0007-ARM-dts-NSP-Fixed-iProc-PCIe-MSI-sub-node.patch
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sifiveu: add new target for SiFive U-based boards
RISC-V is a new CPU architecture aimed to be fully free and open. This target will add support for it, based on 5.15. Supports running on: - HiFive Unleashed - FU540, first generation - HiFive Unmatched - FU740, current latest generation, PCIe SD-card images are generated, where the partitions are required to have specific type codes. As it is commonplace nowadays, OpenSBI is used as the first stage, with U-boot following as the proper bootloader. Specifications: HiFive Unleashed: - CPU: SiFive FU540 quad-core RISC-V (U54, RV64IMAFDC or RV64GC) - Memory: 8Gb - Ethernet: 1x 10/100/1000 - Console: via microUSB HiFive Unmatched: - CPU: SiFive FU740 quad-core RISC-V (U74, RV64IMAFDCB or RV64GCB) - Memory: 16Gb - Ethernet: 1x 10/100/1000 - USB: 4x USB 3.2 - PCIe: - 1x PCIe Gen3 x8 - 1x M.2 key M (PCIe x4) - 1x M.2 Key E (PCIe x1 / USB2.0) - Console: via microUSB Installation: Standard SD-card installation via dd-ing the generated image to an SD-card of at least 256Mb. Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu> (cherry picked from commit a3469a90c47edd94daae6a23b810b74cd8389ce3)
Diffstat (limited to 'target/linux/bcm53xx/patches-5.15/031-v5.17-0007-ARM-dts-NSP-Fixed-iProc-PCIe-MSI-sub-node.patch')
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