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authorJohn Audia <graysky@archlinux.us>2021-12-01 06:28:02 -0500
committerHauke Mehrtens <hauke@hauke-m.de>2021-12-12 21:11:30 +0100
commit6c945fa379a1b59e6b439b0f6ffba4cbd3ca04d3 (patch)
treec6a821be172fa7841d6c989c76f7763aba63bbd0 /target/linux/bcm53xx/patches-5.10/033-v5.16-0024-ARM-dts-BCM5301X-Fix-I2C-controller-interrupt.patch
parenta725bdc700c9a63666ce1ef9fec1b2a65216576f (diff)
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kernel: bump 5.10 to 5.10.83
Removed upstreamed: bcm53xx/patches-5.10/033-v5.16-0024-ARM-dts-BCM5301X-Fix-I2C-controller-interrupt.patch[1] bcm53xx/patches-5.10/033-v5.16-0025-ARM-dts-BCM5301X-Add-interrupt-properties-to-GPIO-no.patch[2] All other patches automatically rebased. 1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.10.83&id=b2cd6fdcbe0a5cb44e4610a08cc58261d494a885 2. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.10.83&id=9db1d4a3c2700e1cc84c3d61199411d75c2a3ec6 Build system: x86_64* Build-tested: bcm2711/RPi4B, ipq806x/R7800† Run-tested: bcm2711/RPi4B, ipq806x/R7800† * Had to revert 7c99085bd69742f66207d61e9f2da5ec4f8f9d2f in order to build (latest bump of ca-certificates) † Had to revert 7f1edbd41295dff9f2127b169fbc086c0fb2c14e in order to build (binutils 2.37, https://bugs.openwrt.org/index.php?do=details&task_id=4149) Signed-off-by: John Audia <graysky@archlinux.us>
Diffstat (limited to 'target/linux/bcm53xx/patches-5.10/033-v5.16-0024-ARM-dts-BCM5301X-Fix-I2C-controller-interrupt.patch')
-rw-r--r--target/linux/bcm53xx/patches-5.10/033-v5.16-0024-ARM-dts-BCM5301X-Fix-I2C-controller-interrupt.patch29
1 files changed, 0 insertions, 29 deletions
diff --git a/target/linux/bcm53xx/patches-5.10/033-v5.16-0024-ARM-dts-BCM5301X-Fix-I2C-controller-interrupt.patch b/target/linux/bcm53xx/patches-5.10/033-v5.16-0024-ARM-dts-BCM5301X-Fix-I2C-controller-interrupt.patch
deleted file mode 100644
index 36ac748af0..0000000000
--- a/target/linux/bcm53xx/patches-5.10/033-v5.16-0024-ARM-dts-BCM5301X-Fix-I2C-controller-interrupt.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 6e238362b9793bf334c9bed2291b571cbbc75b0b Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <f.fainelli@gmail.com>
-Date: Wed, 27 Oct 2021 12:37:29 -0700
-Subject: [PATCH] ARM: dts: BCM5301X: Fix I2C controller interrupt
-
-The I2C interrupt controller line is off by 32 because the datasheet
-describes interrupt inputs into the GIC which are for Shared Peripheral
-Interrupts and are starting at offset 32. The ARM GIC binding expects
-the SPI interrupts to be numbered from 0 relative to the SPI base.
-
-Fixes: bb097e3e0045 ("ARM: dts: BCM5301X: Add I2C support to the DT")
-Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
-Tested-by: Christian Lamparter <chunkeey@gmail.com>
-Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
----
- arch/arm/boot/dts/bcm5301x.dtsi | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/arch/arm/boot/dts/bcm5301x.dtsi
-+++ b/arch/arm/boot/dts/bcm5301x.dtsi
-@@ -408,7 +408,7 @@
- i2c0: i2c@18009000 {
- compatible = "brcm,iproc-i2c";
- reg = <0x18009000 0x50>;
-- interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
-+ interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- clock-frequency = <100000>;