bcm53xx: backport the latest upstream DT changes

This includes:
1. BCM5301X changes from 5.14 and queued 5.15 stuff
2. NSP changes from 5.11 - 5.15 for kernel 5.10

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>

1 files changed, 340 insertions, 0 deletions

diff --git a/target/linux/bcm53xx/patches-5.10/033-v5.15-0008-ARM-dts-NSP-Add-DT-files-for-Meraki-MX64-series.patch b/target/linux/bcm53xx/patches-5.10/033-v5.15-0008-ARM-dts-NSP-Add-DT-files-for-Meraki-MX64-series.patch
new file mode 100644
index 0000000000..ffdd64fb59
--- /dev/null
+++ b/target/linux/bcm53xx/patches-5.10/033-v5.15-0008-ARM-dts-NSP-Add-DT-files-for-Meraki-MX64-series.patch
@@ -0,0 +1,340 @@
+From 3f902645280baf0d7dab57c227cc14f43edb45ef Mon Sep 17 00:00:00 2001
+From: Matthew Hagan <mnhagan88@gmail.com>
+Date: Fri, 6 Aug 2021 21:44:34 +0100
+Subject: [PATCH] ARM: dts: NSP: Add DT files for Meraki MX64 series
+
+MX64 & MX64W Hardware info:
+  - CPU: Broadcom BCM58625 Cortex A9 @ 1200Mhz
+  - RAM: 2 GB (4 x 4Gb SK Hynix H5TC4G83CFR)
+  - Storage: 1 GB (Micron MT29F8G08ABACA)
+  - Networking: BCM58625 internal switch (5x 1GbE ports)
+  - USB: 1x USB2.0
+  - Serial: Internal header
+  - WLAN(MX64W only): 2x Broadcom BCM43520KMLG on the PCI bus
+
+This patch adds the Meraki MX64 series-specific bindings. Since some
+devices make use of the older A0 SoC, changes need to be made to
+accommodate this case, including removal of coherency options and
+modification to the secondary-boot-reg.
+
+Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm/boot/dts/Makefile                    |   4 +
+ .../boot/dts/bcm958625-meraki-kingpin.dtsi    | 163 ++++++++++++++++++
+ .../arm/boot/dts/bcm958625-meraki-mx64-a0.dts |  25 +++
+ arch/arm/boot/dts/bcm958625-meraki-mx64.dts   |  24 +++
+ .../boot/dts/bcm958625-meraki-mx64w-a0.dts    |  33 ++++
+ arch/arm/boot/dts/bcm958625-meraki-mx64w.dts  |  32 ++++
+ 6 files changed, 281 insertions(+)
+ create mode 100644 arch/arm/boot/dts/bcm958625-meraki-kingpin.dtsi
+ create mode 100644 arch/arm/boot/dts/bcm958625-meraki-mx64-a0.dts
+ create mode 100644 arch/arm/boot/dts/bcm958625-meraki-mx64.dts
+ create mode 100644 arch/arm/boot/dts/bcm958625-meraki-mx64w-a0.dts
+ create mode 100644 arch/arm/boot/dts/bcm958625-meraki-mx64w.dts
+
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -158,6 +158,10 @@ dtb-$(CONFIG_ARCH_BCM_NSP) += \
+ 	bcm958525xmc.dtb \
+ 	bcm958622hr.dtb \
+ 	bcm958623hr.dtb \
++	bcm958625-meraki-mx64.dtb \
++	bcm958625-meraki-mx64-a0.dtb \
++	bcm958625-meraki-mx64w.dtb \
++	bcm958625-meraki-mx64w-a0.dtb \
+ 	bcm958625hr.dtb \
+ 	bcm988312hr.dtb \
+ 	bcm958625k.dtb
+--- /dev/null
++++ b/arch/arm/boot/dts/bcm958625-meraki-kingpin.dtsi
+@@ -0,0 +1,163 @@
++// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
++/*
++ * Device Tree Bindings for Cisco Meraki MX64 series (Kingpin).
++ *
++ * Copyright (C) 2020-2021 Matthew Hagan <mnhagan88@gmail.com>
++ */
++
++#include "bcm958625-meraki-mx6x-common.dtsi"
++
++/ {
++
++	keys {
++		compatible = "gpio-keys-polled";
++		autorepeat;
++		poll-interval = <20>;
++
++		reset {
++			label = "reset";
++			linux,code = <KEY_RESTART>;
++			gpios = <&gpioa 6 GPIO_ACTIVE_LOW>;
++		};
++	};
++
++	leds {
++		compatible = "gpio-leds";
++
++		led-0 {
++			/* green:lan1-left */
++			function = LED_FUNCTION_ACTIVITY;
++			function-enumerator = <0>;
++			color = <LED_COLOR_ID_GREEN>;
++			gpios = <&gpioa 19 GPIO_ACTIVE_LOW>;
++		};
++
++		led-1 {
++			/* green:lan1-right */
++			function = LED_FUNCTION_ACTIVITY;
++			function-enumerator = <1>;
++			color = <LED_COLOR_ID_GREEN>;
++			gpios = <&gpioa 18 GPIO_ACTIVE_LOW>;
++		};
++
++		led-2 {
++			/* green:lan2-left */
++			function = LED_FUNCTION_ACTIVITY;
++			function-enumerator = <2>;
++			color = <LED_COLOR_ID_GREEN>;
++			gpios = <&gpioa 24 GPIO_ACTIVE_LOW>;
++		};
++
++		led-3 {
++			/* green:lan2-right */
++			function = LED_FUNCTION_ACTIVITY;
++			function-enumerator = <3>;
++			color = <LED_COLOR_ID_GREEN>;
++			gpios = <&gpioa 20 GPIO_ACTIVE_LOW>;
++		};
++
++		led-4 {
++			/* green:lan3-left */
++			function = LED_FUNCTION_ACTIVITY;
++			function-enumerator = <4>;
++			color = <LED_COLOR_ID_GREEN>;
++			gpios = <&gpioa 26 GPIO_ACTIVE_LOW>;
++		};
++
++		led-5 {
++			/* green:lan3-right */
++			function = LED_FUNCTION_ACTIVITY;
++			function-enumerator = <5>;
++			color = <LED_COLOR_ID_GREEN>;
++			gpios = <&gpioa 25 GPIO_ACTIVE_LOW>;
++		};
++
++		led-6 {
++			/* green:lan4-left */
++			function = LED_FUNCTION_ACTIVITY;
++			function-enumerator = <6>;
++			color = <LED_COLOR_ID_GREEN>;
++			gpios = <&gpioa 28 GPIO_ACTIVE_LOW>;
++		};
++
++		led-7 {
++			/* green:lan4-right */
++			function = LED_FUNCTION_ACTIVITY;
++			function-enumerator = <7>;
++			color = <LED_COLOR_ID_GREEN>;
++			gpios = <&gpioa 27 GPIO_ACTIVE_LOW>;
++		};
++
++		led-8 {
++			/* green:wan-left */
++			function = LED_FUNCTION_ACTIVITY;
++			function-enumerator = <8>;
++			color = <LED_COLOR_ID_GREEN>;
++			gpios = <&gpioa 30 GPIO_ACTIVE_LOW>;
++		};
++
++		led-9 {
++			/* green:wan-right */
++			function = LED_FUNCTION_ACTIVITY;
++			function-enumerator = <9>;
++			color = <LED_COLOR_ID_GREEN>;
++			gpios = <&gpioa 29 GPIO_ACTIVE_LOW>;
++		};
++
++		led-a {
++			/* amber:power */
++			function = LED_FUNCTION_POWER;
++			color = <LED_COLOR_ID_AMBER>;
++			gpios = <&gpioa 0 GPIO_ACTIVE_LOW>;
++			default-state = "on";
++		};
++
++		led-b {
++			/* white:status */
++			function = LED_FUNCTION_STATUS;
++			color = <LED_COLOR_ID_WHITE>;
++			gpios = <&gpioa 31 GPIO_ACTIVE_HIGH>;
++		};
++	};
++};
++
++&srab {
++	compatible = "brcm,bcm58625-srab", "brcm,nsp-srab";
++	status = "okay";
++
++	ports {
++		port@0 {
++			label = "lan1";
++			reg = <0>;
++		};
++
++		port@1 {
++			label = "lan2";
++			reg = <1>;
++		};
++
++		port@2 {
++			label = "lan3";
++			reg = <2>;
++		};
++
++		port@3 {
++			label = "lan4";
++			reg = <3>;
++		};
++
++		port@4 {
++			label = "wan";
++			reg = <4>;
++		};
++
++		port@8 {
++			ethernet = <&amac2>;
++			reg = <8>;
++			fixed-link {
++				speed = <1000>;
++				full-duplex;
++			};
++		};
++	};
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/bcm958625-meraki-mx64-a0.dts
+@@ -0,0 +1,25 @@
++// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
++/*
++ * Device Tree Bindings for Cisco Meraki MX64 with A0 SoC.
++ *
++ * Copyright (C) 2020-2021 Matthew Hagan <mnhagan88@gmail.com>
++ */
++
++/dts-v1/;
++
++#include "bcm958625-meraki-kingpin.dtsi"
++#include "bcm-nsp-ax.dtsi"
++
++/ {
++	model = "Cisco Meraki MX64(A0)";
++	compatible = "meraki,mx64-a0", "brcm,bcm58625", "brcm,nsp";
++
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
++	memory@60000000 {
++		device_type = "memory";
++		reg = <0x60000000 0x80000000>;
++	};
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/bcm958625-meraki-mx64.dts
+@@ -0,0 +1,24 @@
++// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
++/*
++ * Device Tree Bindings for Cisco Meraki MX64 with B0+ SoC.
++ *
++ * Copyright (C) 2020-2021 Matthew Hagan <mnhagan88@gmail.com>
++ */
++
++/dts-v1/;
++
++#include "bcm958625-meraki-kingpin.dtsi"
++
++/ {
++	model = "Cisco Meraki MX64";
++	compatible = "meraki,mx64", "brcm,bcm58625", "brcm,nsp";
++
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
++	memory@60000000 {
++		device_type = "memory";
++		reg = <0x60000000 0x80000000>;
++	};
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/bcm958625-meraki-mx64w-a0.dts
+@@ -0,0 +1,33 @@
++// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
++/*
++ * Device Tree Bindings for Cisco Meraki MX64W with A0 SoC.
++ *
++ * Copyright (C) 2020-2021 Matthew Hagan <mnhagan88@gmail.com>
++ */
++
++/dts-v1/;
++
++#include "bcm958625-meraki-kingpin.dtsi"
++#include "bcm-nsp-ax.dtsi"
++
++/ {
++	model = "Cisco Meraki MX64W(A0)";
++	compatible = "meraki,mx64w-a0", "brcm,bcm58625", "brcm,nsp";
++
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
++	memory@60000000 {
++		device_type = "memory";
++		reg = <0x60000000 0x80000000>;
++	};
++};
++
++&pcie0 {
++	status = "okay";
++};
++
++&pcie1 {
++	status = "okay";
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/bcm958625-meraki-mx64w.dts
+@@ -0,0 +1,32 @@
++// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
++/*
++ * Device Tree Bindings for Cisco Meraki MX64W with B0+ SoC.
++ *
++ * Copyright (C) 2020-2021 Matthew Hagan <mnhagan88@gmail.com>
++ */
++
++/dts-v1/;
++
++#include "bcm958625-meraki-kingpin.dtsi"
++
++/ {
++	model = "Cisco Meraki MX64W";
++	compatible = "meraki,mx64w", "brcm,bcm58625", "brcm,nsp";
++
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
++	memory@60000000 {
++		device_type = "memory";
++		reg = <0x60000000 0x80000000>;
++	};
++};
++
++&pcie0 {
++	status = "okay";
++};
++
++&pcie1 {
++	status = "okay";
++};