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| author | Felix Fietkau <nbd@nbd.name> | 2018-04-09 09:50:23 +0200 |
|---|---|---|
| committer | Felix Fietkau <nbd@nbd.name> | 2018-04-27 15:19:19 +0200 |
| commit | 1de74df8b9bbaafd147a2380fa306140b79b60d9 (patch) | |
| tree | 2608f98d6239a058cb8401c7ffd7271f93bd7658 /target/linux/bcm53xx/patches-4.4 | |
| parent | 50b09196282eff24e19541003dfcb248d616006e (diff) | |
| download | upstream-1de74df8b9bbaafd147a2380fa306140b79b60d9.tar.gz upstream-1de74df8b9bbaafd147a2380fa306140b79b60d9.tar.bz2 upstream-1de74df8b9bbaafd147a2380fa306140b79b60d9.zip | |
bcm53xx: drop linux 4.4 and 4.9 support
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Diffstat (limited to 'target/linux/bcm53xx/patches-4.4')
114 files changed, 0 insertions, 14214 deletions
diff --git a/target/linux/bcm53xx/patches-4.4/020-ARM-BCM5301X-remove-workaround-imprecise-abort-fault.patch b/target/linux/bcm53xx/patches-4.4/020-ARM-BCM5301X-remove-workaround-imprecise-abort-fault.patch deleted file mode 100644 index 30acc8c311..0000000000 --- a/target/linux/bcm53xx/patches-4.4/020-ARM-BCM5301X-remove-workaround-imprecise-abort-fault.patch +++ /dev/null @@ -1,68 +0,0 @@ -From 937b12306ea79044c86f2e69b3061c7279245825 Mon Sep 17 00:00:00 2001 -From: Lucas Stach <l.stach@pengutronix.de> -Date: Thu, 15 Oct 2015 12:32:22 +0200 -Subject: [PATCH] ARM: BCM5301X: remove workaround imprecise abort fault - handler - -This is not needed anymore. Handling a potentially pending imprecise external -abort left behind by the bootloader is now done in a slightly safer way inside -the common ARM startup code. - -Signed-off-by: Lucas Stach <l.stach@pengutronix.de> -Acked-by: Hauke Mehrtens <hauke@hauke-m.de> -Tested-by: Tyler Baker <tyler.baker@linaro.org> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/mach-bcm/bcm_5301x.c | 35 ----------------------------------- - 1 file changed, 35 deletions(-) - ---- a/arch/arm/mach-bcm/bcm_5301x.c -+++ b/arch/arm/mach-bcm/bcm_5301x.c -@@ -9,40 +9,6 @@ - #include <asm/hardware/cache-l2x0.h> - - #include <asm/mach/arch.h> --#include <asm/siginfo.h> --#include <asm/signal.h> -- -- --static bool first_fault = true; -- --static int bcm5301x_abort_handler(unsigned long addr, unsigned int fsr, -- struct pt_regs *regs) --{ -- if ((fsr == 0x1406 || fsr == 0x1c06) && first_fault) { -- first_fault = false; -- -- /* -- * These faults with codes 0x1406 (BCM4709) or 0x1c06 happens -- * for no good reason, possibly left over from the CFE boot -- * loader. -- */ -- pr_warn("External imprecise Data abort at addr=%#lx, fsr=%#x ignored.\n", -- addr, fsr); -- -- /* Returning non-zero causes fault display and panic */ -- return 0; -- } -- -- /* Others should cause a fault */ -- return 1; --} -- --static void __init bcm5301x_init_early(void) --{ -- /* Install our hook */ -- hook_fault_code(16 + 6, bcm5301x_abort_handler, SIGBUS, BUS_OBJERR, -- "imprecise external abort"); --} - - static const char *const bcm5301x_dt_compat[] __initconst = { - "brcm,bcm4708", -@@ -52,6 +18,5 @@ static const char *const bcm5301x_dt_com - DT_MACHINE_START(BCM5301X, "BCM5301X") - .l2c_aux_val = 0, - .l2c_aux_mask = ~0, -- .init_early = bcm5301x_init_early, - .dt_compat = bcm5301x_dt_compat, - MACHINE_END diff --git a/target/linux/bcm53xx/patches-4.4/021-ARM-BCM5310X-activate-erratas-needed-for-SoC.patch b/target/linux/bcm53xx/patches-4.4/021-ARM-BCM5310X-activate-erratas-needed-for-SoC.patch deleted file mode 100644 index 8169da90c5..0000000000 --- a/target/linux/bcm53xx/patches-4.4/021-ARM-BCM5310X-activate-erratas-needed-for-SoC.patch +++ /dev/null @@ -1,31 +0,0 @@ -From f4ce7effe2253a325f8ba182903cbdf0d8698593 Mon Sep 17 00:00:00 2001 -From: Hauke Mehrtens <hauke@hauke-m.de> -Date: Sat, 21 Nov 2015 15:29:47 +0100 -Subject: [PATCH] ARM: BCM5310X: activate erratas needed for SoC - -The BCM4708 I have, which is probably the first generation which got -to the consumer market, is using a ARM Cortex-A9 rev r3p0 and a -L2C-310 rev r3p2 L2 cache controller. There are 3 workarounds for known -erratas in the Linux kernel which could be activated and will be in -this patch. There are currently no workarounds which have to be -activated for the L2C-310 rev r3p2 in Linux. - -Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/mach-bcm/Kconfig | 4 ++++ - 1 file changed, 4 insertions(+) - ---- a/arch/arm/mach-bcm/Kconfig -+++ b/arch/arm/mach-bcm/Kconfig -@@ -52,6 +52,10 @@ config ARCH_BCM_NSP - config ARCH_BCM_5301X - bool "Broadcom BCM470X / BCM5301X ARM SoC" if ARCH_MULTI_V7 - select ARCH_BCM_IPROC -+ select ARM_ERRATA_754322 -+ select ARM_ERRATA_775420 -+ select ARM_ERRATA_764369 if SMP -+ - help - Support for Broadcom BCM470X and BCM5301X SoCs with ARM CPU cores. - diff --git a/target/linux/bcm53xx/patches-4.4/022-ARM-BCM-Clean-up-SMP-support-for-Broadcom-Kona.patch b/target/linux/bcm53xx/patches-4.4/022-ARM-BCM-Clean-up-SMP-support-for-Broadcom-Kona.patch deleted file mode 100644 index fecaec4b49..0000000000 --- a/target/linux/bcm53xx/patches-4.4/022-ARM-BCM-Clean-up-SMP-support-for-Broadcom-Kona.patch +++ /dev/null @@ -1,254 +0,0 @@ -From b5989f783de046577067fe356b1bb76cae07e867 Mon Sep 17 00:00:00 2001 -From: Kapil Hali <kapilh@broadcom.com> -Date: Sat, 5 Dec 2015 06:53:41 -0500 -Subject: [PATCH] ARM: BCM: Clean up SMP support for Broadcom Kona - -These changes cleans up SMP implementaion for Broadcom's -Kona SoC which are required for handling SMP for iProc -family of SoCs at a single place for BCM NSP and BCM Kona. - -Signed-off-by: Kapil Hali <kapilh@broadcom.com> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - .../bindings/arm/bcm/brcm,bcm11351-cpu-method.txt | 12 ++-- - arch/arm/boot/dts/bcm11351.dtsi | 4 +- - arch/arm/boot/dts/bcm21664.dtsi | 4 +- - arch/arm/mach-bcm/kona_smp.c | 82 ++++++++++++++-------- - 4 files changed, 64 insertions(+), 38 deletions(-) - ---- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm11351-cpu-method.txt -+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm11351-cpu-method.txt -@@ -1,17 +1,17 @@ - Broadcom Kona Family CPU Enable Method - -------------------------------------- - This binding defines the enable method used for starting secondary --CPUs in the following Broadcom SoCs: -+CPU in the following Broadcom SoCs: - BCM11130, BCM11140, BCM11351, BCM28145, BCM28155, BCM21664 - - The enable method is specified by defining the following required --properties in the "cpus" device tree node: -+properties in the corresponding secondary "cpu" device tree node: - - enable-method = "brcm,bcm11351-cpu-method"; - - secondary-boot-reg = <...>; - - The secondary-boot-reg property is a u32 value that specifies the --physical address of the register used to request the ROM holding pen --code release a secondary CPU. The value written to the register is -+physical address of the register used to request the ROM code -+release a secondary CPU. The value written to the register is - formed by encoding the target CPU id into the low bits of the - physical start address it should jump to. - -@@ -19,8 +19,6 @@ Example: - cpus { - #address-cells = <1>; - #size-cells = <0>; -- enable-method = "brcm,bcm11351-cpu-method"; -- secondary-boot-reg = <0x3500417c>; - - cpu0: cpu@0 { - device_type = "cpu"; -@@ -31,6 +29,8 @@ Example: - cpu1: cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a9"; -+ enable-method = "brcm,bcm11351-cpu-method"; -+ secondary-boot-reg = <0x3500417c>; - reg = <1>; - }; - }; ---- a/arch/arm/boot/dts/bcm11351.dtsi -+++ b/arch/arm/boot/dts/bcm11351.dtsi -@@ -30,8 +30,6 @@ - cpus { - #address-cells = <1>; - #size-cells = <0>; -- enable-method = "brcm,bcm11351-cpu-method"; -- secondary-boot-reg = <0x3500417c>; - - cpu0: cpu@0 { - device_type = "cpu"; -@@ -42,6 +40,8 @@ - cpu1: cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a9"; -+ enable-method = "brcm,bcm11351-cpu-method"; -+ secondary-boot-reg = <0x3500417c>; - reg = <1>; - }; - }; ---- a/arch/arm/boot/dts/bcm21664.dtsi -+++ b/arch/arm/boot/dts/bcm21664.dtsi -@@ -30,8 +30,6 @@ - cpus { - #address-cells = <1>; - #size-cells = <0>; -- enable-method = "brcm,bcm11351-cpu-method"; -- secondary-boot-reg = <0x35004178>; - - cpu0: cpu@0 { - device_type = "cpu"; -@@ -42,6 +40,8 @@ - cpu1: cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a9"; -+ enable-method = "brcm,bcm11351-cpu-method"; -+ secondary-boot-reg = <0x35004178>; - reg = <1>; - }; - }; ---- a/arch/arm/mach-bcm/kona_smp.c -+++ b/arch/arm/mach-bcm/kona_smp.c -@@ -1,5 +1,5 @@ - /* -- * Copyright (C) 2014 Broadcom Corporation -+ * Copyright (C) 2014-2015 Broadcom Corporation - * Copyright 2014 Linaro Limited - * - * This program is free software; you can redistribute it and/or -@@ -30,9 +30,10 @@ - - /* Name of device node property defining secondary boot register location */ - #define OF_SECONDARY_BOOT "secondary-boot-reg" -+#define MPIDR_CPUID_BITMASK 0x3 - - /* I/O address of register used to coordinate secondary core startup */ --static u32 secondary_boot; -+static u32 secondary_boot_addr; - - /* - * Enable the Cortex A9 Snoop Control Unit -@@ -78,44 +79,68 @@ static int __init scu_a9_enable(void) - static void __init bcm_smp_prepare_cpus(unsigned int max_cpus) - { - static cpumask_t only_cpu_0 = { CPU_BITS_CPU0 }; -- struct device_node *node; -+ struct device_node *cpus_node = NULL; -+ struct device_node *cpu_node = NULL; - int ret; - -- BUG_ON(secondary_boot); /* We're called only once */ -- - /* - * This function is only called via smp_ops->smp_prepare_cpu(). - * That only happens if a "/cpus" device tree node exists - * and has an "enable-method" property that selects the SMP - * operations defined herein. - */ -- node = of_find_node_by_path("/cpus"); -- BUG_ON(!node); -- -- /* -- * Our secondary enable method requires a "secondary-boot-reg" -- * property to specify a register address used to request the -- * ROM code boot a secondary code. If we have any trouble -- * getting this we fall back to uniprocessor mode. -- */ -- if (of_property_read_u32(node, OF_SECONDARY_BOOT, &secondary_boot)) { -- pr_err("%s: missing/invalid " OF_SECONDARY_BOOT " property\n", -- node->name); -- ret = -ENOENT; /* Arrange to disable SMP */ -- goto out; -+ cpus_node = of_find_node_by_path("/cpus"); -+ if (!cpus_node) -+ return; -+ -+ for_each_child_of_node(cpus_node, cpu_node) { -+ u32 cpuid; -+ -+ if (of_node_cmp(cpu_node->type, "cpu")) -+ continue; -+ -+ if (of_property_read_u32(cpu_node, "reg", &cpuid)) { -+ pr_debug("%s: missing reg property\n", -+ cpu_node->full_name); -+ ret = -ENOENT; -+ goto out; -+ } -+ -+ /* -+ * "secondary-boot-reg" property should be defined only -+ * for secondary cpu -+ */ -+ if ((cpuid & MPIDR_CPUID_BITMASK) == 1) { -+ /* -+ * Our secondary enable method requires a -+ * "secondary-boot-reg" property to specify a register -+ * address used to request the ROM code boot a secondary -+ * core. If we have any trouble getting this we fall -+ * back to uniprocessor mode. -+ */ -+ if (of_property_read_u32(cpu_node, -+ OF_SECONDARY_BOOT, -+ &secondary_boot_addr)) { -+ pr_warn("%s: no" OF_SECONDARY_BOOT "property\n", -+ cpu_node->name); -+ ret = -ENOENT; -+ goto out; -+ } -+ } - } - - /* -- * Enable the SCU on Cortex A9 based SoCs. If -ENOENT is -+ * Enable the SCU on Cortex A9 based SoCs. If -ENOENT is - * returned, the SoC reported a uniprocessor configuration. - * We bail on any other error. - */ - ret = scu_a9_enable(); - out: -- of_node_put(node); -+ of_node_put(cpu_node); -+ of_node_put(cpus_node); -+ - if (ret) { - /* Update the CPU present map to reflect uniprocessor mode */ -- BUG_ON(ret != -ENOENT); - pr_warn("disabling SMP\n"); - init_cpu_present(&only_cpu_0); - } -@@ -139,7 +164,7 @@ out: - * - Wait for the secondary boot register to be re-written, which - * indicates the secondary core has started. - */ --static int bcm_boot_secondary(unsigned int cpu, struct task_struct *idle) -+static int kona_boot_secondary(unsigned int cpu, struct task_struct *idle) - { - void __iomem *boot_reg; - phys_addr_t boot_func; -@@ -154,15 +179,16 @@ static int bcm_boot_secondary(unsigned i - return -EINVAL; - } - -- if (!secondary_boot) { -+ if (!secondary_boot_addr) { - pr_err("required secondary boot register not specified\n"); - return -EINVAL; - } - -- boot_reg = ioremap_nocache((phys_addr_t)secondary_boot, sizeof(u32)); -+ boot_reg = ioremap_nocache( -+ (phys_addr_t)secondary_boot_addr, sizeof(u32)); - if (!boot_reg) { - pr_err("unable to map boot register for cpu %u\n", cpu_id); -- return -ENOSYS; -+ return -ENOMEM; - } - - /* -@@ -191,12 +217,12 @@ static int bcm_boot_secondary(unsigned i - - pr_err("timeout waiting for cpu %u to start\n", cpu_id); - -- return -ENOSYS; -+ return -ENXIO; - } - - static struct smp_operations bcm_smp_ops __initdata = { - .smp_prepare_cpus = bcm_smp_prepare_cpus, -- .smp_boot_secondary = bcm_boot_secondary, -+ .smp_boot_secondary = kona_boot_secondary, - }; - CPU_METHOD_OF_DECLARE(bcm_smp_bcm281xx, "brcm,bcm11351-cpu-method", - &bcm_smp_ops); diff --git a/target/linux/bcm53xx/patches-4.4/023-ARM-BCM-Add-SMP-support-for-Broadcom-NSP.patch b/target/linux/bcm53xx/patches-4.4/023-ARM-BCM-Add-SMP-support-for-Broadcom-NSP.patch deleted file mode 100644 index 5fbf213700..0000000000 --- a/target/linux/bcm53xx/patches-4.4/023-ARM-BCM-Add-SMP-support-for-Broadcom-NSP.patch +++ /dev/null @@ -1,585 +0,0 @@ -From 55be958cd27439a58c4d9369d6fe2a1f83efdaa6 Mon Sep 17 00:00:00 2001 -From: Kapil Hali <kapilh@broadcom.com> -Date: Sat, 5 Dec 2015 06:53:43 -0500 -Subject: [PATCH] ARM: BCM: Add SMP support for Broadcom NSP - -Add SMP support for Broadcom's Northstar Plus SoC -cpu enable method. This changes also consolidates -iProc family's - BCM NSP and BCM Kona, platform -SMP handling in a common file. - -Northstar Plus SoC is based on ARM Cortex-A9 -revision r3p0 which requires configuration for ARM -Errata 764369 for SMP. This change adds the needed -configuration option. - -Signed-off-by: Kapil Hali <kapilh@broadcom.com> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/mach-bcm/Kconfig | 2 + - arch/arm/mach-bcm/Makefile | 8 +- - arch/arm/mach-bcm/kona_smp.c | 228 ---------------------------------- - arch/arm/mach-bcm/platsmp.c | 290 +++++++++++++++++++++++++++++++++++++++++++ - 4 files changed, 298 insertions(+), 230 deletions(-) - delete mode 100644 arch/arm/mach-bcm/kona_smp.c - create mode 100644 arch/arm/mach-bcm/platsmp.c - ---- a/arch/arm/mach-bcm/Kconfig -+++ b/arch/arm/mach-bcm/Kconfig -@@ -40,6 +40,8 @@ config ARCH_BCM_NSP - select ARCH_BCM_IPROC - select ARM_ERRATA_754322 - select ARM_ERRATA_775420 -+ select ARM_ERRATA_764369 if SMP -+ select HAVE_SMP - help - Support for Broadcom Northstar Plus SoC. - Broadcom Northstar Plus family of SoCs are used for switching control ---- a/arch/arm/mach-bcm/Makefile -+++ b/arch/arm/mach-bcm/Makefile -@@ -14,7 +14,11 @@ - obj-$(CONFIG_ARCH_BCM_CYGNUS) += bcm_cygnus.o - - # Northstar Plus --obj-$(CONFIG_ARCH_BCM_NSP) += bcm_nsp.o -+obj-$(CONFIG_ARCH_BCM_NSP) += bcm_nsp.o -+ -+ifeq ($(CONFIG_ARCH_BCM_NSP),y) -+obj-$(CONFIG_SMP) += platsmp.o -+endif - - # BCM281XX - obj-$(CONFIG_ARCH_BCM_281XX) += board_bcm281xx.o -@@ -23,7 +27,7 @@ obj-$(CONFIG_ARCH_BCM_281XX) += board_bc - obj-$(CONFIG_ARCH_BCM_21664) += board_bcm21664.o - - # BCM281XX and BCM21664 SMP support --obj-$(CONFIG_ARCH_BCM_MOBILE_SMP) += kona_smp.o -+obj-$(CONFIG_ARCH_BCM_MOBILE_SMP) += platsmp.o - - # BCM281XX and BCM21664 L2 cache control - obj-$(CONFIG_ARCH_BCM_MOBILE_L2_CACHE) += kona_l2_cache.o ---- a/arch/arm/mach-bcm/kona_smp.c -+++ /dev/null -@@ -1,228 +0,0 @@ --/* -- * Copyright (C) 2014-2015 Broadcom Corporation -- * Copyright 2014 Linaro Limited -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation version 2. -- * -- * This program is distributed "as is" WITHOUT ANY WARRANTY of any -- * kind, whether express or implied; without even the implied warranty -- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- */ -- --#include <linux/init.h> --#include <linux/errno.h> --#include <linux/io.h> --#include <linux/of.h> --#include <linux/sched.h> -- --#include <asm/smp.h> --#include <asm/smp_plat.h> --#include <asm/smp_scu.h> -- --/* Size of mapped Cortex A9 SCU address space */ --#define CORTEX_A9_SCU_SIZE 0x58 -- --#define SECONDARY_TIMEOUT_NS NSEC_PER_MSEC /* 1 msec (in nanoseconds) */ --#define BOOT_ADDR_CPUID_MASK 0x3 -- --/* Name of device node property defining secondary boot register location */ --#define OF_SECONDARY_BOOT "secondary-boot-reg" --#define MPIDR_CPUID_BITMASK 0x3 -- --/* I/O address of register used to coordinate secondary core startup */ --static u32 secondary_boot_addr; -- --/* -- * Enable the Cortex A9 Snoop Control Unit -- * -- * By the time this is called we already know there are multiple -- * cores present. We assume we're running on a Cortex A9 processor, -- * so any trouble getting the base address register or getting the -- * SCU base is a problem. -- * -- * Return 0 if successful or an error code otherwise. -- */ --static int __init scu_a9_enable(void) --{ -- unsigned long config_base; -- void __iomem *scu_base; -- -- if (!scu_a9_has_base()) { -- pr_err("no configuration base address register!\n"); -- return -ENXIO; -- } -- -- /* Config base address register value is zero for uniprocessor */ -- config_base = scu_a9_get_base(); -- if (!config_base) { -- pr_err("hardware reports only one core\n"); -- return -ENOENT; -- } -- -- scu_base = ioremap((phys_addr_t)config_base, CORTEX_A9_SCU_SIZE); -- if (!scu_base) { -- pr_err("failed to remap config base (%lu/%u) for SCU\n", -- config_base, CORTEX_A9_SCU_SIZE); -- return -ENOMEM; -- } -- -- scu_enable(scu_base); -- -- iounmap(scu_base); /* That's the last we'll need of this */ -- -- return 0; --} -- --static void __init bcm_smp_prepare_cpus(unsigned int max_cpus) --{ -- static cpumask_t only_cpu_0 = { CPU_BITS_CPU0 }; -- struct device_node *cpus_node = NULL; -- struct device_node *cpu_node = NULL; -- int ret; -- -- /* -- * This function is only called via smp_ops->smp_prepare_cpu(). -- * That only happens if a "/cpus" device tree node exists -- * and has an "enable-method" property that selects the SMP -- * operations defined herein. -- */ -- cpus_node = of_find_node_by_path("/cpus"); -- if (!cpus_node) -- return; -- -- for_each_child_of_node(cpus_node, cpu_node) { -- u32 cpuid; -- -- if (of_node_cmp(cpu_node->type, "cpu")) -- continue; -- -- if (of_property_read_u32(cpu_node, "reg", &cpuid)) { -- pr_debug("%s: missing reg property\n", -- cpu_node->full_name); -- ret = -ENOENT; -- goto out; -- } -- -- /* -- * "secondary-boot-reg" property should be defined only -- * for secondary cpu -- */ -- if ((cpuid & MPIDR_CPUID_BITMASK) == 1) { -- /* -- * Our secondary enable method requires a -- * "secondary-boot-reg" property to specify a register -- * address used to request the ROM code boot a secondary -- * core. If we have any trouble getting this we fall -- * back to uniprocessor mode. -- */ -- if (of_property_read_u32(cpu_node, -- OF_SECONDARY_BOOT, -- &secondary_boot_addr)) { -- pr_warn("%s: no" OF_SECONDARY_BOOT "property\n", -- cpu_node->name); -- ret = -ENOENT; -- goto out; -- } -- } -- } -- -- /* -- * Enable the SCU on Cortex A9 based SoCs. If -ENOENT is -- * returned, the SoC reported a uniprocessor configuration. -- * We bail on any other error. -- */ -- ret = scu_a9_enable(); --out: -- of_node_put(cpu_node); -- of_node_put(cpus_node); -- -- if (ret) { -- /* Update the CPU present map to reflect uniprocessor mode */ -- pr_warn("disabling SMP\n"); -- init_cpu_present(&only_cpu_0); -- } --} -- --/* -- * The ROM code has the secondary cores looping, waiting for an event. -- * When an event occurs each core examines the bottom two bits of the -- * secondary boot register. When a core finds those bits contain its -- * own core id, it performs initialization, including computing its boot -- * address by clearing the boot register value's bottom two bits. The -- * core signals that it is beginning its execution by writing its boot -- * address back to the secondary boot register, and finally jumps to -- * that address. -- * -- * So to start a core executing we need to: -- * - Encode the (hardware) CPU id with the bottom bits of the secondary -- * start address. -- * - Write that value into the secondary boot register. -- * - Generate an event to wake up the secondary CPU(s). -- * - Wait for the secondary boot register to be re-written, which -- * indicates the secondary core has started. -- */ --static int kona_boot_secondary(unsigned int cpu, struct task_struct *idle) --{ -- void __iomem *boot_reg; -- phys_addr_t boot_func; -- u64 start_clock; -- u32 cpu_id; -- u32 boot_val; -- bool timeout = false; -- -- cpu_id = cpu_logical_map(cpu); -- if (cpu_id & ~BOOT_ADDR_CPUID_MASK) { -- pr_err("bad cpu id (%u > %u)\n", cpu_id, BOOT_ADDR_CPUID_MASK); -- return -EINVAL; -- } -- -- if (!secondary_boot_addr) { -- pr_err("required secondary boot register not specified\n"); -- return -EINVAL; -- } -- -- boot_reg = ioremap_nocache( -- (phys_addr_t)secondary_boot_addr, sizeof(u32)); -- if (!boot_reg) { -- pr_err("unable to map boot register for cpu %u\n", cpu_id); -- return -ENOMEM; -- } -- -- /* -- * Secondary cores will start in secondary_startup(), -- * defined in "arch/arm/kernel/head.S" -- */ -- boot_func = virt_to_phys(secondary_startup); -- BUG_ON(boot_func & BOOT_ADDR_CPUID_MASK); -- BUG_ON(boot_func > (phys_addr_t)U32_MAX); -- -- /* The core to start is encoded in the low bits */ -- boot_val = (u32)boot_func | cpu_id; -- writel_relaxed(boot_val, boot_reg); -- -- sev(); -- -- /* The low bits will be cleared once the core has started */ -- start_clock = local_clock(); -- while (!timeout && readl_relaxed(boot_reg) == boot_val) -- timeout = local_clock() - start_clock > SECONDARY_TIMEOUT_NS; -- -- iounmap(boot_reg); -- -- if (!timeout) -- return 0; -- -- pr_err("timeout waiting for cpu %u to start\n", cpu_id); -- -- return -ENXIO; --} -- --static struct smp_operations bcm_smp_ops __initdata = { -- .smp_prepare_cpus = bcm_smp_prepare_cpus, -- .smp_boot_secondary = kona_boot_secondary, --}; --CPU_METHOD_OF_DECLARE(bcm_smp_bcm281xx, "brcm,bcm11351-cpu-method", -- &bcm_smp_ops); ---- /dev/null -+++ b/arch/arm/mach-bcm/platsmp.c -@@ -0,0 +1,290 @@ -+/* -+ * Copyright (C) 2014-2015 Broadcom Corporation -+ * Copyright 2014 Linaro Limited -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation version 2. -+ * -+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any -+ * kind, whether express or implied; without even the implied warranty -+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#include <linux/cpumask.h> -+#include <linux/delay.h> -+#include <linux/errno.h> -+#include <linux/init.h> -+#include <linux/io.h> -+#include <linux/jiffies.h> -+#include <linux/of.h> -+#include <linux/sched.h> -+#include <linux/smp.h> -+ -+#include <asm/cacheflush.h> -+#include <asm/smp.h> -+#include <asm/smp_plat.h> -+#include <asm/smp_scu.h> -+ -+/* Size of mapped Cortex A9 SCU address space */ -+#define CORTEX_A9_SCU_SIZE 0x58 -+ -+#define SECONDARY_TIMEOUT_NS NSEC_PER_MSEC /* 1 msec (in nanoseconds) */ -+#define BOOT_ADDR_CPUID_MASK 0x3 -+ -+/* Name of device node property defining secondary boot register location */ -+#define OF_SECONDARY_BOOT "secondary-boot-reg" -+#define MPIDR_CPUID_BITMASK 0x3 -+ -+/* I/O address of register used to coordinate secondary core startup */ -+static u32 secondary_boot_addr; -+ -+/* -+ * Enable the Cortex A9 Snoop Control Unit -+ * -+ * By the time this is called we already know there are multiple -+ * cores present. We assume we're running on a Cortex A9 processor, -+ * so any trouble getting the base address register or getting the -+ * SCU base is a problem. -+ * -+ * Return 0 if successful or an error code otherwise. -+ */ -+static int __init scu_a9_enable(void) -+{ -+ unsigned long config_base; -+ void __iomem *scu_base; -+ -+ if (!scu_a9_has_base()) { -+ pr_err("no configuration base address register!\n"); -+ return -ENXIO; -+ } -+ -+ /* Config base address register value is zero for uniprocessor */ -+ config_base = scu_a9_get_base(); -+ if (!config_base) { -+ pr_err("hardware reports only one core\n"); -+ return -ENOENT; -+ } -+ -+ scu_base = ioremap((phys_addr_t)config_base, CORTEX_A9_SCU_SIZE); -+ if (!scu_base) { -+ pr_err("failed to remap config base (%lu/%u) for SCU\n", -+ config_base, CORTEX_A9_SCU_SIZE); -+ return -ENOMEM; -+ } -+ -+ scu_enable(scu_base); -+ -+ iounmap(scu_base); /* That's the last we'll need of this */ -+ -+ return 0; -+} -+ -+static int nsp_write_lut(void) -+{ -+ void __iomem *sku_rom_lut; -+ phys_addr_t secondary_startup_phy; -+ -+ if (!secondary_boot_addr) { -+ pr_warn("required secondary boot register not specified\n"); -+ return -EINVAL; -+ } -+ -+ sku_rom_lut = ioremap_nocache((phys_addr_t)secondary_boot_addr, -+ sizeof(secondary_boot_addr)); -+ if (!sku_rom_lut) { -+ pr_warn("unable to ioremap SKU-ROM LUT register\n"); -+ return -ENOMEM; -+ } -+ -+ secondary_startup_phy = virt_to_phys(secondary_startup); -+ BUG_ON(secondary_startup_phy > (phys_addr_t)U32_MAX); -+ -+ writel_relaxed(secondary_startup_phy, sku_rom_lut); -+ -+ /* Ensure the write is visible to the secondary core */ -+ smp_wmb(); -+ -+ iounmap(sku_rom_lut); -+ -+ return 0; -+} -+ -+static void __init bcm_smp_prepare_cpus(unsigned int max_cpus) -+{ -+ static cpumask_t only_cpu_0 = { CPU_BITS_CPU0 }; -+ struct device_node *cpus_node = NULL; -+ struct device_node *cpu_node = NULL; -+ int ret; -+ -+ /* -+ * This function is only called via smp_ops->smp_prepare_cpu(). -+ * That only happens if a "/cpus" device tree node exists -+ * and has an "enable-method" property that selects the SMP -+ * operations defined herein. -+ */ -+ cpus_node = of_find_node_by_path("/cpus"); -+ if (!cpus_node) -+ return; -+ -+ for_each_child_of_node(cpus_node, cpu_node) { -+ u32 cpuid; -+ -+ if (of_node_cmp(cpu_node->type, "cpu")) -+ continue; -+ -+ if (of_property_read_u32(cpu_node, "reg", &cpuid)) { -+ pr_debug("%s: missing reg property\n", -+ cpu_node->full_name); -+ ret = -ENOENT; -+ goto out; -+ } -+ -+ /* -+ * "secondary-boot-reg" property should be defined only -+ * for secondary cpu -+ */ -+ if ((cpuid & MPIDR_CPUID_BITMASK) == 1) { -+ /* -+ * Our secondary enable method requires a -+ * "secondary-boot-reg" property to specify a register -+ * address used to request the ROM code boot a secondary -+ * core. If we have any trouble getting this we fall -+ * back to uniprocessor mode. -+ */ -+ if (of_property_read_u32(cpu_node, -+ OF_SECONDARY_BOOT, -+ &secondary_boot_addr)) { -+ pr_warn("%s: no" OF_SECONDARY_BOOT "property\n", -+ cpu_node->name); -+ ret = -ENOENT; -+ goto out; -+ } -+ } -+ } -+ -+ /* -+ * Enable the SCU on Cortex A9 based SoCs. If -ENOENT is -+ * returned, the SoC reported a uniprocessor configuration. -+ * We bail on any other error. -+ */ -+ ret = scu_a9_enable(); -+out: -+ of_node_put(cpu_node); -+ of_node_put(cpus_node); -+ -+ if (ret) { -+ /* Update the CPU present map to reflect uniprocessor mode */ -+ pr_warn("disabling SMP\n"); -+ init_cpu_present(&only_cpu_0); -+ } -+} -+ -+/* -+ * The ROM code has the secondary cores looping, waiting for an event. -+ * When an event occurs each core examines the bottom two bits of the -+ * secondary boot register. When a core finds those bits contain its -+ * own core id, it performs initialization, including computing its boot -+ * address by clearing the boot register value's bottom two bits. The -+ * core signals that it is beginning its execution by writing its boot -+ * address back to the secondary boot register, and finally jumps to -+ * that address. -+ * -+ * So to start a core executing we need to: -+ * - Encode the (hardware) CPU id with the bottom bits of the secondary -+ * start address. -+ * - Write that value into the secondary boot register. -+ * - Generate an event to wake up the secondary CPU(s). -+ * - Wait for the secondary boot register to be re-written, which -+ * indicates the secondary core has started. -+ */ -+static int kona_boot_secondary(unsigned int cpu, struct task_struct *idle) -+{ -+ void __iomem *boot_reg; -+ phys_addr_t boot_func; -+ u64 start_clock; -+ u32 cpu_id; -+ u32 boot_val; -+ bool timeout = false; -+ -+ cpu_id = cpu_logical_map(cpu); -+ if (cpu_id & ~BOOT_ADDR_CPUID_MASK) { -+ pr_err("bad cpu id (%u > %u)\n", cpu_id, BOOT_ADDR_CPUID_MASK); -+ return -EINVAL; -+ } -+ -+ if (!secondary_boot_addr) { -+ pr_err("required secondary boot register not specified\n"); -+ return -EINVAL; -+ } -+ -+ boot_reg = ioremap_nocache( -+ (phys_addr_t)secondary_boot_addr, sizeof(u32)); -+ if (!boot_reg) { -+ pr_err("unable to map boot register for cpu %u\n", cpu_id); -+ return -ENOMEM; -+ } -+ -+ /* -+ * Secondary cores will start in secondary_startup(), -+ * defined in "arch/arm/kernel/head.S" -+ */ -+ boot_func = virt_to_phys(secondary_startup); -+ BUG_ON(boot_func & BOOT_ADDR_CPUID_MASK); -+ BUG_ON(boot_func > (phys_addr_t)U32_MAX); -+ -+ /* The core to start is encoded in the low bits */ -+ boot_val = (u32)boot_func | cpu_id; -+ writel_relaxed(boot_val, boot_reg); -+ -+ sev(); -+ -+ /* The low bits will be cleared once the core has started */ -+ start_clock = local_clock(); -+ while (!timeout && readl_relaxed(boot_reg) == boot_val) -+ timeout = local_clock() - start_clock > SECONDARY_TIMEOUT_NS; -+ -+ iounmap(boot_reg); -+ -+ if (!timeout) -+ return 0; -+ -+ pr_err("timeout waiting for cpu %u to start\n", cpu_id); -+ -+ return -ENXIO; -+} -+ -+static int nsp_boot_secondary(unsigned int cpu, struct task_struct *idle) -+{ -+ int ret; -+ -+ /* -+ * After wake up, secondary core branches to the startup -+ * address programmed at SKU ROM LUT location. -+ */ -+ ret = nsp_write_lut(); -+ if (ret) { -+ pr_err("unable to write startup addr to SKU ROM LUT\n"); -+ goto out; -+ } -+ -+ /* Send a CPU wakeup interrupt to the secondary core */ -+ arch_send_wakeup_ipi_mask(cpumask_of(cpu)); -+ -+out: -+ return ret; -+} -+ -+static struct smp_operations bcm_smp_ops __initdata = { -+ .smp_prepare_cpus = bcm_smp_prepare_cpus, -+ .smp_boot_secondary = kona_boot_secondary, -+}; -+CPU_METHOD_OF_DECLARE(bcm_smp_bcm281xx, "brcm,bcm11351-cpu-method", -+ &bcm_smp_ops); -+ -+struct smp_operations nsp_smp_ops __initdata = { -+ .smp_prepare_cpus = bcm_smp_prepare_cpus, -+ .smp_boot_secondary = nsp_boot_secondary, -+}; -+CPU_METHOD_OF_DECLARE(bcm_smp_nsp, "brcm,bcm-nsp-smp", &nsp_smp_ops); diff --git a/target/linux/bcm53xx/patches-4.4/024-ARM-BCM-Add-SMP-support-for-Broadcom-4708.patch b/target/linux/bcm53xx/patches-4.4/024-ARM-BCM-Add-SMP-support-for-Broadcom-4708.patch deleted file mode 100644 index ca75fad53b..0000000000 --- a/target/linux/bcm53xx/patches-4.4/024-ARM-BCM-Add-SMP-support-for-Broadcom-4708.patch +++ /dev/null @@ -1,58 +0,0 @@ -From 99498905ac1fbc73a97d27d21ea449fb939072e3 Mon Sep 17 00:00:00 2001 -From: Jon Mason <jonmason@broadcom.com> -Date: Tue, 1 Dec 2015 11:24:09 -0500 -Subject: [PATCH] ARM: BCM: Add SMP support for Broadcom 4708 - -Add SMP support for Broadcom's 4708 SoCs. - -Signed-off-by: Jon Mason <jonmason@broadcom.com> -Acked-by: Hauke Mehrtens <hauke@hauke-m.de> -Tested-by: Hauke Mehrtens <hauke@hauke-m.de> -Signed-off-by: Kapil Hali <kapilh@broadcom.com> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/bcm4708.dtsi | 2 ++ - arch/arm/mach-bcm/Kconfig | 1 + - arch/arm/mach-bcm/Makefile | 3 +++ - 3 files changed, 6 insertions(+) - ---- a/arch/arm/boot/dts/bcm4708.dtsi -+++ b/arch/arm/boot/dts/bcm4708.dtsi -@@ -15,6 +15,7 @@ - cpus { - #address-cells = <1>; - #size-cells = <0>; -+ enable-method = "brcm,bcm-nsp-smp"; - - cpu@0 { - device_type = "cpu"; -@@ -27,6 +28,7 @@ - device_type = "cpu"; - compatible = "arm,cortex-a9"; - next-level-cache = <&L2>; -+ secondary-boot-reg = <0xffff0400>; - reg = <0x1>; - }; - }; ---- a/arch/arm/mach-bcm/Kconfig -+++ b/arch/arm/mach-bcm/Kconfig -@@ -57,6 +57,7 @@ config ARCH_BCM_5301X - select ARM_ERRATA_754322 - select ARM_ERRATA_775420 - select ARM_ERRATA_764369 if SMP -+ select HAVE_SMP - - help - Support for Broadcom BCM470X and BCM5301X SoCs with ARM CPU cores. ---- a/arch/arm/mach-bcm/Makefile -+++ b/arch/arm/mach-bcm/Makefile -@@ -43,6 +43,9 @@ obj-$(CONFIG_ARCH_BCM2835) += board_bcm2 - - # BCM5301X - obj-$(CONFIG_ARCH_BCM_5301X) += bcm_5301x.o -+ifeq ($(CONFIG_ARCH_BCM_5301X),y) -+obj-$(CONFIG_SMP) += platsmp.o -+endif - - # BCM63XXx - ifeq ($(CONFIG_ARCH_BCM_63XX),y) diff --git a/target/linux/bcm53xx/patches-4.4/030-ARM-dts-bcm5301x-Add-BCM-SVK-DT-files.patch b/target/linux/bcm53xx/patches-4.4/030-ARM-dts-bcm5301x-Add-BCM-SVK-DT-files.patch deleted file mode 100644 index c63627d473..0000000000 --- a/target/linux/bcm53xx/patches-4.4/030-ARM-dts-bcm5301x-Add-BCM-SVK-DT-files.patch +++ /dev/null @@ -1,219 +0,0 @@ -From ccf0b5e37115f8675455632f583d06ea94f43539 Mon Sep 17 00:00:00 2001 -From: Jon Mason <jonmason@broadcom.com> -Date: Mon, 2 Nov 2015 13:34:53 -0500 -Subject: [PATCH] ARM: dts: bcm5301x: Add BCM SVK DT files - -Add device tree files for Broadcom Northstar based SVKs. Since the -bcm5301x.dtsi already exists, all that is necessary is the dts files to -enable the UARTs. With these files, the SVKs are able to boot to shell. - -Signed-off-by: Jon Mason <jonmason@broadcom.com> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/Makefile | 5 +++- - arch/arm/boot/dts/bcm94708.dts | 56 +++++++++++++++++++++++++++++++++++ - arch/arm/boot/dts/bcm94709.dts | 56 +++++++++++++++++++++++++++++++++++ - arch/arm/boot/dts/bcm953012k.dts | 63 ++++++++++++++++++++++++++++++++++++++++ - 4 files changed, 179 insertions(+), 1 deletion(-) - create mode 100644 arch/arm/boot/dts/bcm94708.dts - create mode 100644 arch/arm/boot/dts/bcm94709.dts - create mode 100644 arch/arm/boot/dts/bcm953012k.dts - ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -75,7 +75,10 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \ - bcm4709-asus-rt-ac87u.dtb \ - bcm4709-buffalo-wxr-1900dhp.dtb \ - bcm4709-netgear-r7000.dtb \ -- bcm4709-netgear-r8000.dtb -+ bcm4709-netgear-r8000.dtb \ -+ bcm94708.dtb \ -+ bcm94709.dtb \ -+ bcm953012k.dtb - dtb-$(CONFIG_ARCH_BCM_63XX) += \ - bcm963138dvt.dtb - dtb-$(CONFIG_ARCH_BCM_CYGNUS) += \ ---- /dev/null -+++ b/arch/arm/boot/dts/bcm94708.dts -@@ -0,0 +1,56 @@ -+/* -+ * BSD LICENSE -+ * -+ * Copyright(c) 2015 Broadcom Corporation. All rights reserved. -+ * -+ * Redistribution and use in source and binary forms, with or without -+ * modification, are permitted provided that the following conditions -+ * are met: -+ * -+ * * Redistributions of source code must retain the above copyright -+ * notice, this list of conditions and the following disclaimer. -+ * * Redistributions in binary form must reproduce the above copyright -+ * notice, this list of conditions and the following disclaimer in -+ * the documentation and/or other materials provided with the -+ * distribution. -+ * * Neither the name of Broadcom Corporation nor the names of its -+ * contributors may be used to endorse or promote products derived -+ * from this software without specific prior written permission. -+ * -+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ */ -+ -+/dts-v1/; -+ -+#include "bcm4708.dtsi" -+ -+/ { -+ model = "NorthStar SVK (BCM94708)"; -+ compatible = "brcm,bcm94708", "brcm,bcm4708"; -+ -+ aliases { -+ serial0 = &uart0; -+ }; -+ -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ -+ memory { -+ reg = <0x00000000 0x08000000>; -+ }; -+}; -+ -+&uart0 { -+ status = "okay"; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/bcm94709.dts -@@ -0,0 +1,56 @@ -+/* -+ * BSD LICENSE -+ * -+ * Copyright(c) 2015 Broadcom Corporation. All rights reserved. -+ * -+ * Redistribution and use in source and binary forms, with or without -+ * modification, are permitted provided that the following conditions -+ * are met: -+ * -+ * * Redistributions of source code must retain the above copyright -+ * notice, this list of conditions and the following disclaimer. -+ * * Redistributions in binary form must reproduce the above copyright -+ * notice, this list of conditions and the following disclaimer in -+ * the documentation and/or other materials provided with the -+ * distribution. -+ * * Neither the name of Broadcom Corporation nor the names of its -+ * contributors may be used to endorse or promote products derived -+ * from this software without specific prior written permission. -+ * -+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ */ -+ -+/dts-v1/; -+ -+#include "bcm4708.dtsi" -+ -+/ { -+ model = "NorthStar SVK (BCM94709)"; -+ compatible = "brcm,bcm94709", "brcm,bcm4709", "brcm,bcm4708"; -+ -+ aliases { -+ serial0 = &uart0; -+ }; -+ -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ -+ memory { -+ reg = <0x00000000 0x08000000>; -+ }; -+}; -+ -+&uart0 { -+ status = "okay"; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/bcm953012k.dts -@@ -0,0 +1,63 @@ -+/* -+ * BSD LICENSE -+ * -+ * Copyright(c) 2015 Broadcom Corporation. All rights reserved. -+ * -+ * Redistribution and use in source and binary forms, with or without -+ * modification, are permitted provided that the following conditions -+ * are met: -+ * -+ * * Redistributions of source code must retain the above copyright -+ * notice, this list of conditions and the following disclaimer. -+ * * Redistributions in binary form must reproduce the above copyright -+ * notice, this list of conditions and the following disclaimer in -+ * the documentation and/or other materials provided with the -+ * distribution. -+ * * Neither the name of Broadcom Corporation nor the names of its -+ * contributors may be used to endorse or promote products derived -+ * from this software without specific prior written permission. -+ * -+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ */ -+ -+/dts-v1/; -+ -+#include "bcm4708.dtsi" -+ -+/ { -+ model = "NorthStar SVK (BCM953012K)"; -+ compatible = "brcm,bcm953012k", "brcm,brcm53012", "brcm,bcm4708"; -+ -+ aliases { -+ serial0 = &uart0; -+ serial1 = &uart1; -+ }; -+ -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ -+ memory { -+ reg = <0x00000000 0x10000000>; -+ }; -+}; -+ -+&uart0 { -+ clock-frequency = <62499840>; -+ status = "okay"; -+}; -+ -+&uart1 { -+ clock-frequency = <62499840>; -+ status = "okay"; -+}; diff --git a/target/linux/bcm53xx/patches-4.4/031-ARM-dts-enable-clock-support-for-BCM5301X.patch b/target/linux/bcm53xx/patches-4.4/031-ARM-dts-enable-clock-support-for-BCM5301X.patch deleted file mode 100644 index 165fe7c5cb..0000000000 --- a/target/linux/bcm53xx/patches-4.4/031-ARM-dts-enable-clock-support-for-BCM5301X.patch +++ /dev/null @@ -1,174 +0,0 @@ -From cdc36b22f0e4b8badf3db14395f0aa44dcbce4b3 Mon Sep 17 00:00:00 2001 -From: Jon Mason <jonmason@broadcom.com> -Date: Fri, 20 Nov 2015 10:17:18 -0500 -Subject: [PATCH] ARM: dts: enable clock support for BCM5301X - -Replace current device tree dummy clocks with real clock support for -Broadcom Northstar SoCs. - -Signed-off-by: Jon Mason <jonmason@broadcom.com> -Reviewed-by: Ray Jui <rjui@broadcom.com> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/bcm5301x.dtsi | 92 +++++++++++++++++++++++++++++++---------- - 1 file changed, 71 insertions(+), 21 deletions(-) - ---- a/arch/arm/boot/dts/bcm5301x.dtsi -+++ b/arch/arm/boot/dts/bcm5301x.dtsi -@@ -8,6 +8,7 @@ - * Licensed under the GNU/GPL. See COPYING for details. - */ - -+#include <dt-bindings/clock/bcm-nsp.h> - #include <dt-bindings/gpio/gpio.h> - #include <dt-bindings/input/input.h> - #include <dt-bindings/interrupt-controller/irq.h> -@@ -27,7 +28,7 @@ - compatible = "ns16550"; - reg = <0x0300 0x100>; - interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; -- clock-frequency = <100000000>; -+ clocks = <&iprocslow>; - status = "disabled"; - }; - -@@ -35,48 +36,55 @@ - compatible = "ns16550"; - reg = <0x0400 0x100>; - interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; -- clock-frequency = <100000000>; -+ clocks = <&iprocslow>; - status = "disabled"; - }; - }; - - mpcore { - compatible = "simple-bus"; -- ranges = <0x00000000 0x19020000 0x00003000>; -+ ranges = <0x00000000 0x19000000 0x00023000>; - #address-cells = <1>; - #size-cells = <1>; - -- scu@0000 { -+ a9pll: arm_clk@00000 { -+ #clock-cells = <0>; -+ compatible = "brcm,nsp-armpll"; -+ clocks = <&osc>; -+ reg = <0x00000 0x1000>; -+ }; -+ -+ scu@20000 { - compatible = "arm,cortex-a9-scu"; -- reg = <0x0000 0x100>; -+ reg = <0x20000 0x100>; - }; - -- timer@0200 { -+ timer@20200 { - compatible = "arm,cortex-a9-global-timer"; -- reg = <0x0200 0x100>; -+ reg = <0x20200 0x100>; - interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>; -- clocks = <&clk_periph>; -+ clocks = <&periph_clk>; - }; - -- local-timer@0600 { -+ local-timer@20600 { - compatible = "arm,cortex-a9-twd-timer"; -- reg = <0x0600 0x100>; -+ reg = <0x20600 0x100>; - interrupts = <GIC_PPI 13 IRQ_TYPE_EDGE_RISING>; -- clocks = <&clk_periph>; -+ clocks = <&periph_clk>; - }; - -- gic: interrupt-controller@1000 { -+ gic: interrupt-controller@21000 { - compatible = "arm,cortex-a9-gic"; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-controller; -- reg = <0x1000 0x1000>, -- <0x0100 0x100>; -+ reg = <0x21000 0x1000>, -+ <0x20100 0x100>; - }; - -- L2: cache-controller@2000 { -+ L2: cache-controller@22000 { - compatible = "arm,pl310-cache"; -- reg = <0x2000 0x1000>; -+ reg = <0x22000 0x1000>; - cache-unified; - arm,shared-override; - prefetch-data = <1>; -@@ -94,14 +102,37 @@ - - clocks { - #address-cells = <1>; -- #size-cells = <0>; -+ #size-cells = <1>; -+ ranges; - -- /* As long as we do not have a real clock driver us this -- * fixed clock */ -- clk_periph: periph { -+ osc: oscillator { -+ #clock-cells = <0>; - compatible = "fixed-clock"; -+ clock-frequency = <25000000>; -+ }; -+ -+ iprocmed: iprocmed { - #clock-cells = <0>; -- clock-frequency = <400000000>; -+ compatible = "fixed-factor-clock"; -+ clocks = <&genpll BCM_NSP_GENPLL_IPROCFAST_CLK>; -+ clock-div = <2>; -+ clock-mult = <1>; -+ }; -+ -+ iprocslow: iprocslow { -+ #clock-cells = <0>; -+ compatible = "fixed-factor-clock"; -+ clocks = <&genpll BCM_NSP_GENPLL_IPROCFAST_CLK>; -+ clock-div = <4>; -+ clock-mult = <1>; -+ }; -+ -+ periph_clk: periph_clk { -+ #clock-cells = <0>; -+ compatible = "fixed-factor-clock"; -+ clocks = <&a9pll>; -+ clock-div = <2>; -+ clock-mult = <1>; - }; - }; - -@@ -178,6 +209,25 @@ - }; - }; - -+ lcpll0: lcpll0@1800c100 { -+ #clock-cells = <1>; -+ compatible = "brcm,nsp-lcpll0"; -+ reg = <0x1800c100 0x14>; -+ clocks = <&osc>; -+ clock-output-names = "lcpll0", "pcie_phy", "sdio", -+ "ddr_phy"; -+ }; -+ -+ genpll: genpll@1800c140 { -+ #clock-cells = <1>; -+ compatible = "brcm,nsp-genpll"; -+ reg = <0x1800c140 0x24>; -+ clocks = <&osc>; -+ clock-output-names = "genpll", "phy", "ethernetclk", -+ "usbclk", "iprocfast", "sata1", -+ "sata2"; -+ }; -+ - nand: nand@18028000 { - compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1", "brcm,brcmnand"; - reg = <0x18028000 0x600>, <0x1811a408 0x600>, <0x18028f00 0x20>; diff --git a/target/linux/bcm53xx/patches-4.4/032-ARM-BCM5301X-Add-missing-Netgear-R8000-LEDs.patch b/target/linux/bcm53xx/patches-4.4/032-ARM-BCM5301X-Add-missing-Netgear-R8000-LEDs.patch deleted file mode 100644 index 14554a6267..0000000000 --- a/target/linux/bcm53xx/patches-4.4/032-ARM-BCM5301X-Add-missing-Netgear-R8000-LEDs.patch +++ /dev/null @@ -1,56 +0,0 @@ -From 9789f1fd1fd1d0551132778414faf8e2254408c1 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com> -Date: Fri, 30 Oct 2015 15:44:01 +0100 -Subject: [PATCH] ARM: BCM5301X: Add missing Netgear R8000 LEDs -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Add a bunch of LEDs missing for the Netgear R8000: wireless, wps, 5Ghz radio -and USB LEDs. - -Signed-off-by: Rafał Miłecki <zajec5@gmail.com> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/bcm4709-netgear-r8000.dts | 30 +++++++++++++++++++++++++++++ - 1 file changed, 30 insertions(+) - ---- a/arch/arm/boot/dts/bcm4709-netgear-r8000.dts -+++ b/arch/arm/boot/dts/bcm4709-netgear-r8000.dts -@@ -50,6 +50,36 @@ - gpios = <&chipcommon 13 GPIO_ACTIVE_LOW>; - linux,default-trigger = "default-off"; - }; -+ -+ wireless { -+ label = "bcm53xx:white:wireless"; -+ gpios = <&chipcommon 14 GPIO_ACTIVE_HIGH>; -+ linux,default-trigger = "default-off"; -+ }; -+ -+ wps { -+ label = "bcm53xx:white:wps"; -+ gpios = <&chipcommon 15 GPIO_ACTIVE_HIGH>; -+ linux,default-trigger = "default-off"; -+ }; -+ -+ 5ghz-2 { -+ label = "bcm53xx:white:5ghz-2"; -+ gpios = <&chipcommon 16 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "default-off"; -+ }; -+ -+ usb3 { -+ label = "bcm53xx:white:usb3"; -+ gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "default-off"; -+ }; -+ -+ usb2 { -+ label = "bcm53xx:white:usb2"; -+ gpios = <&chipcommon 18 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "default-off"; -+ }; - }; - - gpio-keys { diff --git a/target/linux/bcm53xx/patches-4.4/033-dt-bindings-add-SMP-enable-method-for-Broadcom-NSP.patch b/target/linux/bcm53xx/patches-4.4/033-dt-bindings-add-SMP-enable-method-for-Broadcom-NSP.patch deleted file mode 100644 index ff3fa0b80c..0000000000 --- a/target/linux/bcm53xx/patches-4.4/033-dt-bindings-add-SMP-enable-method-for-Broadcom-NSP.patch +++ /dev/null @@ -1,70 +0,0 @@ -From fa20071c74be69a1d84df85e5d1e72a40a156b89 Mon Sep 17 00:00:00 2001 -From: Kapil Hali <kapilh@broadcom.com> -Date: Tue, 1 Dec 2015 11:24:05 -0500 -Subject: [PATCH] dt-bindings: add SMP enable-method for Broadcom NSP - -Add a compatible string "brcm,bcm-nsp-smp" for Broadcom's -Northstar Plus CPU to the 32-bit ARM CPU device tree binding -documentation file and create a new binding documentation for -Northstar Plus CPU. - -Signed-off-by: Kapil Hali <kapilh@broadcom.com> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - .../bindings/arm/bcm/brcm,nsp-cpu-method.txt | 39 ++++++++++++++++++++++ - Documentation/devicetree/bindings/arm/cpus.txt | 1 + - 2 files changed, 40 insertions(+) - create mode 100644 Documentation/devicetree/bindings/arm/bcm/brcm,nsp-cpu-method.txt - ---- /dev/null -+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,nsp-cpu-method.txt -@@ -0,0 +1,39 @@ -+Broadcom Northstar Plus SoC CPU Enable Method -+--------------------------------------------- -+This binding defines the enable method used for starting secondary -+CPUs in the following Broadcom SoCs: -+ BCM58522, BCM58525, BCM58535, BCM58622, BCM58623, BCM58625, BCM88312 -+ -+The enable method is specified by defining the following required -+properties in the "cpus" device tree node: -+ - enable-method = "brcm,bcm-nsp-smp"; -+ - secondary-boot-reg = <...>; -+ -+The secondary-boot-reg property is a u32 value that specifies the -+physical address of the register which should hold the common -+entry point for a secondary CPU. This entry is cpu node specific -+and should be added per cpu. E.g., in case of NSP (BCM58625) which -+is a dual core CPU SoC, this entry should be added to cpu1 node. -+ -+ -+Example: -+ cpus { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ enable-method = "brcm,bcm-nsp-smp"; -+ -+ cpu0: cpu@0 { -+ device_type = "cpu"; -+ compatible = "arm,cortex-a9"; -+ next-level-cache = <&L2>; -+ reg = <0>; -+ }; -+ -+ cpu1: cpu@1 { -+ device_type = "cpu"; -+ compatible = "arm,cortex-a9"; -+ next-level-cache = <&L2>; -+ reg = <1>; -+ secondary-boot-reg = <0xffff042c>; -+ }; -+ }; ---- a/Documentation/devicetree/bindings/arm/cpus.txt -+++ b/Documentation/devicetree/bindings/arm/cpus.txt -@@ -190,6 +190,7 @@ nodes to be present and contain the prop - "allwinner,sun6i-a31" - "allwinner,sun8i-a23" - "arm,psci" -+ "brcm,bcm-nsp-smp" - "brcm,brahma-b15" - "marvell,armada-375-smp" - "marvell,armada-380-smp" diff --git a/target/linux/bcm53xx/patches-4.4/034-ARM-BCM5301X-Add-DT-for-D-Link-DIR-885L.patch b/target/linux/bcm53xx/patches-4.4/034-ARM-BCM5301X-Add-DT-for-D-Link-DIR-885L.patch deleted file mode 100644 index eee48f82f9..0000000000 --- a/target/linux/bcm53xx/patches-4.4/034-ARM-BCM5301X-Add-DT-for-D-Link-DIR-885L.patch +++ /dev/null @@ -1,141 +0,0 @@ -From 3ea03a9d512ca19d59315492230e954a1653ff6e Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com> -Date: Tue, 26 Jan 2016 23:35:16 +0100 -Subject: [PATCH] ARM: BCM5301X: Add DT for D-Link DIR-885L -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -It's device based on BCM47094 which is quite similar to BCM4709 except -for higher CPU frequency. This device has 2 flash memories, it boots -from serial one and stores firmware on NAND. Other than that we define -standard stuff like LEDs, buttons and UART. - -Signed-off-by: Rafał Miłecki <zajec5@gmail.com> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -76,6 +76,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \ - bcm4709-buffalo-wxr-1900dhp.dtb \ - bcm4709-netgear-r7000.dtb \ - bcm4709-netgear-r8000.dtb \ -+ bcm47094-dlink-dir-885l.dtb \ - bcm94708.dtb \ - bcm94709.dtb \ - bcm953012k.dtb ---- /dev/null -+++ b/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts -@@ -0,0 +1,111 @@ -+/* -+ * Broadcom BCM470X / BCM5301X ARM platform code. -+ * DTS for D-Link DIR-885L -+ * -+ * Copyright (C) 2016 Rafał Miłecki <zajec5@gmail.com> -+ * -+ * Licensed under the GNU/GPL. See COPYING for details. -+ */ -+ -+/dts-v1/; -+ -+#include "bcm4708.dtsi" -+#include "bcm5301x-nand-cs0-bch8.dtsi" -+ -+/ { -+ compatible = "dlink,dir-885l", "brcm,bcm47094", "brcm,bcm4708"; -+ model = "D-Link DIR-885L"; -+ -+ chosen { -+ bootargs = "console=ttyS0,115200"; -+ }; -+ -+ memory { -+ reg = <0x00000000 0x08000000>; -+ }; -+ -+ nand: nand@18028000 { -+ nandcs@0 { -+ partition@0 { -+ label = "firmware"; -+ reg = <0x00000000 0x08000000>; -+ }; -+ }; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ -+ power-white { -+ label = "bcm53xx:white:power"; -+ gpios = <&chipcommon 0 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "default-on"; -+ }; -+ -+ wan-white { -+ label = "bcm53xx:white:wan"; -+ gpios = <&chipcommon 1 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "default-off"; -+ }; -+ -+ power-amber { -+ label = "bcm53xx:amber:power"; -+ gpios = <&chipcommon 2 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "default-off"; -+ }; -+ -+ wan-amber { -+ label = "bcm53xx:amber:wan"; -+ gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "default-off"; -+ }; -+ -+ usb3-white { -+ label = "bcm53xx:white:usb3"; -+ gpios = <&chipcommon 8 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "default-off"; -+ }; -+ -+ 2ghz { -+ label = "bcm53xx:white:2ghz"; -+ gpios = <&chipcommon 13 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "default-off"; -+ }; -+ -+ 5ghz { -+ label = "bcm53xx:white:5ghz"; -+ gpios = <&chipcommon 14 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "default-off"; -+ }; -+ }; -+ -+ gpio-keys { -+ compatible = "gpio-keys"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ wps { -+ label = "WPS"; -+ linux,code = <KEY_WPS_BUTTON>; -+ gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>; -+ }; -+ -+ /* Switch: router / extender */ -+ extender { -+ label = "Extender"; -+ linux,code = <BTN_0>; -+ gpios = <&chipcommon 10 GPIO_ACTIVE_LOW>; -+ }; -+ -+ restart { -+ label = "Reset"; -+ linux,code = <KEY_RESTART>; -+ gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>; -+ }; -+ }; -+}; -+ -+&uart0 { -+ status = "okay"; -+ clock-frequency = <125000000>; -+}; diff --git a/target/linux/bcm53xx/patches-4.4/035-ARM-BCM5301X-Set-vcc-gpio-for-USB-controllers-of-few.patch b/target/linux/bcm53xx/patches-4.4/035-ARM-BCM5301X-Set-vcc-gpio-for-USB-controllers-of-few.patch deleted file mode 100644 index 3a32c8bb95..0000000000 --- a/target/linux/bcm53xx/patches-4.4/035-ARM-BCM5301X-Set-vcc-gpio-for-USB-controllers-of-few.patch +++ /dev/null @@ -1,117 +0,0 @@ -From dd70ccfaa79189feaa78609d44f7c3e7fa1dc6ff Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com> -Date: Wed, 23 Mar 2016 16:52:47 +0100 -Subject: [PATCH] ARM: BCM5301X: Set vcc-gpio for USB controllers of few - devices -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -There are few devices that have USB power controlled using GPIO. Linux -USB host driver (bcma-hcd) already supports this by reading vcc-gpio -from DT. Set it properly for all known devices. - -Signed-off-by: Rafał Miłecki <zajec5@gmail.com> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - ---- a/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts -+++ b/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts -@@ -139,3 +139,11 @@ - &uart0 { - status = "okay"; - }; -+ -+&usb2 { -+ vcc-gpio = <&chipcommon 9 GPIO_ACTIVE_HIGH>; -+}; -+ -+&usb3 { -+ vcc-gpio = <&chipcommon 10 GPIO_ACTIVE_LOW>; -+}; ---- a/arch/arm/boot/dts/bcm4708-netgear-r6250.dts -+++ b/arch/arm/boot/dts/bcm4708-netgear-r6250.dts -@@ -24,17 +24,6 @@ - reg = <0x00000000 0x08000000>; - }; - -- axi@18000000 { -- usb3@23000 { -- reg = <0x00023000 0x1000>; -- -- #address-cells = <1>; -- #size-cells = <1>; -- -- vcc-gpio = <&chipcommon 0 GPIO_ACTIVE_HIGH>; -- }; -- }; -- - leds { - compatible = "gpio-leds"; - -@@ -97,3 +86,7 @@ - &uart0 { - status = "okay"; - }; -+ -+&usb3 { -+ vcc-gpio = <&chipcommon 0 GPIO_ACTIVE_HIGH>; -+}; ---- a/arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts -+++ b/arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts -@@ -126,3 +126,8 @@ - }; - }; - }; -+ -+ -+&usb2 { -+ vcc-gpio = <&chipcommon 13 GPIO_ACTIVE_HIGH>; -+}; ---- a/arch/arm/boot/dts/bcm4709-netgear-r8000.dts -+++ b/arch/arm/boot/dts/bcm4709-netgear-r8000.dts -@@ -106,3 +106,11 @@ - }; - }; - }; -+ -+&usb2 { -+ vcc-gpio = <&chipcommon 0 GPIO_ACTIVE_HIGH>; -+}; -+ -+&usb3 { -+ vcc-gpio = <&chipcommon 0 GPIO_ACTIVE_HIGH>; -+}; ---- a/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts -+++ b/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts -@@ -109,3 +109,7 @@ - status = "okay"; - clock-frequency = <125000000>; - }; -+ -+&usb3 { -+ vcc-gpio = <&chipcommon 18 GPIO_ACTIVE_HIGH>; -+}; ---- a/arch/arm/boot/dts/bcm5301x.dtsi -+++ b/arch/arm/boot/dts/bcm5301x.dtsi -@@ -207,6 +207,20 @@ - gpio-controller; - #gpio-cells = <2>; - }; -+ -+ usb2: usb2@21000 { -+ reg = <0x00021000 0x1000>; -+ -+ #address-cells = <1>; -+ #size-cells = <1>; -+ }; -+ -+ usb3: usb3@23000 { -+ reg = <0x00023000 0x1000>; -+ -+ #address-cells = <1>; -+ #size-cells = <1>; -+ }; - }; - - lcpll0: lcpll0@1800c100 { diff --git a/target/linux/bcm53xx/patches-4.4/036-ARM-BCM5301X-Enable-earlycon-on-tested-devices.patch b/target/linux/bcm53xx/patches-4.4/036-ARM-BCM5301X-Enable-earlycon-on-tested-devices.patch deleted file mode 100644 index abcb00fbab..0000000000 --- a/target/linux/bcm53xx/patches-4.4/036-ARM-BCM5301X-Enable-earlycon-on-tested-devices.patch +++ /dev/null @@ -1,95 +0,0 @@ -From 5a6516ff135555aa53c7d156cd3973b826e011f9 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com> -Date: Wed, 6 Apr 2016 18:49:55 +0200 -Subject: [PATCH] ARM: BCM5301X: Enable earlycon on tested devices -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This allows reporting & debugging problems occurring early in the boot -process. - -Signed-off-by: Rafał Miłecki <zajec5@gmail.com> -Acked-by: Hauke Mehrtens <hauke@hauke-m.de> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - ---- a/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts -+++ b/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts -@@ -17,7 +17,7 @@ - model = "Buffalo WZR-1750DHP (BCM4708)"; - - chosen { -- bootargs = "console=ttyS0,115200"; -+ bootargs = "console=ttyS0,115200 earlycon"; - }; - - memory { ---- a/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts -+++ b/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts -@@ -17,7 +17,7 @@ - model = "Luxul XWC-1000 (BCM4708)"; - - chosen { -- bootargs = "console=ttyS0,115200"; -+ bootargs = "console=ttyS0,115200 earlycon"; - }; - - memory { ---- a/arch/arm/boot/dts/bcm4708-netgear-r6250.dts -+++ b/arch/arm/boot/dts/bcm4708-netgear-r6250.dts -@@ -17,7 +17,7 @@ - model = "Netgear R6250 V1 (BCM4708)"; - - chosen { -- bootargs = "console=ttyS0,115200"; -+ bootargs = "console=ttyS0,115200 earlycon"; - }; - - memory { ---- a/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts -+++ b/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts -@@ -17,7 +17,7 @@ - model = "SmartRG SR400ac"; - - chosen { -- bootargs = "console=ttyS0,115200"; -+ bootargs = "console=ttyS0,115200 earlycon"; - }; - - memory { ---- a/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts -+++ b/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts -@@ -17,7 +17,7 @@ - model = "Buffalo WZR-600DHP2 (BCM47081)"; - - chosen { -- bootargs = "console=ttyS0,115200"; -+ bootargs = "console=ttyS0,115200 earlycon"; - }; - - memory { ---- a/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts -+++ b/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts -@@ -17,7 +17,7 @@ - model = "D-Link DIR-885L"; - - chosen { -- bootargs = "console=ttyS0,115200"; -+ bootargs = "console=ttyS0,115200 earlycon"; - }; - - memory { ---- a/arch/arm/boot/dts/bcm5301x.dtsi -+++ b/arch/arm/boot/dts/bcm5301x.dtsi -@@ -18,6 +18,10 @@ - / { - interrupt-parent = <&gic>; - -+ chosen { -+ stdout-path = &uart0; -+ }; -+ - chipcommonA { - compatible = "simple-bus"; - ranges = <0x00000000 0x18000000 0x00001000>; diff --git a/target/linux/bcm53xx/patches-4.4/037-0001-ARM-BCM5301X-Add-DT-entry-for-SPI-controller-and-NOR.patch b/target/linux/bcm53xx/patches-4.4/037-0001-ARM-BCM5301X-Add-DT-entry-for-SPI-controller-and-NOR.patch deleted file mode 100644 index 4549396d2b..0000000000 --- a/target/linux/bcm53xx/patches-4.4/037-0001-ARM-BCM5301X-Add-DT-entry-for-SPI-controller-and-NOR.patch +++ /dev/null @@ -1,58 +0,0 @@ -From 1b47b98acce2db0da632d056821420b33205b8b2 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com> -Date: Tue, 19 Apr 2016 08:56:46 +0200 -Subject: [PATCH] ARM: BCM5301X: Add DT entry for SPI controller and NOR flash -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Controller is present on every BCM4708* board but only few devices have -serial flash attached so mark it as disabled by default. - -Signed-off-by: Rafał Miłecki <zajec5@gmail.com> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - ---- a/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts -+++ b/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts -@@ -59,3 +59,7 @@ - &uart0 { - status = "okay"; - }; -+ -+&spi_nor { -+ status = "okay"; -+}; ---- a/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts -+++ b/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts -@@ -122,3 +122,7 @@ - &uart0 { - status = "okay"; - }; -+ -+&spi_nor { -+ status = "okay"; -+}; ---- a/arch/arm/boot/dts/bcm5301x.dtsi -+++ b/arch/arm/boot/dts/bcm5301x.dtsi -@@ -225,6 +225,20 @@ - #address-cells = <1>; - #size-cells = <1>; - }; -+ -+ spi@29000 { -+ reg = <0x00029000 0x1000>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ spi_nor: spi-nor@0 { -+ compatible = "jedec,spi-nor"; -+ reg = <0>; -+ spi-max-frequency = <20000000>; -+ linux,part-probe = "ofpart", "bcm47xxpart"; -+ status = "disabled"; -+ }; -+ }; - }; - - lcpll0: lcpll0@1800c100 { diff --git a/target/linux/bcm53xx/patches-4.4/037-0002-ARM-BCM5301X-Enable-SPI-NOR-on-dual-flash-devices.patch b/target/linux/bcm53xx/patches-4.4/037-0002-ARM-BCM5301X-Enable-SPI-NOR-on-dual-flash-devices.patch deleted file mode 100644 index f15cfb79c4..0000000000 --- a/target/linux/bcm53xx/patches-4.4/037-0002-ARM-BCM5301X-Enable-SPI-NOR-on-dual-flash-devices.patch +++ /dev/null @@ -1,75 +0,0 @@ -From 5f79985dcfec73d7a09ed99c40c28b64552518fe Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com> -Date: Wed, 27 Apr 2016 09:05:03 +0200 -Subject: [PATCH] ARM: BCM5301X: Enable SPI-NOR on dual flash devices -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Commit 1b47b98acce2 ("ARM: BCM5301X: Add DT entry for SPI controller and -NOR flash") enabled SPI-NOR device on routers using serial flash only. -However there are also devices with two flash memories: -1) Small SPI attached flash used mostly for booting -2) Bigger NAND used mostly for storing firmware -On such devices we still need SPI-NOR e.g. to access NVRAM data. - -Signed-off-by: Rafał Miłecki <zajec5@gmail.com> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts | 4 ++++ - arch/arm/boot/dts/bcm4708-netgear-r6250.dts | 4 ++++ - arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts | 4 ++++ - arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts | 4 ++++ - arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts | 4 ++++ - 5 files changed, 20 insertions(+) - ---- a/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts -+++ b/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts -@@ -147,3 +147,7 @@ - &usb3 { - vcc-gpio = <&chipcommon 10 GPIO_ACTIVE_LOW>; - }; -+ -+&spi_nor { -+ status = "okay"; -+}; ---- a/arch/arm/boot/dts/bcm4708-netgear-r6250.dts -+++ b/arch/arm/boot/dts/bcm4708-netgear-r6250.dts -@@ -90,3 +90,7 @@ - &usb3 { - vcc-gpio = <&chipcommon 0 GPIO_ACTIVE_HIGH>; - }; -+ -+&spi_nor { -+ status = "okay"; -+}; ---- a/arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts -+++ b/arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts -@@ -82,3 +82,7 @@ - }; - }; - }; -+ -+&spi_nor { -+ status = "okay"; -+}; ---- a/arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts -+++ b/arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts -@@ -131,3 +131,7 @@ - &usb2 { - vcc-gpio = <&chipcommon 13 GPIO_ACTIVE_HIGH>; - }; -+ -+&spi_nor { -+ status = "okay"; -+}; ---- a/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts -+++ b/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts -@@ -113,3 +113,7 @@ - &usb3 { - vcc-gpio = <&chipcommon 18 GPIO_ACTIVE_HIGH>; - }; -+ -+&spi_nor { -+ status = "okay"; -+}; diff --git a/target/linux/bcm53xx/patches-4.4/038-0001-ARM-dts-Enable-SRAB-switch-and-GMACs-on-5301x-DTS.patch b/target/linux/bcm53xx/patches-4.4/038-0001-ARM-dts-Enable-SRAB-switch-and-GMACs-on-5301x-DTS.patch deleted file mode 100644 index 0210f7e2aa..0000000000 --- a/target/linux/bcm53xx/patches-4.4/038-0001-ARM-dts-Enable-SRAB-switch-and-GMACs-on-5301x-DTS.patch +++ /dev/null @@ -1,63 +0,0 @@ -From 59f0ce1a3ebb9288fc8c1400aa503e923621161e Mon Sep 17 00:00:00 2001 -From: Florian Fainelli <f.fainelli@gmail.com> -Date: Mon, 23 May 2016 16:38:00 -0700 -Subject: [PATCH 1/3] ARM: dts: Enable SRAB switch and GMACs on 5301x DTS - -Add the Switch Register Access Block which is a special piece of -hardware allowing us to perform indirect read/writes towards the -integrated BCM5301X Ethernet switch. - -We also add the 4 Gigabit MAC Device Tree nodes within the brcm,bus-axi -bus node to get proper binding between the BCMA instantiated core and -the Device Tree nodes. We will need that to be able to reference -Ethernet Device Tree nodes in a future patch adding the switch ports -layout. - -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/bcm5301x.dtsi | 27 +++++++++++++++++++++++++++ - 1 file changed, 27 insertions(+) - ---- a/arch/arm/boot/dts/bcm5301x.dtsi -+++ b/arch/arm/boot/dts/bcm5301x.dtsi -@@ -239,6 +239,22 @@ - status = "disabled"; - }; - }; -+ -+ gmac0: ethernet@24000 { -+ reg = <0x24000 0x800>; -+ }; -+ -+ gmac1: ethernet@25000 { -+ reg = <0x25000 0x800>; -+ }; -+ -+ gmac2: ethernet@26000 { -+ reg = <0x26000 0x800>; -+ }; -+ -+ gmac3: ethernet@27000 { -+ reg = <0x27000 0x800>; -+ }; - }; - - lcpll0: lcpll0@1800c100 { -@@ -260,6 +276,17 @@ - "sata2"; - }; - -+ srab: srab@18007000 { -+ compatible = "brcm,bcm5301x-srab"; -+ reg = <0x18007000 0x1000>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ status = "disabled"; -+ -+ /* ports are defined in board DTS */ -+ }; -+ - nand: nand@18028000 { - compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1", "brcm,brcmnand"; - reg = <0x18028000 0x600>, <0x1811a408 0x600>, <0x18028f00 0x20>; diff --git a/target/linux/bcm53xx/patches-4.4/038-0002-ARM-dts-BCM5301X-Add-SRAB-interrupts.patch b/target/linux/bcm53xx/patches-4.4/038-0002-ARM-dts-BCM5301X-Add-SRAB-interrupts.patch deleted file mode 100644 index 95375fc338..0000000000 --- a/target/linux/bcm53xx/patches-4.4/038-0002-ARM-dts-BCM5301X-Add-SRAB-interrupts.patch +++ /dev/null @@ -1,38 +0,0 @@ -From 2cd0c0202f138fa95b3fbb027e87b191ad0b1884 Mon Sep 17 00:00:00 2001 -From: Florian Fainelli <f.fainelli@gmail.com> -Date: Tue, 24 May 2016 11:41:58 -0700 -Subject: [PATCH 2/3] ARM: dts: BCM5301X: Add SRAB interrupts - -Add interrupt mapping for the Switch Register Access Block. Only 12 -interrupts are usable at the moment even though up to 32 are dedicated -to the SRAB. - -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/bcm5301x.dtsi | 15 +++++++++++++++ - 1 file changed, 15 insertions(+) - ---- a/arch/arm/boot/dts/bcm5301x.dtsi -+++ b/arch/arm/boot/dts/bcm5301x.dtsi -@@ -153,6 +153,21 @@ - /* ChipCommon */ - <0x00000000 0 &gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, - -+ /* Switch Register Access Block */ -+ <0x00007000 0 &gic GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>, -+ <0x00007000 1 &gic GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, -+ <0x00007000 2 &gic GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>, -+ <0x00007000 3 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, -+ <0x00007000 4 &gic GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>, -+ <0x00007000 5 &gic GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, -+ <0x00007000 6 &gic GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, -+ <0x00007000 7 &gic GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, -+ <0x00007000 8 &gic GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, -+ <0x00007000 9 &gic GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, -+ <0x00007000 10 &gic GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, -+ <0x00007000 11 &gic GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, -+ <0x00007000 12 &gic GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, -+ - /* PCIe Controller 0 */ - <0x00012000 0 &gic GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, - <0x00012000 1 &gic GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>, diff --git a/target/linux/bcm53xx/patches-4.4/038-0003-ARM-dts-BCM5310x-Enable-switch-ports-on-SmartRG-SR40.patch b/target/linux/bcm53xx/patches-4.4/038-0003-ARM-dts-BCM5310x-Enable-switch-ports-on-SmartRG-SR40.patch deleted file mode 100644 index 7ddb99bb33..0000000000 --- a/target/linux/bcm53xx/patches-4.4/038-0003-ARM-dts-BCM5310x-Enable-switch-ports-on-SmartRG-SR40.patch +++ /dev/null @@ -1,60 +0,0 @@ -From 2df1808dc0e2b5358e13beb95192b15200017776 Mon Sep 17 00:00:00 2001 -From: Florian Fainelli <f.fainelli@gmail.com> -Date: Wed, 25 May 2016 16:55:35 -0700 -Subject: [PATCH 3/3] ARM: dts: BCM5310x: Enable switch ports on SmartRG - SR400AC - -Define the port mapping for the SmartRG SR400ACE device. - -Reviewed-by: Andrew Lunn <andrew@lunn.ch> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts | 40 +++++++++++++++++++++++++++ - 1 file changed, 40 insertions(+) - ---- a/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts -+++ b/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts -@@ -126,3 +126,43 @@ - &spi_nor { - status = "okay"; - }; -+ -+&srab { -+ status = "okay"; -+ -+ ports { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ port@0 { -+ reg = <0>; -+ label = "lan4"; -+ }; -+ -+ port@1 { -+ reg = <1>; -+ label = "lan3"; -+ }; -+ -+ port@2 { -+ reg = <2>; -+ label = "lan2"; -+ }; -+ -+ port@3 { -+ reg = <3>; -+ label = "lan1"; -+ }; -+ -+ port@4 { -+ reg = <4>; -+ label = "wan"; -+ }; -+ -+ port@5 { -+ reg = <5>; -+ label = "cpu"; -+ ethernet = <&gmac0>; -+ }; -+ }; -+}; diff --git a/target/linux/bcm53xx/patches-4.4/039-ARM-dts-BCM5301x-Add-RNG-Device-Tree-node.patch b/target/linux/bcm53xx/patches-4.4/039-ARM-dts-BCM5301x-Add-RNG-Device-Tree-node.patch deleted file mode 100644 index 9b18ac6886..0000000000 --- a/target/linux/bcm53xx/patches-4.4/039-ARM-dts-BCM5301x-Add-RNG-Device-Tree-node.patch +++ /dev/null @@ -1,27 +0,0 @@ -From 36e55669ebdef9eaf3f4ab4e82a07bb4b95a4813 Mon Sep 17 00:00:00 2001 -From: Florian Fainelli <f.fainelli@gmail.com> -Date: Wed, 22 Jun 2016 17:27:03 -0700 -Subject: [PATCH] ARM: dts: BCM5301x: Add RNG Device Tree node - -Add the DT node for the random number generator peripheral. - -Acked-by: Scott Branden <scott.branden@broadcom.com> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/bcm5301x.dtsi | 5 +++++ - 1 file changed, 5 insertions(+) - ---- a/arch/arm/boot/dts/bcm5301x.dtsi -+++ b/arch/arm/boot/dts/bcm5301x.dtsi -@@ -302,6 +302,11 @@ - /* ports are defined in board DTS */ - }; - -+ rng: rng@18004000 { -+ compatible = "brcm,bcm5301x-rng"; -+ reg = <0x18004000 0x14>; -+ }; -+ - nand: nand@18028000 { - compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1", "brcm,brcmnand"; - reg = <0x18028000 0x600>, <0x1811a408 0x600>, <0x18028f00 0x20>; diff --git a/target/linux/bcm53xx/patches-4.4/040-ARM-dts-BCM5301x-Add-BCM953012ER-board.patch b/target/linux/bcm53xx/patches-4.4/040-ARM-dts-BCM5301x-Add-BCM953012ER-board.patch deleted file mode 100644 index dd24e2624d..0000000000 --- a/target/linux/bcm53xx/patches-4.4/040-ARM-dts-BCM5301x-Add-BCM953012ER-board.patch +++ /dev/null @@ -1,139 +0,0 @@ -From f8c331bda6a90b239f600020eec1b0defe7249b5 Mon Sep 17 00:00:00 2001 -From: Florian Fainelli <f.fainelli@gmail.com> -Date: Wed, 22 Jun 2016 17:00:35 -0700 -Subject: [PATCH] ARM: dts: BCM5301x: Add BCM953012ER board - -Add support for the Broadcom BCM953012 Enterprise Router reference -board, enable the following peripherals: - -- UART0 (UART1 is not populated) -- WPS and restart GPIO buttons -- Ethernet switch w/ only two facing ports -- NAND flash -- SPI-NOR flash - -Acked-by: Jon Mason <jon.mason@broadcom.com> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/Makefile | 1 + - arch/arm/boot/dts/bcm953012er.dts | 104 ++++++++++++++++++++++++++++++++++++++ - 2 files changed, 105 insertions(+) - create mode 100644 arch/arm/boot/dts/bcm953012er.dts - ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -79,6 +79,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \ - bcm47094-dlink-dir-885l.dtb \ - bcm94708.dtb \ - bcm94709.dtb \ -+ bcm953012er.dtb \ - bcm953012k.dtb - dtb-$(CONFIG_ARCH_BCM_63XX) += \ - bcm963138dvt.dtb ---- /dev/null -+++ b/arch/arm/boot/dts/bcm953012er.dts -@@ -0,0 +1,104 @@ -+/* -+ * BSD LICENSE -+ * -+ * Copyright(c) 2016 Broadcom. All rights reserved. -+ * -+ * Redistribution and use in source and binary forms, with or without -+ * modification, are permitted provided that the following conditions -+ * are met: -+ * -+ * * Redistributions of source code must retain the above copyright -+ * notice, this list of conditions and the following disclaimer. -+ * * Redistributions in binary form must reproduce the above copyright -+ * notice, this list of conditions and the following disclaimer in -+ * the documentation and/or other materials provided with the -+ * distribution. -+ * * Neither the name of Broadcom Corporation nor the names of its -+ * contributors may be used to endorse or promote products derived -+ * from this software without specific prior written permission. -+ * -+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ */ -+ -+/dts-v1/; -+ -+#include "bcm4708.dtsi" -+#include "bcm5301x-nand-cs0-bch8.dtsi" -+ -+/ { -+ model = "NorthStar Enterprise Router (BCM953012ER)"; -+ compatible = "brcm,bcm953012er", "brcm,brcm53012", "brcm,bcm4708"; -+ -+ aliases { -+ serial0 = &uart0; -+ }; -+ -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ -+ memory { -+ reg = <0x00000000 0x8000000>; -+ }; -+ -+ gpio-keys { -+ compatible = "gpio-keys"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ wps { -+ label = "WPS"; -+ linux,code = <KEY_WPS_BUTTON>; -+ gpios = <&chipcommon 6 GPIO_ACTIVE_LOW>; -+ }; -+ -+ restart { -+ label = "Reset"; -+ linux,code = <KEY_RESTART>; -+ gpios = <&chipcommon 15 GPIO_ACTIVE_LOW>; -+ }; -+ }; -+}; -+ -+&uart0 { -+ status = "okay"; -+}; -+ -+&spi_nor { -+ status = "okay"; -+}; -+ -+&srab { -+ status = "okay"; -+ -+ ports { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ port@0 { -+ reg = <0>; -+ label = "port0"; -+ }; -+ -+ port@1 { -+ reg = <1>; -+ label = "port1"; -+ }; -+ -+ port@5 { -+ reg = <5>; -+ label = "cpu"; -+ ethernet = <&gmac0>; -+ }; -+ }; -+}; diff --git a/target/linux/bcm53xx/patches-4.4/041-0001-ARM-BCM5301X-Specify-NAND-chip-select-and-ECC-in-sep.patch b/target/linux/bcm53xx/patches-4.4/041-0001-ARM-BCM5301X-Specify-NAND-chip-select-and-ECC-in-sep.patch deleted file mode 100644 index 77a90c3fcd..0000000000 --- a/target/linux/bcm53xx/patches-4.4/041-0001-ARM-BCM5301X-Specify-NAND-chip-select-and-ECC-in-sep.patch +++ /dev/null @@ -1,65 +0,0 @@ -From 8ab5f1fbd39c29125403678a0caf0a71046da361 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com> -Date: Mon, 6 Jun 2016 09:43:49 +0200 -Subject: [PATCH 1/2] ARM: BCM5301X: Specify NAND chip select and ECC in - separated files -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Using separated file with common chip select parameters will allow us -adding other ECC setups without code duplication. - -Signed-off-by: Rafał Miłecki <zajec5@gmail.com> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/bcm5301x-nand-cs0-bch8.dtsi | 16 +++++----------- - arch/arm/boot/dts/bcm5301x-nand-cs0.dtsi | 18 ++++++++++++++++++ - 2 files changed, 23 insertions(+), 11 deletions(-) - create mode 100644 arch/arm/boot/dts/bcm5301x-nand-cs0.dtsi - ---- a/arch/arm/boot/dts/bcm5301x-nand-cs0-bch8.dtsi -+++ b/arch/arm/boot/dts/bcm5301x-nand-cs0-bch8.dtsi -@@ -9,16 +9,10 @@ - * Licensed under the GNU/GPL. See COPYING for details. - */ - --/ { -- nand@18028000 { -- nandcs@0 { -- compatible = "brcm,nandcs"; -- reg = <0>; -- #address-cells = <1>; -- #size-cells = <1>; -+#include "bcm5301x-nand-cs0.dtsi" - -- nand-ecc-strength = <8>; -- nand-ecc-step-size = <512>; -- }; -- }; -+&nandcs { -+ nand-ecc-algo = "bch"; -+ nand-ecc-strength = <8>; -+ nand-ecc-step-size = <512>; - }; ---- /dev/null -+++ b/arch/arm/boot/dts/bcm5301x-nand-cs0.dtsi -@@ -0,0 +1,18 @@ -+/* -+ * Broadcom Northstar NAND. -+ * -+ * Copyright (C) 2015 Hauke Mehrtens <hauke@hauke-m.de> -+ * -+ * Licensed under the GNU/GPL. See COPYING for details. -+ */ -+ -+/ { -+ nand@18028000 { -+ nandcs: nandcs@0 { -+ compatible = "brcm,nandcs"; -+ reg = <0>; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ }; -+ }; -+}; diff --git a/target/linux/bcm53xx/patches-4.4/041-0002-ARM-BCM5301X-Fix-NAND-ECC-parameters-for-D-Link-DIR-.patch b/target/linux/bcm53xx/patches-4.4/041-0002-ARM-BCM5301X-Fix-NAND-ECC-parameters-for-D-Link-DIR-.patch deleted file mode 100644 index e27d41485f..0000000000 --- a/target/linux/bcm53xx/patches-4.4/041-0002-ARM-BCM5301X-Fix-NAND-ECC-parameters-for-D-Link-DIR-.patch +++ /dev/null @@ -1,49 +0,0 @@ -From 70a0ae1c33572f012b734d4b574f38136c57f1a0 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com> -Date: Mon, 6 Jun 2016 09:43:50 +0200 -Subject: [PATCH 2/2] ARM: BCM5301X: Fix NAND ECC parameters for D-Link - DIR-885L -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This device uses BCH-1 instead of BCH-8. This fixes ECC errors and makes -NAND usable with brcmnand. - -Signed-off-by: Rafał Miłecki <zajec5@gmail.com> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts | 2 +- - arch/arm/boot/dts/bcm5301x-nand-cs0-bch1.dtsi | 15 +++++++++++++++ - 2 files changed, 16 insertions(+), 1 deletion(-) - create mode 100644 arch/arm/boot/dts/bcm5301x-nand-cs0-bch1.dtsi - ---- a/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts -+++ b/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts -@@ -10,7 +10,7 @@ - /dts-v1/; - - #include "bcm4708.dtsi" --#include "bcm5301x-nand-cs0-bch8.dtsi" -+#include "bcm5301x-nand-cs0-bch1.dtsi" - - / { - compatible = "dlink,dir-885l", "brcm,bcm47094", "brcm,bcm4708"; ---- /dev/null -+++ b/arch/arm/boot/dts/bcm5301x-nand-cs0-bch1.dtsi -@@ -0,0 +1,15 @@ -+/* -+ * Broadcom Northstar NAND. -+ * -+ * Copyright (C) 2016 Rafał Miłecki <rafal.milecki@gmail.com> -+ * -+ * Licensed under the ISC license. -+ */ -+ -+#include "bcm5301x-nand-cs0.dtsi" -+ -+&nandcs { -+ nand-ecc-algo = "bch"; -+ nand-ecc-strength = <1>; -+ nand-ecc-step-size = <512>; -+}; diff --git a/target/linux/bcm53xx/patches-4.4/042-ARM-BCM5301X-Specify-PHY-of-USB-2.0-in-DT.patch b/target/linux/bcm53xx/patches-4.4/042-ARM-BCM5301X-Specify-PHY-of-USB-2.0-in-DT.patch deleted file mode 100644 index e95a513c78..0000000000 --- a/target/linux/bcm53xx/patches-4.4/042-ARM-BCM5301X-Specify-PHY-of-USB-2.0-in-DT.patch +++ /dev/null @@ -1,46 +0,0 @@ -From 773880f77ae0a6782dd3da176bd25d85ff3a8c7f Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com> -Date: Wed, 1 Jun 2016 22:07:07 +0200 -Subject: [PATCH] ARM: BCM5301X: Specify PHY of USB 2.0 in DT -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Driver for Northstar USB 2.0 PHY was added in 4.7-rc1 by: -commit d3feb4067335 ("phy: bcm-ns-usb2: new driver for USB 2.0 PHY on -Northstar"). -It should be used to let EHCI platform driver init PHY. - -Signed-off-by: Rafał Miłecki <zajec5@gmail.com> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/bcm5301x.dtsi | 11 +++++++++++ - 1 file changed, 11 insertions(+) - ---- a/arch/arm/boot/dts/bcm5301x.dtsi -+++ b/arch/arm/boot/dts/bcm5301x.dtsi -@@ -140,6 +140,15 @@ - }; - }; - -+ usb2_phy: usb2-phy { -+ compatible = "brcm,ns-usb2-phy"; -+ reg = <0x1800c000 0x1000>; -+ reg-names = "dmu"; -+ #phy-cells = <0>; -+ clocks = <&genpll BCM_NSP_GENPLL_USB_PHY_REF_CLK>; -+ clock-names = "phy-ref-clk"; -+ }; -+ - axi@18000000 { - compatible = "brcm,bus-axi"; - reg = <0x18000000 0x1000>; -@@ -232,6 +241,8 @@ - - #address-cells = <1>; - #size-cells = <1>; -+ -+ phys = <&usb2_phy>; - }; - - usb3: usb3@23000 { diff --git a/target/linux/bcm53xx/patches-4.4/043-0001-ARM-BCM53573-Initial-support-for-Broadcom-BCM53573-S.patch b/target/linux/bcm53xx/patches-4.4/043-0001-ARM-BCM53573-Initial-support-for-Broadcom-BCM53573-S.patch deleted file mode 100644 index 3b687c23bc..0000000000 --- a/target/linux/bcm53xx/patches-4.4/043-0001-ARM-BCM53573-Initial-support-for-Broadcom-BCM53573-S.patch +++ /dev/null @@ -1,61 +0,0 @@ -From 4ebd50472899eb07d5dfc24f2015dce6fe3c5cb8 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Sun, 21 Aug 2016 19:01:38 +0200 -Subject: [PATCH] ARM: BCM53573: Initial support for Broadcom BCM53573 SoCs -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -BCM53573 series is a new family with embedded wireless. By marketing -people it's sometimes called Northstar but it uses different CPU and has -different architecture so we need a new symbol for it. -Fortunately it shares some peripherals with other iProc based SoCs so we -will be able to reuse some drivers/bindings. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Acked-by: Jon Mason <jon.mason@broadcom.com> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - MAINTAINERS | 7 +++++++ - arch/arm/mach-bcm/Kconfig | 14 ++++++++++++++ - 2 files changed, 21 insertions(+) - ---- a/MAINTAINERS -+++ b/MAINTAINERS -@@ -2338,6 +2338,13 @@ F: arch/arm/mach-bcm/bcm_5301x.c - F: arch/arm/boot/dts/bcm5301x.dtsi - F: arch/arm/boot/dts/bcm470* - -+BROADCOM BCM53573 ARM ARCHITECTURE -+M: Rafał Miłecki <rafal@milecki.pl> -+L: linux-arm-kernel@lists.infradead.org -+S: Maintained -+F: arch/arm/boot/dts/bcm53573* -+F: arch/arm/boot/dts/bcm47189* -+ - BROADCOM BCM63XX ARM ARCHITECTURE - M: Florian Fainelli <f.fainelli@gmail.com> - L: linux-arm-kernel@lists.infradead.org ---- a/arch/arm/mach-bcm/Kconfig -+++ b/arch/arm/mach-bcm/Kconfig -@@ -141,6 +141,20 @@ config ARCH_BCM2835 - This enables support for the Broadcom BCM2835 SoC. This SoC is - used in the Raspberry Pi and Roku 2 devices. - -+config ARCH_BCM_53573 -+ bool "Broadcom BCM53573 SoC series support" -+ depends on ARCH_MULTI_V7 -+ select ARCH_BCM_IPROC -+ select HAVE_ARM_ARCH_TIMER -+ help -+ BCM53573 series is set of SoCs using ARM Cortex-A7 CPUs with wireless -+ embedded in the chipset. -+ This SoC line is mostly used in home routers and is some cheaper -+ alternative for Northstar family. -+ -+ The base chip is BCM53573 and there are some packaging modifications -+ like BCM47189 and BCM47452. -+ - config ARCH_BCM_63XX - bool "Broadcom BCM63xx DSL SoC" if ARCH_MULTI_V7 - depends on MMU diff --git a/target/linux/bcm53xx/patches-4.4/044-0001-ARM-BCM5301X-Add-DT-for-Netgear-R8500.patch b/target/linux/bcm53xx/patches-4.4/044-0001-ARM-BCM5301X-Add-DT-for-Netgear-R8500.patch deleted file mode 100644 index 954e8f927f..0000000000 --- a/target/linux/bcm53xx/patches-4.4/044-0001-ARM-BCM5301X-Add-DT-for-Netgear-R8500.patch +++ /dev/null @@ -1,136 +0,0 @@ -From b5057e498da8211ac3cc8ff5780034e5da61d077 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Tue, 23 Aug 2016 08:40:32 +0200 -Subject: [PATCH] ARM: BCM5301X: Add DT for Netgear R8500 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Netgear R8500 is another BCM47094 device, it just has three BCM4366 -wireless chipsets. It's a very standard DT with mostly GPIO devices. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/Makefile | 1 + - arch/arm/boot/dts/bcm47094-netgear-r8500.dts | 104 +++++++++++++++++++++++++++ - 2 files changed, 105 insertions(+) - create mode 100644 arch/arm/boot/dts/bcm47094-netgear-r8500.dts - ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -77,6 +77,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \ - bcm4709-netgear-r7000.dtb \ - bcm4709-netgear-r8000.dtb \ - bcm47094-dlink-dir-885l.dtb \ -+ bcm47094-netgear-r8500.dtb \ - bcm94708.dtb \ - bcm94709.dtb \ - bcm953012er.dtb \ ---- /dev/null -+++ b/arch/arm/boot/dts/bcm47094-netgear-r8500.dts -@@ -0,0 +1,104 @@ -+/* -+ * Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl> -+ * -+ * Licensed under the ISC license. -+ */ -+ -+/dts-v1/; -+ -+#include "bcm4708.dtsi" -+#include "bcm5301x-nand-cs0-bch8.dtsi" -+ -+/ { -+ compatible = "netgear,r8500", "brcm,bcm47094", "brcm,bcm4708"; -+ model = "Netgear R8500"; -+ -+ chosen { -+ bootargs = "console=ttyS0,115200"; -+ }; -+ -+ memory { -+ reg = <0x00000000 0x08000000>; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ -+ power0 { -+ label = "bcm53xx:white:power"; -+ gpios = <&chipcommon 2 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "default-on"; -+ }; -+ -+ power1 { -+ label = "bcm53xx:amber:power"; -+ gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "default-off"; -+ }; -+ -+ 5ghz-1 { -+ label = "bcm53xx:white:5ghz-1"; -+ gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "default-off"; -+ }; -+ -+ 5ghz-2 { -+ label = "bcm53xx:white:5ghz-2"; -+ gpios = <&chipcommon 12 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "default-off"; -+ }; -+ -+ 2ghz { -+ label = "bcm53xx:white:2ghz"; -+ gpios = <&chipcommon 13 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "default-off"; -+ }; -+ -+ usb2 { -+ label = "bcm53xx:white:usb2"; -+ gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "default-off"; -+ }; -+ -+ usb3 { -+ label = "bcm53xx:white:usb3"; -+ gpios = <&chipcommon 18 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "default-off"; -+ }; -+ }; -+ -+ gpio-keys { -+ compatible = "gpio-keys"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ brightness { -+ label = "Backlight"; -+ linux,code = <KEY_BRIGHTNESS_ZERO>; -+ gpios = <&chipcommon 1 GPIO_ACTIVE_LOW>; -+ }; -+ -+ restart { -+ label = "Reset"; -+ linux,code = <KEY_RESTART>; -+ gpios = <&chipcommon 10 GPIO_ACTIVE_LOW>; -+ }; -+ -+ wps { -+ label = "WPS"; -+ linux,code = <KEY_WPS_BUTTON>; -+ gpios = <&chipcommon 14 GPIO_ACTIVE_LOW>; -+ }; -+ -+ rfkill { -+ label = "WiFi"; -+ linux,code = <KEY_RFKILL>; -+ gpios = <&chipcommon 20 GPIO_ACTIVE_LOW>; -+ }; -+ }; -+}; -+ -+&uart0 { -+ status = "okay"; -+ clock-frequency = <125000000>; -+}; diff --git a/target/linux/bcm53xx/patches-4.4/044-0002-ARM-BCM5301X-Add-basic-dts-for-BCM53573-based-Tenda-.patch b/target/linux/bcm53xx/patches-4.4/044-0002-ARM-BCM5301X-Add-basic-dts-for-BCM53573-based-Tenda-.patch deleted file mode 100644 index a1c462dfc2..0000000000 --- a/target/linux/bcm53xx/patches-4.4/044-0002-ARM-BCM5301X-Add-basic-dts-for-BCM53573-based-Tenda-.patch +++ /dev/null @@ -1,264 +0,0 @@ -From 21c29be6a69d3ef4f5a2e16272deb4845f8208ad Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com> -Date: Tue, 23 Aug 2016 07:37:43 +0200 -Subject: [PATCH] ARM: BCM5301X: Add basic dts for BCM53573 based Tenda AC9 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -BCM53573 seems to be low priced alternative for Northstar chipsts. It -uses single core Cortex-A7 and doesn't have SDU or local (TWD) timer. It -was also stripped out of independent SPI controller and 2 GMACs. - -DTS for Tenda AC9 isn't completed yet. It misses e.g. switch entry (we -still need some b53 fixes) and probably some clocks. It adds support for -basic features however and can be improved later. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/Makefile | 2 + - arch/arm/boot/dts/bcm47189-tenda-ac9.dts | 74 ++++++++++++++++ - arch/arm/boot/dts/bcm53573.dtsi | 147 +++++++++++++++++++++++++++++++ - 3 files changed, 223 insertions(+) - create mode 100644 arch/arm/boot/dts/bcm47189-tenda-ac9.dts - create mode 100644 arch/arm/boot/dts/bcm53573.dtsi - ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -82,6 +82,8 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \ - bcm94709.dtb \ - bcm953012er.dtb \ - bcm953012k.dtb -+dtb-$(CONFIG_ARCH_BCM_53573) += \ -+ bcm47189-tenda-ac9.dtb - dtb-$(CONFIG_ARCH_BCM_63XX) += \ - bcm963138dvt.dtb - dtb-$(CONFIG_ARCH_BCM_CYGNUS) += \ ---- /dev/null -+++ b/arch/arm/boot/dts/bcm47189-tenda-ac9.dts -@@ -0,0 +1,74 @@ -+/* -+ * Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl> -+ * -+ * Licensed under the ISC license. -+ */ -+ -+/dts-v1/; -+ -+#include "bcm53573.dtsi" -+ -+/ { -+ compatible = "tenda,ac9", "brcm,bcm47189", "brcm,bcm53573"; -+ model = "Tenda AC9"; -+ -+ chosen { -+ bootargs = "console=ttyS0,115200 earlycon"; -+ }; -+ -+ memory { -+ reg = <0x00000000 0x08000000>; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ -+ usb { -+ label = "bcm53xx:blue:usb"; -+ gpios = <&chipcommon 1 GPIO_ACTIVE_HIGH>; -+ linux,default-trigger = "default-off"; -+ }; -+ -+ wps { -+ label = "bcm53xx:blue:wps"; -+ gpios = <&chipcommon 10 GPIO_ACTIVE_HIGH>; -+ linux,default-trigger = "default-off"; -+ }; -+ -+ 5ghz { -+ label = "bcm53xx:blue:5ghz"; -+ gpios = <&chipcommon 11 GPIO_ACTIVE_HIGH>; -+ linux,default-trigger = "default-off"; -+ }; -+ -+ system { -+ label = "bcm53xx:blue:system"; -+ gpios = <&chipcommon 15 GPIO_ACTIVE_HIGH>; -+ linux,default-trigger = "timer"; -+ }; -+ }; -+ -+ gpio-keys { -+ compatible = "gpio-keys"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ rfkill { -+ label = "WiFi"; -+ linux,code = <KEY_RFKILL>; -+ gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>; -+ }; -+ -+ restart { -+ label = "Reset"; -+ linux,code = <KEY_RESTART>; -+ gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>; -+ }; -+ -+ wps { -+ label = "WPS"; -+ linux,code = <KEY_WPS_BUTTON>; -+ gpios = <&chipcommon 9 GPIO_ACTIVE_LOW>; -+ }; -+ }; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/bcm53573.dtsi -@@ -0,0 +1,147 @@ -+/* -+ * Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl> -+ * -+ * Licensed under the ISC license. -+ */ -+ -+#include <dt-bindings/gpio/gpio.h> -+#include <dt-bindings/input/input.h> -+#include <dt-bindings/interrupt-controller/irq.h> -+#include <dt-bindings/interrupt-controller/arm-gic.h> -+#include "skeleton.dtsi" -+ -+/ { -+ interrupt-parent = <&gic>; -+ -+ chosen { -+ stdout-path = &uart0; -+ }; -+ -+ cpus { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ cpu@0 { -+ device_type = "cpu"; -+ compatible = "arm,cortex-a7"; -+ reg = <0x0>; -+ }; -+ }; -+ -+ mpcore { -+ compatible = "simple-bus"; -+ ranges = <0x00000000 0x18310000 0x00008000>; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ gic: interrupt-controller@1000 { -+ compatible = "arm,cortex-a7-gic"; -+ #interrupt-cells = <3>; -+ #address-cells = <0>; -+ interrupt-controller; -+ reg = <0x1000 0x1000>, -+ <0x2000 0x0100>; -+ }; -+ }; -+ -+ clocks { -+ #address-cells = <1>; -+ #size-cells = <1>; -+ ranges; -+ -+ alp: oscillator { -+ #clock-cells = <0>; -+ compatible = "fixed-clock"; -+ clock-frequency = <40000000>; -+ }; -+ }; -+ -+ axi@18000000 { -+ compatible = "brcm,bus-axi"; -+ reg = <0x18000000 0x1000>; -+ ranges = <0x00000000 0x18000000 0x00100000>; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ #interrupt-cells = <1>; -+ interrupt-map-mask = <0x000fffff 0xffff>; -+ interrupt-map = -+ /* ChipCommon */ -+ <0x00000000 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, -+ -+ /* IEEE 802.11 0 */ -+ <0x00001000 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, -+ -+ /* PCIe Controller 0 */ -+ <0x00002000 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, -+ <0x00002000 1 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, -+ <0x00002000 2 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, -+ <0x00002000 3 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, -+ <0x00002000 4 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, -+ <0x00002000 5 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, -+ -+ /* USB 2.0 Controller */ -+ <0x00004000 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, -+ -+ /* Ethernet Controller 0 */ -+ <0x00005000 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, -+ -+ /* IEEE 802.11 1 */ -+ <0x0000a000 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, -+ -+ /* Ethernet Controller 1 */ -+ <0x0000b000 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; -+ -+ chipcommon: chipcommon@0 { -+ compatible = "simple-bus"; -+ reg = <0x00000000 0x1000>; -+ ranges; -+ -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ gpio-controller; -+ #gpio-cells = <2>; -+ -+ uart0: serial@0300 { -+ compatible = "ns16550a"; -+ reg = <0x0300 0x100>; -+ interrupt-parent = <&gic>; -+ interrupts = <GIC_PPI 16 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&alp>; -+ status = "okay"; -+ }; -+ }; -+ -+ usb2: usb2@4000 { -+ reg = <0x4000 0x1000>; -+ ranges; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ ehci: ehci@4000 { -+ compatible = "generic-ehci"; -+ reg = <0x4000 0x1000>; -+ interrupt-parent = <&gic>; -+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; -+ }; -+ -+ ohci: ohci@d000 { -+ #usb-cells = <0>; -+ -+ compatible = "generic-ohci"; -+ reg = <0xd000 0x1000>; -+ interrupt-parent = <&gic>; -+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; -+ }; -+ }; -+ -+ gmac0: ethernet@5000 { -+ reg = <0x5000 0x1000>; -+ }; -+ -+ gmac1: ethernet@b000 { -+ reg = <0xb000 0x1000>; -+ }; -+ }; -+}; diff --git a/target/linux/bcm53xx/patches-4.4/044-0003-ARM-BCM5301X-Add-separated-DTS-include-file-for-BCM4.patch b/target/linux/bcm53xx/patches-4.4/044-0003-ARM-BCM5301X-Add-separated-DTS-include-file-for-BCM4.patch deleted file mode 100644 index 43c4574db1..0000000000 --- a/target/linux/bcm53xx/patches-4.4/044-0003-ARM-BCM5301X-Add-separated-DTS-include-file-for-BCM4.patch +++ /dev/null @@ -1,70 +0,0 @@ -From 345fd105ff676ef672d1e41b31165b47aa040dab Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Wed, 21 Sep 2016 22:58:32 +0200 -Subject: [PATCH] ARM: BCM5301X: Add separated DTS include file for BCM47094 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Use it to store BCM47094 specific properties/values and avoid repeating -them in device DTS files. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts | 3 +-- - arch/arm/boot/dts/bcm47094-netgear-r8500.dts | 3 +-- - arch/arm/boot/dts/bcm47094.dtsi | 11 +++++++++++ - 3 files changed, 13 insertions(+), 4 deletions(-) - create mode 100644 arch/arm/boot/dts/bcm47094.dtsi - ---- a/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts -+++ b/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts -@@ -9,7 +9,7 @@ - - /dts-v1/; - --#include "bcm4708.dtsi" -+#include "bcm47094.dtsi" - #include "bcm5301x-nand-cs0-bch1.dtsi" - - / { -@@ -107,7 +107,6 @@ - - &uart0 { - status = "okay"; -- clock-frequency = <125000000>; - }; - - &usb3 { ---- a/arch/arm/boot/dts/bcm47094-netgear-r8500.dts -+++ b/arch/arm/boot/dts/bcm47094-netgear-r8500.dts -@@ -6,7 +6,7 @@ - - /dts-v1/; - --#include "bcm4708.dtsi" -+#include "bcm47094.dtsi" - #include "bcm5301x-nand-cs0-bch8.dtsi" - - / { -@@ -100,5 +100,4 @@ - - &uart0 { - status = "okay"; -- clock-frequency = <125000000>; - }; ---- /dev/null -+++ b/arch/arm/boot/dts/bcm47094.dtsi -@@ -0,0 +1,11 @@ -+/* -+ * Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl> -+ * -+ * Licensed under the ISC license. -+ */ -+ -+#include "bcm4708.dtsi" -+ -+&uart0 { -+ clock-frequency = <125000000>; -+}; diff --git a/target/linux/bcm53xx/patches-4.4/044-0004-ARM-BCM5301X-Enable-UART-on-Netgear-R8000.patch b/target/linux/bcm53xx/patches-4.4/044-0004-ARM-BCM5301X-Enable-UART-on-Netgear-R8000.patch deleted file mode 100644 index 65dc796e0d..0000000000 --- a/target/linux/bcm53xx/patches-4.4/044-0004-ARM-BCM5301X-Enable-UART-on-Netgear-R8000.patch +++ /dev/null @@ -1,92 +0,0 @@ -From 3ede027b3dce2fca07350b7587c7c8f44706c94c Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Wed, 21 Sep 2016 22:58:33 +0200 -Subject: [PATCH] ARM: BCM5301X: Enable UART on Netgear R8000 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -It was tested by LEDE users, all we need is to adjust clock frequency. -While we're at it create a separated DTS include file to share code with -other BCM4709 devices easier. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts | 2 +- - arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts | 2 +- - arch/arm/boot/dts/bcm4709-netgear-r7000.dts | 2 +- - arch/arm/boot/dts/bcm4709-netgear-r8000.dts | 6 +++++- - arch/arm/boot/dts/bcm4709.dtsi | 11 +++++++++++ - 5 files changed, 19 insertions(+), 4 deletions(-) - create mode 100644 arch/arm/boot/dts/bcm4709.dtsi - ---- a/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts -+++ b/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts -@@ -9,7 +9,7 @@ - - /dts-v1/; - --#include "bcm4708.dtsi" -+#include "bcm4709.dtsi" - #include "bcm5301x-nand-cs0-bch8.dtsi" - - / { ---- a/arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts -+++ b/arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts -@@ -9,7 +9,7 @@ - - /dts-v1/; - --#include "bcm4708.dtsi" -+#include "bcm4709.dtsi" - #include "bcm5301x-nand-cs0-bch8.dtsi" - - / { ---- a/arch/arm/boot/dts/bcm4709-netgear-r7000.dts -+++ b/arch/arm/boot/dts/bcm4709-netgear-r7000.dts -@@ -9,7 +9,7 @@ - - /dts-v1/; - --#include "bcm4708.dtsi" -+#include "bcm4709.dtsi" - #include "bcm5301x-nand-cs0-bch8.dtsi" - - / { ---- a/arch/arm/boot/dts/bcm4709-netgear-r8000.dts -+++ b/arch/arm/boot/dts/bcm4709-netgear-r8000.dts -@@ -9,7 +9,7 @@ - - /dts-v1/; - --#include "bcm4708.dtsi" -+#include "bcm4709.dtsi" - #include "bcm5301x-nand-cs0-bch8.dtsi" - - / { -@@ -107,6 +107,10 @@ - }; - }; - -+&uart0 { -+ status = "okay"; -+}; -+ - &usb2 { - vcc-gpio = <&chipcommon 0 GPIO_ACTIVE_HIGH>; - }; ---- /dev/null -+++ b/arch/arm/boot/dts/bcm4709.dtsi -@@ -0,0 +1,11 @@ -+/* -+ * Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl> -+ * -+ * Licensed under the ISC license. -+ */ -+ -+#include "bcm4708.dtsi" -+ -+&uart0 { -+ clock-frequency = <125000000>; -+}; diff --git a/target/linux/bcm53xx/patches-4.4/044-0005-ARM-BCM5301X-Specify-USB-3.0-PHY-in-DT.patch b/target/linux/bcm53xx/patches-4.4/044-0005-ARM-BCM5301X-Specify-USB-3.0-PHY-in-DT.patch deleted file mode 100644 index 73bc90e6a1..0000000000 --- a/target/linux/bcm53xx/patches-4.4/044-0005-ARM-BCM5301X-Specify-USB-3.0-PHY-in-DT.patch +++ /dev/null @@ -1,51 +0,0 @@ -From 5b92db97f4ae345bd6f045c9427471680a7fe2e7 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Wed, 21 Sep 2016 22:58:34 +0200 -Subject: [PATCH] ARM: BCM5301X: Specify USB 3.0 PHY in DT -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Driver for Northstar USB 3.0 PHY has been recently added under the name -phy-bcm-ns-usb3. Add binding for it into the DT files. -The only slightly tricky part is BCM47094 which uses different PHY -version and requires different compatible value. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/bcm47094.dtsi | 6 ++++++ - arch/arm/boot/dts/bcm5301x.dtsi | 7 +++++++ - 2 files changed, 13 insertions(+) - ---- a/arch/arm/boot/dts/bcm47094.dtsi -+++ b/arch/arm/boot/dts/bcm47094.dtsi -@@ -6,6 +6,12 @@ - - #include "bcm4708.dtsi" - -+/ { -+ usb3_phy: usb3-phy { -+ compatible = "brcm,ns-bx-usb3-phy"; -+ }; -+}; -+ - &uart0 { - clock-frequency = <125000000>; - }; ---- a/arch/arm/boot/dts/bcm5301x.dtsi -+++ b/arch/arm/boot/dts/bcm5301x.dtsi -@@ -149,6 +149,13 @@ - clock-names = "phy-ref-clk"; - }; - -+ usb3_phy: usb3-phy { -+ compatible = "brcm,ns-ax-usb3-phy"; -+ reg = <0x18105000 0x1000>, <0x18003000 0x1000>; -+ reg-names = "dmp", "ccb-mii"; -+ #phy-cells = <0>; -+ }; -+ - axi@18000000 { - compatible = "brcm,bus-axi"; - reg = <0x18000000 0x1000>; diff --git a/target/linux/bcm53xx/patches-4.4/044-0006-ARM-BCM5301X-Add-DT-for-Luxul-XAP-1510.patch b/target/linux/bcm53xx/patches-4.4/044-0006-ARM-BCM5301X-Add-DT-for-Luxul-XAP-1510.patch deleted file mode 100644 index 3052bd0f46..0000000000 --- a/target/linux/bcm53xx/patches-4.4/044-0006-ARM-BCM5301X-Add-DT-for-Luxul-XAP-1510.patch +++ /dev/null @@ -1,93 +0,0 @@ -From 46daccf62d1651bf8b09978478ca6465a7a81f47 Mon Sep 17 00:00:00 2001 -From: Dan Haab <dhaab@luxul.com> -Date: Tue, 27 Sep 2016 11:27:10 -0600 -Subject: [PATCH] ARM: BCM5301X: Add DT for Luxul XAP-1510 - -Luxul XAP-1510 is an AP device based on BCM4708 SoC with 2 x BCM4360 -chipsets on PCB connected using PCIe. - -Signed-off-by: Dan Haab <dhaab@luxul.com> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/Makefile | 1 + - arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts | 64 ++++++++++++++++++++++++++++ - 2 files changed, 65 insertions(+) - create mode 100644 arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts - ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -65,6 +65,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \ - bcm4708-asus-rt-ac56u.dtb \ - bcm4708-asus-rt-ac68u.dtb \ - bcm4708-buffalo-wzr-1750dhp.dtb \ -+ bcm4708-luxul-xap-1510.dtb \ - bcm4708-luxul-xwc-1000.dtb \ - bcm4708-netgear-r6250.dtb \ - bcm4708-netgear-r6300-v2.dtb \ ---- /dev/null -+++ b/arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts -@@ -0,0 +1,64 @@ -+/* -+ * Copyright 2016 Luxul Inc. -+ * -+ * Licensed under the ISC license. -+ */ -+ -+/dts-v1/; -+ -+#include "bcm4708.dtsi" -+ -+/ { -+ compatible = "luxul,xap-1510v1", "brcm,bcm4708"; -+ model = "Luxul XAP-1510 V1"; -+ -+ chosen { -+ bootargs = "console=ttyS0,115200 earlycon"; -+ }; -+ -+ memory { -+ reg = <0x00000000 0x08000000>; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ -+ 5ghz { -+ label = "bcm53xx:blue:5ghz"; -+ gpios = <&chipcommon 13 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "none"; -+ }; -+ -+ 2ghz { -+ label = "bcm53xx:blue:2ghz"; -+ gpios = <&chipcommon 14 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "none"; -+ }; -+ -+ status { -+ label = "bcm53xx:green:status"; -+ gpios = <&chipcommon 15 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "timer"; -+ }; -+ }; -+ -+ gpio-keys { -+ compatible = "gpio-keys"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ restart { -+ label = "Reset"; -+ linux,code = <KEY_RESTART>; -+ gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>; -+ }; -+ }; -+}; -+ -+&uart0 { -+ status = "okay"; -+}; -+ -+&spi_nor { -+ status = "okay"; -+}; diff --git a/target/linux/bcm53xx/patches-4.4/044-0007-ARM-BCM5301X-Add-DT-for-Luxul-XWR-3100.patch b/target/linux/bcm53xx/patches-4.4/044-0007-ARM-BCM5301X-Add-DT-for-Luxul-XWR-3100.patch deleted file mode 100644 index 3067af84df..0000000000 --- a/target/linux/bcm53xx/patches-4.4/044-0007-ARM-BCM5301X-Add-DT-for-Luxul-XWR-3100.patch +++ /dev/null @@ -1,159 +0,0 @@ -From ef3bc318adeb15b38688df6a583bafea2befce43 Mon Sep 17 00:00:00 2001 -From: Dan Haab <dhaab@luxul.com> -Date: Tue, 27 Sep 2016 11:27:11 -0600 -Subject: [PATCH] ARM: BCM5301X: Add DT for Luxul XWR-3100 - -Luxul XWR-3100 is a wireless router based on BCM47094 SoC with two -4366c0 FullMAC PCIe cards on the PCB. It uses NAND with BCH-4 ECC -algorithm. - -Signed-off-by: Dan Haab <dhaab@luxul.com> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/Makefile | 1 + - arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts | 111 ++++++++++++++++++++++++++ - arch/arm/boot/dts/bcm5301x-nand-cs0-bch4.dtsi | 13 +++ - 3 files changed, 125 insertions(+) - create mode 100644 arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts - create mode 100644 arch/arm/boot/dts/bcm5301x-nand-cs0-bch4.dtsi - ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -78,6 +78,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \ - bcm4709-netgear-r7000.dtb \ - bcm4709-netgear-r8000.dtb \ - bcm47094-dlink-dir-885l.dtb \ -+ bcm47094-luxul-xwr-3100.dtb \ - bcm47094-netgear-r8500.dtb \ - bcm94708.dtb \ - bcm94709.dtb \ ---- /dev/null -+++ b/arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts -@@ -0,0 +1,111 @@ -+/* -+ * Copyright 2016 Luxul Inc. -+ * -+ * Licensed under the ISC license. -+ */ -+ -+/dts-v1/; -+ -+#include "bcm47094.dtsi" -+#include "bcm5301x-nand-cs0-bch4.dtsi" -+ -+/ { -+ compatible = "luxul,xwr-3100v1", "brcm,bcm47094", "brcm,bcm4708"; -+ model = "Luxul XWR-3100 V1"; -+ -+ chosen { -+ bootargs = "console=ttyS0,115200 earlycon"; -+ }; -+ -+ memory { -+ reg = <0x00000000 0x08000000>; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ -+ power { -+ label = "bcm53xx:green:power"; -+ gpios = <&chipcommon 0 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "default-on"; -+ }; -+ -+ lan3 { -+ label = "bcm53xx:green:lan1"; -+ gpios = <&chipcommon 1 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "default-off"; -+ }; -+ -+ lan4 { -+ label = "bcm53xx:green:lan0"; -+ gpios = <&chipcommon 2 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "default-off"; -+ }; -+ -+ wan { -+ label = "bcm53xx:green:wan"; -+ gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "default-off"; -+ }; -+ -+ lan1 { -+ label = "bcm53xx:green:lan3"; -+ gpios = <&chipcommon 4 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "default-off"; -+ }; -+ -+ lan2 { -+ label = "bcm53xx:green:lan2"; -+ gpios = <&chipcommon 6 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "default-off"; -+ }; -+ -+ usb3 { -+ label = "bcm53xx:green:usb3"; -+ gpios = <&chipcommon 8 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "default-off"; -+ }; -+ -+ status { -+ label = "bcm53xx:green:status"; -+ gpios = <&chipcommon 10 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "timer"; -+ }; -+ -+ 2ghz { -+ label = "bcm53xx:green:2ghz"; -+ gpios = <&chipcommon 13 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "default-off"; -+ }; -+ -+ 5ghz { -+ label = "bcm53xx:green:5ghz"; -+ gpios = <&chipcommon 14 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "default-off"; -+ }; -+ }; -+ -+ gpio-keys { -+ compatible = "gpio-keys"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ restart { -+ label = "Reset"; -+ linux,code = <KEY_RESTART>; -+ gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>; -+ }; -+ }; -+}; -+ -+&uart0 { -+ status = "okay"; -+}; -+ -+&usb3 { -+ vcc-gpio = <&chipcommon 18 GPIO_ACTIVE_HIGH>; -+}; -+ -+&spi_nor { -+ status = "okay"; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/bcm5301x-nand-cs0-bch4.dtsi -@@ -0,0 +1,13 @@ -+/* -+ * Copyright 2016 Luxul Inc. -+ * -+ * Licensed under the ISC license. -+ */ -+ -+#include "bcm5301x-nand-cs0.dtsi" -+ -+&nandcs { -+ nand-ecc-algo = "bch"; -+ nand-ecc-strength = <4>; -+ nand-ecc-step-size = <512>; -+}; diff --git a/target/linux/bcm53xx/patches-4.4/044-0008-ARM-BCM53573-Specify-PMU-and-its-ILP-clock-in-the-DT.patch b/target/linux/bcm53xx/patches-4.4/044-0008-ARM-BCM53573-Specify-PMU-and-its-ILP-clock-in-the-DT.patch deleted file mode 100644 index b6e9c4a862..0000000000 --- a/target/linux/bcm53xx/patches-4.4/044-0008-ARM-BCM53573-Specify-PMU-and-its-ILP-clock-in-the-DT.patch +++ /dev/null @@ -1,38 +0,0 @@ -From 547f23183d9d77b51754689a71e3e58d085ccaec Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Sat, 17 Sep 2016 22:13:46 +0200 -Subject: [PATCH] ARM: BCM53573: Specify PMU and its ILP clock in the DT -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -ILP clock (sometimes called a "slow clock") is a part of PMU (Power -Management Unit). There has been recently added a driver for it, so add -a proper entry in the DT as well. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/bcm53573.dtsi | 12 ++++++++++++ - 1 file changed, 12 insertions(+) - ---- a/arch/arm/boot/dts/bcm53573.dtsi -+++ b/arch/arm/boot/dts/bcm53573.dtsi -@@ -143,5 +143,17 @@ - gmac1: ethernet@b000 { - reg = <0xb000 0x1000>; - }; -+ -+ pmu@12000 { -+ compatible = "simple-mfd", "syscon"; -+ reg = <0x00012000 0x00001000>; -+ -+ ilp: ilp { -+ compatible = "brcm,bcm53573-ilp"; -+ clocks = <&alp>; -+ #clock-cells = <0>; -+ clock-output-names = "ilp"; -+ }; -+ }; - }; - }; diff --git a/target/linux/bcm53xx/patches-4.4/044-0009-ARM-BCM5301X-Add-DT-for-TP-LINK-Archer-C9-V1.patch b/target/linux/bcm53xx/patches-4.4/044-0009-ARM-BCM5301X-Add-DT-for-TP-LINK-Archer-C9-V1.patch deleted file mode 100644 index 5b2aa2622a..0000000000 --- a/target/linux/bcm53xx/patches-4.4/044-0009-ARM-BCM5301X-Add-DT-for-TP-LINK-Archer-C9-V1.patch +++ /dev/null @@ -1,146 +0,0 @@ -From 41182beb217c47cfbaaf26a60f22a8b3943faa61 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Sun, 13 Nov 2016 11:12:09 +0100 -Subject: [PATCH] ARM: BCM5301X: Add DT for TP-LINK Archer C9 V1 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -It's BCM4709A0 based device with 16 MiB flash, 128 MiB of RAM and two -PCIe based on-PCB BCM4360 chipsets. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/Makefile | 1 + - arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts | 114 ++++++++++++++++++++++ - 2 files changed, 115 insertions(+) - create mode 100644 arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts - ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -77,6 +77,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \ - bcm4709-buffalo-wxr-1900dhp.dtb \ - bcm4709-netgear-r7000.dtb \ - bcm4709-netgear-r8000.dtb \ -+ bcm4709-tplink-archer-c9-v1.dtb \ - bcm47094-dlink-dir-885l.dtb \ - bcm47094-luxul-xwr-3100.dtb \ - bcm47094-netgear-r8500.dtb \ ---- /dev/null -+++ b/arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts -@@ -0,0 +1,114 @@ -+/* -+ * Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl> -+ * -+ * Licensed under the ISC license. -+ */ -+ -+/dts-v1/; -+ -+#include "bcm4709.dtsi" -+ -+/ { -+ compatible = "tplink,archer-c9-v1", "brcm,bcm4709", "brcm,bcm4708"; -+ model = "TP-LINK Archer C9 V1"; -+ -+ chosen { -+ bootargs = "console=ttyS0,115200 earlycon"; -+ }; -+ -+ memory { -+ reg = <0x00000000 0x08000000>; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ -+ lan { -+ label = "bcm53xx:blue:lan"; -+ gpios = <&chipcommon 1 GPIO_ACTIVE_HIGH>; -+ linux,default-trigger = "default-off"; -+ }; -+ -+ wps { -+ label = "bcm53xx:blue:wps"; -+ gpios = <&chipcommon 2 GPIO_ACTIVE_HIGH>; -+ linux,default-trigger = "default-off"; -+ }; -+ -+ 2ghz { -+ label = "bcm53xx:blue:2ghz"; -+ gpios = <&chipcommon 4 GPIO_ACTIVE_HIGH>; -+ linux,default-trigger = "default-off"; -+ }; -+ -+ 5ghz { -+ label = "bcm53xx:blue:5ghz"; -+ gpios = <&chipcommon 5 GPIO_ACTIVE_HIGH>; -+ linux,default-trigger = "default-off"; -+ }; -+ -+ usb3 { -+ label = "bcm53xx:blue:usb3"; -+ gpios = <&chipcommon 6 GPIO_ACTIVE_HIGH>; -+ linux,default-trigger = "default-off"; -+ }; -+ -+ usb2 { -+ label = "bcm53xx:blue:usb2"; -+ gpios = <&chipcommon 7 GPIO_ACTIVE_HIGH>; -+ linux,default-trigger = "default-off"; -+ }; -+ -+ wan-blue { -+ label = "bcm53xx:blue:wan"; -+ gpios = <&chipcommon 14 GPIO_ACTIVE_HIGH>; -+ linux,default-trigger = "default-off"; -+ }; -+ -+ wan-amber { -+ label = "bcm53xx:amber:wan"; -+ gpios = <&chipcommon 15 GPIO_ACTIVE_HIGH>; -+ linux,default-trigger = "default-off"; -+ }; -+ -+ power { -+ label = "bcm53xx:blue:power"; -+ gpios = <&chipcommon 18 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "default-on"; -+ }; -+ }; -+ -+ gpio-keys { -+ compatible = "gpio-keys"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ wps { -+ label = "WPS"; -+ linux,code = <KEY_WPS_BUTTON>; -+ gpios = <&chipcommon 0 GPIO_ACTIVE_LOW>; -+ }; -+ -+ restart { -+ label = "Reset"; -+ linux,code = <KEY_RESTART>; -+ gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>; -+ }; -+ }; -+}; -+ -+&uart0 { -+ status = "okay"; -+}; -+ -+&usb2 { -+ vcc-gpio = <&chipcommon 13 GPIO_ACTIVE_HIGH>; -+}; -+ -+&usb3 { -+ vcc-gpio = <&chipcommon 12 GPIO_ACTIVE_HIGH>; -+}; -+ -+&spi_nor { -+ status = "okay"; -+}; diff --git a/target/linux/bcm53xx/patches-4.4/045-ARM-BCM5301X-Add-back-handler-ignoring-external-impr.patch b/target/linux/bcm53xx/patches-4.4/045-ARM-BCM5301X-Add-back-handler-ignoring-external-impr.patch deleted file mode 100644 index a4f32f5c14..0000000000 --- a/target/linux/bcm53xx/patches-4.4/045-ARM-BCM5301X-Add-back-handler-ignoring-external-impr.patch +++ /dev/null @@ -1,75 +0,0 @@ -From 09f3510fb70a46c8921f2cf4a90dbcae460a6820 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Sat, 29 Oct 2016 13:12:29 +0200 -Subject: [PATCH] ARM: BCM5301X: Add back handler ignoring external imprecise - aborts -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Since early BCM5301X days we got abort handler that was removed by -commit 937b12306ea79 ("ARM: BCM5301X: remove workaround imprecise abort -fault handler"). It assumed we need to deal only with pending aborts -left by the bootloader. Unfortunately this isn't true for BCM5301X. - -When probing PCI config space (device enumeration) it is expected to -have master aborts on the PCI bus. Most bridges don't forward (or they -allow disabling it) these errors onto the AXI/AMBA bus but not the -Northstar (BCM5301X) one. - -iProc PCIe controller on Northstar seems to be some older one, without -a control register for errors forwarding. It means we need to workaround -this at platform level. All newer platforms are not affected by this -issue. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/mach-bcm/bcm_5301x.c | 28 ++++++++++++++++++++++++++++ - 1 file changed, 28 insertions(+) - ---- a/arch/arm/mach-bcm/bcm_5301x.c -+++ b/arch/arm/mach-bcm/bcm_5301x.c -@@ -9,14 +9,42 @@ - #include <asm/hardware/cache-l2x0.h> - - #include <asm/mach/arch.h> -+#include <asm/siginfo.h> -+#include <asm/signal.h> -+ -+#define FSR_EXTERNAL (1 << 12) -+#define FSR_READ (0 << 10) -+#define FSR_IMPRECISE 0x0406 - - static const char *const bcm5301x_dt_compat[] __initconst = { - "brcm,bcm4708", - NULL, - }; - -+static int bcm5301x_abort_handler(unsigned long addr, unsigned int fsr, -+ struct pt_regs *regs) -+{ -+ /* -+ * We want to ignore aborts forwarded from the PCIe bus that are -+ * expected and shouldn't really be passed by the PCIe controller. -+ * The biggest disadvantage is the same FSR code may be reported when -+ * reading non-existing APB register and we shouldn't ignore that. -+ */ -+ if (fsr == (FSR_EXTERNAL | FSR_READ | FSR_IMPRECISE)) -+ return 0; -+ -+ return 1; -+} -+ -+static void __init bcm5301x_init_early(void) -+{ -+ hook_fault_code(16 + 6, bcm5301x_abort_handler, SIGBUS, BUS_OBJERR, -+ "imprecise external abort"); -+} -+ - DT_MACHINE_START(BCM5301X, "BCM5301X") - .l2c_aux_val = 0, - .l2c_aux_mask = ~0, - .dt_compat = bcm5301x_dt_compat, -+ .init_early = bcm5301x_init_early, - MACHINE_END diff --git a/target/linux/bcm53xx/patches-4.4/046-0001-ARM-BCM5301X-Enable-UART-by-default-for-BCM4708-1-BC.patch b/target/linux/bcm53xx/patches-4.4/046-0001-ARM-BCM5301X-Enable-UART-by-default-for-BCM4708-1-BC.patch deleted file mode 100644 index cc10d21d71..0000000000 --- a/target/linux/bcm53xx/patches-4.4/046-0001-ARM-BCM5301X-Enable-UART-by-default-for-BCM4708-1-BC.patch +++ /dev/null @@ -1,269 +0,0 @@ -From 2b354a7c56f375ba414b9b9c96f160f5749e5e64 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Thu, 1 Dec 2016 18:40:51 +0100 -Subject: [PATCH 1/6] ARM: BCM5301X: Enable UART by default for BCM4708(1), - BCM4709(4) & BCM53012 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Every device tested so far got UART0 (at 0x18000300) working as serial -console. It's most likely part of reference design and all vendors use -it that way. - -It seems to be easier to enable it by default and just disable it if we -ever see a device with different hardware design. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Acked-by: Jon Mason <jon.mason@broadcom.com> -Acked-by: Hauke Mehrtens <hauke@hauke-m.de> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts | 4 ---- - arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts | 4 ---- - arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts | 4 ---- - arch/arm/boot/dts/bcm4708-netgear-r6250.dts | 4 ---- - arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts | 4 ---- - arch/arm/boot/dts/bcm4708.dtsi | 4 ++++ - arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts | 4 ---- - arch/arm/boot/dts/bcm47081.dtsi | 4 ++++ - arch/arm/boot/dts/bcm4709-netgear-r7000.dts | 4 ---- - arch/arm/boot/dts/bcm4709-netgear-r8000.dts | 4 ---- - arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts | 4 ---- - arch/arm/boot/dts/bcm4709.dtsi | 1 + - arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts | 4 ---- - arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts | 4 ---- - arch/arm/boot/dts/bcm47094-netgear-r8500.dts | 4 ---- - arch/arm/boot/dts/bcm47094.dtsi | 1 + - arch/arm/boot/dts/bcm94708.dts | 4 ---- - arch/arm/boot/dts/bcm94709.dts | 4 ---- - arch/arm/boot/dts/bcm953012er.dts | 4 ---- - arch/arm/boot/dts/bcm953012k.dts | 1 - - 20 files changed, 10 insertions(+), 61 deletions(-) - ---- a/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts -+++ b/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts -@@ -136,10 +136,6 @@ - }; - }; - --&uart0 { -- status = "okay"; --}; -- - &usb2 { - vcc-gpio = <&chipcommon 9 GPIO_ACTIVE_HIGH>; - }; ---- a/arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts -+++ b/arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts -@@ -55,10 +55,6 @@ - }; - }; - --&uart0 { -- status = "okay"; --}; -- - &spi_nor { - status = "okay"; - }; ---- a/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts -+++ b/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts -@@ -56,10 +56,6 @@ - }; - }; - --&uart0 { -- status = "okay"; --}; -- - &spi_nor { - status = "okay"; - }; ---- a/arch/arm/boot/dts/bcm4708-netgear-r6250.dts -+++ b/arch/arm/boot/dts/bcm4708-netgear-r6250.dts -@@ -83,10 +83,6 @@ - }; - }; - --&uart0 { -- status = "okay"; --}; -- - &usb3 { - vcc-gpio = <&chipcommon 0 GPIO_ACTIVE_HIGH>; - }; ---- a/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts -+++ b/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts -@@ -119,10 +119,6 @@ - }; - }; - --&uart0 { -- status = "okay"; --}; -- - &spi_nor { - status = "okay"; - }; ---- a/arch/arm/boot/dts/bcm4708.dtsi -+++ b/arch/arm/boot/dts/bcm4708.dtsi -@@ -34,3 +34,7 @@ - }; - - }; -+ -+&uart0 { -+ status = "okay"; -+}; ---- a/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts -+++ b/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts -@@ -122,7 +122,3 @@ - }; - }; - }; -- --&uart0 { -- status = "okay"; --}; ---- a/arch/arm/boot/dts/bcm47081.dtsi -+++ b/arch/arm/boot/dts/bcm47081.dtsi -@@ -24,3 +24,7 @@ - }; - }; - }; -+ -+&uart0 { -+ status = "okay"; -+}; ---- a/arch/arm/boot/dts/bcm4709-netgear-r7000.dts -+++ b/arch/arm/boot/dts/bcm4709-netgear-r7000.dts -@@ -100,7 +100,3 @@ - }; - }; - }; -- --&uart0 { -- status = "okay"; --}; ---- a/arch/arm/boot/dts/bcm4709-netgear-r8000.dts -+++ b/arch/arm/boot/dts/bcm4709-netgear-r8000.dts -@@ -107,10 +107,6 @@ - }; - }; - --&uart0 { -- status = "okay"; --}; -- - &usb2 { - vcc-gpio = <&chipcommon 0 GPIO_ACTIVE_HIGH>; - }; ---- a/arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts -+++ b/arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts -@@ -97,10 +97,6 @@ - }; - }; - --&uart0 { -- status = "okay"; --}; -- - &usb2 { - vcc-gpio = <&chipcommon 13 GPIO_ACTIVE_HIGH>; - }; ---- a/arch/arm/boot/dts/bcm4709.dtsi -+++ b/arch/arm/boot/dts/bcm4709.dtsi -@@ -8,4 +8,5 @@ - - &uart0 { - clock-frequency = <125000000>; -+ status = "okay"; - }; ---- a/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts -+++ b/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts -@@ -105,10 +105,6 @@ - }; - }; - --&uart0 { -- status = "okay"; --}; -- - &usb3 { - vcc-gpio = <&chipcommon 18 GPIO_ACTIVE_HIGH>; - }; ---- a/arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts -+++ b/arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts -@@ -98,10 +98,6 @@ - }; - }; - --&uart0 { -- status = "okay"; --}; -- - &usb3 { - vcc-gpio = <&chipcommon 18 GPIO_ACTIVE_HIGH>; - }; ---- a/arch/arm/boot/dts/bcm47094-netgear-r8500.dts -+++ b/arch/arm/boot/dts/bcm47094-netgear-r8500.dts -@@ -97,7 +97,3 @@ - }; - }; - }; -- --&uart0 { -- status = "okay"; --}; ---- a/arch/arm/boot/dts/bcm47094.dtsi -+++ b/arch/arm/boot/dts/bcm47094.dtsi -@@ -14,4 +14,5 @@ - - &uart0 { - clock-frequency = <125000000>; -+ status = "okay"; - }; ---- a/arch/arm/boot/dts/bcm94708.dts -+++ b/arch/arm/boot/dts/bcm94708.dts -@@ -50,7 +50,3 @@ - reg = <0x00000000 0x08000000>; - }; - }; -- --&uart0 { -- status = "okay"; --}; ---- a/arch/arm/boot/dts/bcm94709.dts -+++ b/arch/arm/boot/dts/bcm94709.dts -@@ -50,7 +50,3 @@ - reg = <0x00000000 0x08000000>; - }; - }; -- --&uart0 { -- status = "okay"; --}; ---- a/arch/arm/boot/dts/bcm953012er.dts -+++ b/arch/arm/boot/dts/bcm953012er.dts -@@ -70,10 +70,6 @@ - }; - }; - --&uart0 { -- status = "okay"; --}; -- - &spi_nor { - status = "okay"; - }; ---- a/arch/arm/boot/dts/bcm953012k.dts -+++ b/arch/arm/boot/dts/bcm953012k.dts -@@ -54,7 +54,6 @@ - - &uart0 { - clock-frequency = <62499840>; -- status = "okay"; - }; - - &uart1 { diff --git a/target/linux/bcm53xx/patches-4.4/046-0002-ARM-BCM5301X-Fix-LAN-LED-labels-for-Luxul-XWR-3100.patch b/target/linux/bcm53xx/patches-4.4/046-0002-ARM-BCM5301X-Fix-LAN-LED-labels-for-Luxul-XWR-3100.patch deleted file mode 100644 index 71c1d0cc09..0000000000 --- a/target/linux/bcm53xx/patches-4.4/046-0002-ARM-BCM5301X-Fix-LAN-LED-labels-for-Luxul-XWR-3100.patch +++ /dev/null @@ -1,43 +0,0 @@ -From 24e24f72379638d598aec5d0525ef57d5bfc5c51 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Wed, 7 Dec 2016 08:56:51 +0100 -Subject: [PATCH 2/6] ARM: BCM5301X: Fix LAN LED labels for Luxul XWR-3100 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -They were named incorrectly most likely due to copy & paste mistake. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts | 6 +++--- - 1 file changed, 3 insertions(+), 3 deletions(-) - ---- a/arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts -+++ b/arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts -@@ -31,13 +31,13 @@ - }; - - lan3 { -- label = "bcm53xx:green:lan1"; -+ label = "bcm53xx:green:lan3"; - gpios = <&chipcommon 1 GPIO_ACTIVE_LOW>; - linux,default-trigger = "default-off"; - }; - - lan4 { -- label = "bcm53xx:green:lan0"; -+ label = "bcm53xx:green:lan4"; - gpios = <&chipcommon 2 GPIO_ACTIVE_LOW>; - linux,default-trigger = "default-off"; - }; -@@ -49,7 +49,7 @@ - }; - - lan1 { -- label = "bcm53xx:green:lan3"; -+ label = "bcm53xx:green:lan1"; - gpios = <&chipcommon 4 GPIO_ACTIVE_LOW>; - linux,default-trigger = "default-off"; - }; diff --git a/target/linux/bcm53xx/patches-4.4/046-0003-ARM-BCM5301X-Specify-USB-controllers-in-DT.patch b/target/linux/bcm53xx/patches-4.4/046-0003-ARM-BCM5301X-Specify-USB-controllers-in-DT.patch deleted file mode 100644 index 5ecda17bb5..0000000000 --- a/target/linux/bcm53xx/patches-4.4/046-0003-ARM-BCM5301X-Specify-USB-controllers-in-DT.patch +++ /dev/null @@ -1,68 +0,0 @@ -From 45d2567b4b80a3f267502419aaad3d74b745dae7 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Wed, 7 Dec 2016 08:56:52 +0100 -Subject: [PATCH 3/6] ARM: BCM5301X: Specify USB controllers in DT -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -There are 3 separated controllers, one per USB /standard/. With PHY -drivers in place they can be simply supported with generic drivers. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Reviewed-by: Ray Jui <ray.jui@broadcom.com> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/bcm5301x.dtsi | 33 ++++++++++++++++++++++++++++++++- - 1 file changed, 32 insertions(+), 1 deletion(-) - ---- a/arch/arm/boot/dts/bcm5301x.dtsi -+++ b/arch/arm/boot/dts/bcm5301x.dtsi -@@ -248,8 +248,26 @@ - - #address-cells = <1>; - #size-cells = <1>; -+ ranges; - -- phys = <&usb2_phy>; -+ interrupt-parent = <&gic>; -+ -+ ehci: ehci@21000 { -+ #usb-cells = <0>; -+ -+ compatible = "generic-ehci"; -+ reg = <0x00021000 0x1000>; -+ interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; -+ phys = <&usb2_phy>; -+ }; -+ -+ ohci: ohci@22000 { -+ #usb-cells = <0>; -+ -+ compatible = "generic-ohci"; -+ reg = <0x00022000 0x1000>; -+ interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; -+ }; - }; - - usb3: usb3@23000 { -@@ -257,6 +275,19 @@ - - #address-cells = <1>; - #size-cells = <1>; -+ ranges; -+ -+ interrupt-parent = <&gic>; -+ -+ xhci: xhci@23000 { -+ #usb-cells = <0>; -+ -+ compatible = "generic-xhci"; -+ reg = <0x00023000 0x1000>; -+ interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; -+ phys = <&usb3_phy>; -+ phy-names = "usb"; -+ }; - }; - - spi@29000 { diff --git a/target/linux/bcm53xx/patches-4.4/046-0004-ARM-BCM5301X-Set-GPIO-enabling-USB-power-on-Netgear-.patch b/target/linux/bcm53xx/patches-4.4/046-0004-ARM-BCM5301X-Set-GPIO-enabling-USB-power-on-Netgear-.patch deleted file mode 100644 index 84d0009002..0000000000 --- a/target/linux/bcm53xx/patches-4.4/046-0004-ARM-BCM5301X-Set-GPIO-enabling-USB-power-on-Netgear-.patch +++ /dev/null @@ -1,31 +0,0 @@ -From 1aca202b721ce8643f87a8f85a686595c1be6b60 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Wed, 7 Dec 2016 08:56:53 +0100 -Subject: [PATCH 4/6] ARM: BCM5301X: Set GPIO enabling USB power on Netgear - R7000 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -There is one GPIO controlling power for both USB ports. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/bcm4709-netgear-r7000.dts | 8 ++++++++ - 1 file changed, 8 insertions(+) - ---- a/arch/arm/boot/dts/bcm4709-netgear-r7000.dts -+++ b/arch/arm/boot/dts/bcm4709-netgear-r7000.dts -@@ -100,3 +100,11 @@ - }; - }; - }; -+ -+&usb2 { -+ vcc-gpio = <&chipcommon 0 GPIO_ACTIVE_HIGH>; -+}; -+ -+&usb3 { -+ vcc-gpio = <&chipcommon 0 GPIO_ACTIVE_HIGH>; -+}; diff --git a/target/linux/bcm53xx/patches-4.4/046-0005-ARM-BCM5301X-Specify-all-RAM-by-including-an-extra-b.patch b/target/linux/bcm53xx/patches-4.4/046-0005-ARM-BCM5301X-Specify-all-RAM-by-including-an-extra-b.patch deleted file mode 100644 index 05b7abe749..0000000000 --- a/target/linux/bcm53xx/patches-4.4/046-0005-ARM-BCM5301X-Specify-all-RAM-by-including-an-extra-b.patch +++ /dev/null @@ -1,236 +0,0 @@ -From 94afd3b99c65072b76edd25f73bad89587b83261 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Wed, 7 Dec 2016 08:56:54 +0100 -Subject: [PATCH 5/6] ARM: BCM5301X: Specify all RAM by including an extra - block -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -The first 128 MiB of RAM can be accessed using an alias at address 0x0. - -In theory we could access whole RAM using 0x80000000 - 0xbfffffff range -(up to 1 GiB) but it doesn't seem to work on Northstar. For some reason -(hardware setup left by the bootloader maybe?) 0x80000000 - 0x87ffffff -range can't be used. I reproduced this problem on: -1) Buffalo WZR-600DHP2 (BCM47081) -2) Netgear R6250 (BCM4708) -3) D-Link DIR-885L (BCM47094) - -So it seems we're forced to access first 128 MiB using alias at 0x0 and -the rest using real base address + 128 MiB offset which is 0x88000000. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Acked-by: Jon Mason <jon.mason@broadcom.com> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dts | 3 ++- - arch/arm/boot/dts/bcm4708-asus-rt-ac68u.dts | 3 ++- - arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts | 3 ++- - arch/arm/boot/dts/bcm4708-netgear-r6250.dts | 3 ++- - arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts | 3 ++- - arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts | 3 ++- - arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts | 3 ++- - arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts | 3 ++- - arch/arm/boot/dts/bcm47081-buffalo-wzr-900dhp.dts | 3 ++- - arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts | 3 ++- - arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts | 3 ++- - arch/arm/boot/dts/bcm4709-netgear-r7000.dts | 3 ++- - arch/arm/boot/dts/bcm4709-netgear-r8000.dts | 3 ++- - arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts | 3 ++- - arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts | 3 ++- - arch/arm/boot/dts/bcm47094-netgear-r8500.dts | 3 ++- - 16 files changed, 32 insertions(+), 16 deletions(-) - ---- a/arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dts -+++ b/arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dts -@@ -21,7 +21,8 @@ - }; - - memory { -- reg = <0x00000000 0x08000000>; -+ reg = <0x00000000 0x08000000 -+ 0x88000000 0x08000000>; - }; - - leds { ---- a/arch/arm/boot/dts/bcm4708-asus-rt-ac68u.dts -+++ b/arch/arm/boot/dts/bcm4708-asus-rt-ac68u.dts -@@ -21,7 +21,8 @@ - }; - - memory { -- reg = <0x00000000 0x08000000>; -+ reg = <0x00000000 0x08000000 -+ 0x88000000 0x08000000>; - }; - - leds { ---- a/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts -+++ b/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts -@@ -21,7 +21,8 @@ - }; - - memory { -- reg = <0x00000000 0x08000000>; -+ reg = <0x00000000 0x08000000 -+ 0x88000000 0x18000000>; - }; - - spi { ---- a/arch/arm/boot/dts/bcm4708-netgear-r6250.dts -+++ b/arch/arm/boot/dts/bcm4708-netgear-r6250.dts -@@ -21,7 +21,8 @@ - }; - - memory { -- reg = <0x00000000 0x08000000>; -+ reg = <0x00000000 0x08000000 -+ 0x88000000 0x08000000>; - }; - - leds { ---- a/arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts -+++ b/arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts -@@ -21,7 +21,8 @@ - }; - - memory { -- reg = <0x00000000 0x08000000>; -+ reg = <0x00000000 0x08000000 -+ 0x88000000 0x08000000>; - }; - - leds { ---- a/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts -+++ b/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts -@@ -21,7 +21,8 @@ - }; - - memory { -- reg = <0x00000000 0x08000000>; -+ reg = <0x00000000 0x08000000 -+ 0x88000000 0x08000000>; - }; - - leds { ---- a/arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts -+++ b/arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts -@@ -21,7 +21,8 @@ - }; - - memory { -- reg = <0x00000000 0x08000000>; -+ reg = <0x00000000 0x08000000 -+ 0x88000000 0x08000000>; - }; - - leds { ---- a/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts -+++ b/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts -@@ -21,7 +21,8 @@ - }; - - memory { -- reg = <0x00000000 0x08000000>; -+ reg = <0x00000000 0x08000000 -+ 0x88000000 0x08000000>; - }; - - spi { ---- a/arch/arm/boot/dts/bcm47081-buffalo-wzr-900dhp.dts -+++ b/arch/arm/boot/dts/bcm47081-buffalo-wzr-900dhp.dts -@@ -21,7 +21,8 @@ - }; - - memory { -- reg = <0x00000000 0x08000000>; -+ reg = <0x00000000 0x08000000 -+ 0x88000000 0x08000000>; - }; - - gpio-keys { ---- a/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts -+++ b/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts -@@ -21,7 +21,8 @@ - }; - - memory { -- reg = <0x00000000 0x08000000>; -+ reg = <0x00000000 0x08000000 -+ 0x88000000 0x08000000>; - }; - - leds { ---- a/arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts -+++ b/arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts -@@ -21,7 +21,8 @@ - }; - - memory { -- reg = <0x00000000 0x08000000>; -+ reg = <0x00000000 0x08000000 -+ 0x88000000 0x18000000>; - }; - - leds { ---- a/arch/arm/boot/dts/bcm4709-netgear-r7000.dts -+++ b/arch/arm/boot/dts/bcm4709-netgear-r7000.dts -@@ -21,7 +21,8 @@ - }; - - memory { -- reg = <0x00000000 0x08000000>; -+ reg = <0x00000000 0x08000000 -+ 0x88000000 0x08000000>; - }; - - leds { ---- a/arch/arm/boot/dts/bcm4709-netgear-r8000.dts -+++ b/arch/arm/boot/dts/bcm4709-netgear-r8000.dts -@@ -21,7 +21,8 @@ - }; - - memory { -- reg = <0x00000000 0x08000000>; -+ reg = <0x00000000 0x08000000 -+ 0x88000000 0x08000000>; - }; - - leds { ---- a/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts -+++ b/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts -@@ -21,7 +21,8 @@ - }; - - memory { -- reg = <0x00000000 0x08000000>; -+ reg = <0x00000000 0x08000000 -+ 0x88000000 0x08000000>; - }; - - nand: nand@18028000 { ---- a/arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts -+++ b/arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts -@@ -18,7 +18,8 @@ - }; - - memory { -- reg = <0x00000000 0x08000000>; -+ reg = <0x00000000 0x08000000 -+ 0x88000000 0x08000000>; - }; - - leds { ---- a/arch/arm/boot/dts/bcm47094-netgear-r8500.dts -+++ b/arch/arm/boot/dts/bcm47094-netgear-r8500.dts -@@ -18,7 +18,8 @@ - }; - - memory { -- reg = <0x00000000 0x08000000>; -+ reg = <0x00000000 0x08000000 -+ 0x88000000 0x18000000>; - }; - - leds { diff --git a/target/linux/bcm53xx/patches-4.4/046-0006-ARM-BCM53573-Specify-USB-ports-of-on-SoC-controllers.patch b/target/linux/bcm53xx/patches-4.4/046-0006-ARM-BCM53573-Specify-USB-ports-of-on-SoC-controllers.patch deleted file mode 100644 index a39a31f015..0000000000 --- a/target/linux/bcm53xx/patches-4.4/046-0006-ARM-BCM53573-Specify-USB-ports-of-on-SoC-controllers.patch +++ /dev/null @@ -1,56 +0,0 @@ -From 92c6f000cb3a4280166d812d88cda3011717b548 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Wed, 7 Dec 2016 08:56:55 +0100 -Subject: [PATCH 6/6] ARM: BCM53573: Specify USB ports of on-SoC controllers -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Broadcom OHCI and EHCI controllers always have 2 ports each on the root -hub. Describe them in DT to allow specifying extra info or referencing -port nodes. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/bcm53573.dtsi | 22 ++++++++++++++++++++++ - 1 file changed, 22 insertions(+) - ---- a/arch/arm/boot/dts/bcm53573.dtsi -+++ b/arch/arm/boot/dts/bcm53573.dtsi -@@ -124,6 +124,17 @@ - reg = <0x4000 0x1000>; - interrupt-parent = <&gic>; - interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; -+ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ ehci_port1: port@1 { -+ reg = <1>; -+ }; -+ -+ ehci_port2: port@2 { -+ reg = <2>; -+ }; - }; - - ohci: ohci@d000 { -@@ -133,6 +144,17 @@ - reg = <0xd000 0x1000>; - interrupt-parent = <&gic>; - interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; -+ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ ohci_port1: port@1 { -+ reg = <1>; -+ }; -+ -+ ohci_port2: port@2 { -+ reg = <2>; -+ }; - }; - }; - diff --git a/target/linux/bcm53xx/patches-4.4/046-0007-ARM-BCM5301X-Set-5-GHz-wireless-frequency-limits-on-.patch b/target/linux/bcm53xx/patches-4.4/046-0007-ARM-BCM5301X-Set-5-GHz-wireless-frequency-limits-on-.patch deleted file mode 100644 index 7debd03af2..0000000000 --- a/target/linux/bcm53xx/patches-4.4/046-0007-ARM-BCM5301X-Set-5-GHz-wireless-frequency-limits-on-.patch +++ /dev/null @@ -1,126 +0,0 @@ -From d3af86018715ebb19f4111f80e545405b208f09b Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Sat, 14 Jan 2017 00:58:57 +0100 -Subject: [PATCH] ARM: BCM5301X: Set 5 GHz wireless frequency limits on Netgear - R8000 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Netgear R8000 is a tri-band home router. It has three BCM43602 chipsets -two of them for 5 GHz band. Both seem the same and their firmwares -report the same set of channels. The problem is due to hardware / board -design there are extra limitations that should be respected. - -First PHY should be used for U-NII-2 and U-NII-3. Third PHY should be -used for U-NII-1. Using them in a different way may result in wireless -not working or in noticeably reduced performance. Basic version of this -info was provided by Broadcom employee, then it has been verified by me -using original vendor firmware (which has limitations hardcoded in UI). - -This patch uses recently introduced ieee80211-freq-limit property to -describe these limitations at DT level. - -Referencing PCIe devices in DT required specifying all related bridges. -Below you can see (a bit complex) PCI tree from R8000 that explains all -entries that I needed to put in DT. - -0000:00:00.0 14e4:8012 Bridge Device -└─ 0000:01:00.0 14e4:aa52 Network Controller - -0001:00:00.0 14e4:8012 Bridge Device -└─ 0001:01:00.0 10b5:8603 Bridge Device - ├─ 0001:02:01.0 10b5:8603 Bridge Device - │ └─ 0001:03:00.0 14e4:aa52 Network Controller - ├─ 0001:02:02.0 10b5:8603 Bridge Device - │ └─ 0001:04:00.0 14e4:aa52 Network Controller - ├─ 0001:02:03.0 000d:0000 0x000000 - ├─ 0001:02:04.0 000d:0000 0x000000 - ├─ 0001:02:05.0 000d:0000 0x000000 - ├─ 0001:02:06.0 000d:0000 0x000000 - ├─ (...) - ├─ 0001:02:1d.0 000d:0000 0x000000 - ├─ 0001:02:1e.0 000d:0000 0x000000 - └─ 0001:02:1f.0 000d:0000 0x000000 - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/bcm4709-netgear-r8000.dts | 48 +++++++++++++++++++++++++++++ - arch/arm/boot/dts/bcm5301x.dtsi | 8 +++++ - 2 files changed, 56 insertions(+) - ---- a/arch/arm/boot/dts/bcm4709-netgear-r8000.dts -+++ b/arch/arm/boot/dts/bcm4709-netgear-r8000.dts -@@ -108,6 +108,54 @@ - }; - }; - -+&pcie0 { -+ #address-cells = <3>; -+ #size-cells = <2>; -+ -+ bridge@0,0,0 { -+ reg = <0x0000 0 0 0 0>; -+ -+ #address-cells = <3>; -+ #size-cells = <2>; -+ -+ wifi@0,1,0 { -+ reg = <0x0000 0 0 0 0>; -+ ieee80211-freq-limit = <5735000 5835000>; -+ }; -+ }; -+}; -+ -+&pcie1 { -+ #address-cells = <3>; -+ #size-cells = <2>; -+ -+ bridge@1,0,0 { -+ reg = <0x0000 0 0 0 0>; -+ -+ #address-cells = <3>; -+ #size-cells = <2>; -+ -+ bridge@1,1,0 { -+ reg = <0x0000 0 0 0 0>; -+ -+ #address-cells = <3>; -+ #size-cells = <2>; -+ -+ bridge@1,2,2 { -+ reg = <0x1000 0 0 0 0>; -+ -+ #address-cells = <3>; -+ #size-cells = <2>; -+ -+ wifi@1,4,0 { -+ reg = <0x0000 0 0 0 0>; -+ ieee80211-freq-limit = <5170000 5730000>; -+ }; -+ }; -+ }; -+ }; -+}; -+ - &usb2 { - vcc-gpio = <&chipcommon 0 GPIO_ACTIVE_HIGH>; - }; ---- a/arch/arm/boot/dts/bcm5301x.dtsi -+++ b/arch/arm/boot/dts/bcm5301x.dtsi -@@ -243,6 +243,14 @@ - #gpio-cells = <2>; - }; - -+ pcie0: pcie@12000 { -+ reg = <0x00012000 0x1000>; -+ }; -+ -+ pcie1: pcie@13000 { -+ reg = <0x00013000 0x1000>; -+ }; -+ - usb2: usb2@21000 { - reg = <0x00021000 0x1000>; - diff --git a/target/linux/bcm53xx/patches-4.4/046-0008-ARM-BCM5301X-Add-DT-for-Luxul-XAP-1410.patch b/target/linux/bcm53xx/patches-4.4/046-0008-ARM-BCM5301X-Add-DT-for-Luxul-XAP-1410.patch deleted file mode 100644 index 3592f7083a..0000000000 --- a/target/linux/bcm53xx/patches-4.4/046-0008-ARM-BCM5301X-Add-DT-for-Luxul-XAP-1410.patch +++ /dev/null @@ -1,89 +0,0 @@ -From eeacbb3e30f220d5d775c61421f813d4e186a325 Mon Sep 17 00:00:00 2001 -From: Dan Haab <dhaab@luxul.com> -Date: Sat, 14 Jan 2017 19:29:27 -0700 -Subject: [PATCH] ARM: BCM5301X: Add DT for Luxul XAP-1410 - -Luxul XAP-1410 in a dual-band access point device based on BCM47081 with -serial flash. It has 3 LEDs and just one (reset) button. - -Signed-off-by: Dan Haab <dhaab@luxul.com> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/Makefile | 1 + - arch/arm/boot/dts/bcm47081-luxul-xap-1410.dts | 60 +++++++++++++++++++++++++++ - 2 files changed, 61 insertions(+) - create mode 100644 arch/arm/boot/dts/bcm47081-luxul-xap-1410.dts - ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -73,6 +73,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \ - bcm47081-asus-rt-n18u.dtb \ - bcm47081-buffalo-wzr-600dhp2.dtb \ - bcm47081-buffalo-wzr-900dhp.dtb \ -+ bcm47081-luxul-xap-1410.dtb \ - bcm4709-asus-rt-ac87u.dtb \ - bcm4709-buffalo-wxr-1900dhp.dtb \ - bcm4709-netgear-r7000.dtb \ ---- /dev/null -+++ b/arch/arm/boot/dts/bcm47081-luxul-xap-1410.dts -@@ -0,0 +1,60 @@ -+/* -+ * Copyright 2017 Luxul Inc. -+ * -+ * Licensed under the ISC license. -+ */ -+ -+/dts-v1/; -+ -+#include "bcm47081.dtsi" -+ -+/ { -+ compatible = "luxul,xap-1410v1", "brcm,bcm47081", "brcm,bcm4708"; -+ model = "Luxul XAP-1410 V1"; -+ -+ chosen { -+ bootargs = "console=ttyS0,115200"; -+ }; -+ -+ memory { -+ reg = <0x00000000 0x08000000>; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ -+ 5ghz { -+ label = "bcm53xx:blue:5ghz"; -+ gpios = <&chipcommon 13 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "none"; -+ }; -+ -+ 2ghz { -+ label = "bcm53xx:blue:2ghz"; -+ gpios = <&chipcommon 14 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "none"; -+ }; -+ -+ status { -+ label = "bcm53xx:green:status"; -+ gpios = <&chipcommon 15 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "timer"; -+ }; -+ }; -+ -+ gpio-keys { -+ compatible = "gpio-keys"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ restart { -+ label = "Reset"; -+ linux,code = <KEY_RESTART>; -+ gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>; -+ }; -+ }; -+}; -+ -+&spi_nor { -+ status = "okay"; -+}; diff --git a/target/linux/bcm53xx/patches-4.4/046-0009-ARM-BCM5301X-Add-DT-for-Luxul-XWR-1200.patch b/target/linux/bcm53xx/patches-4.4/046-0009-ARM-BCM5301X-Add-DT-for-Luxul-XWR-1200.patch deleted file mode 100644 index cf6bc2e335..0000000000 --- a/target/linux/bcm53xx/patches-4.4/046-0009-ARM-BCM5301X-Add-DT-for-Luxul-XWR-1200.patch +++ /dev/null @@ -1,136 +0,0 @@ -From 514647c9af870bd2df2e579134a26bff8d17b6b9 Mon Sep 17 00:00:00 2001 -From: Dan Haab <dhaab@luxul.com> -Date: Sat, 14 Jan 2017 19:29:28 -0700 -Subject: [PATCH] ARM: BCM5301X: Add DT for Luxul XWR-1200 - -Luxul XWR-1200 in a dual-band router based on BCM47081. It uses serial -flash (for bootloader and NVRAM) and NAND flash (for firmware). - -Signed-off-by: Dan Haab <dhaab@luxul.com> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/Makefile | 1 + - arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts | 107 ++++++++++++++++++++++++++ - 2 files changed, 108 insertions(+) - create mode 100644 arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts - ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -74,6 +74,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \ - bcm47081-buffalo-wzr-600dhp2.dtb \ - bcm47081-buffalo-wzr-900dhp.dtb \ - bcm47081-luxul-xap-1410.dtb \ -+ bcm47081-luxul-xwr-1200.dtb \ - bcm4709-asus-rt-ac87u.dtb \ - bcm4709-buffalo-wxr-1900dhp.dtb \ - bcm4709-netgear-r7000.dtb \ ---- /dev/null -+++ b/arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts -@@ -0,0 +1,107 @@ -+/* -+ * Copyright 2017 Luxul Inc. -+ * -+ * Licensed under the ISC license. -+ */ -+ -+/dts-v1/; -+ -+#include "bcm47081.dtsi" -+#include "bcm5301x-nand-cs0-bch4.dtsi" -+ -+/ { -+ compatible = "luxul,xwr-1200v1", "brcm,bcm47081", "brcm,bcm4708"; -+ model = "Luxul XWR-1200 V1"; -+ -+ chosen { -+ bootargs = "console=ttyS0,115200"; -+ }; -+ -+ memory { -+ reg = <0x00000000 0x08000000>; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ -+ power { -+ label = "bcm53xx:green:power"; -+ gpios = <&chipcommon 0 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "default-on"; -+ }; -+ -+ lan3 { -+ label = "bcm53xx:green:lan3"; -+ gpios = <&chipcommon 1 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "none"; -+ }; -+ -+ lan4 { -+ label = "bcm53xx:green:lan4"; -+ gpios = <&chipcommon 2 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "none"; -+ }; -+ -+ wan { -+ label = "bcm53xx:green:wan"; -+ gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "none"; -+ }; -+ -+ lan2 { -+ label = "bcm53xx:green:lan2"; -+ gpios = <&chipcommon 6 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "none"; -+ }; -+ -+ usb { -+ label = "bcm53xx:green:usb"; -+ gpios = <&chipcommon 8 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "none"; -+ }; -+ -+ status { -+ label = "bcm53xx:green:status"; -+ gpios = <&chipcommon 10 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "timer"; -+ }; -+ -+ 2ghz { -+ label = "bcm53xx:green:2ghz"; -+ gpios = <&chipcommon 13 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "none"; -+ }; -+ -+ 5ghz { -+ label = "bcm53xx:green:5ghz"; -+ gpios = <&chipcommon 14 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "none"; -+ }; -+ -+ lan1 { -+ label = "bcm53xx:green:lan1"; -+ gpios = <&chipcommon 15 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "none"; -+ }; -+ }; -+ -+ gpio-keys { -+ compatible = "gpio-keys"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ restart { -+ label = "Reset"; -+ linux,code = <KEY_RESTART>; -+ gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>; -+ }; -+ }; -+}; -+ -+&usb2 { -+ vcc-gpio = <&chipcommon 9 GPIO_ACTIVE_HIGH>; -+}; -+ -+&spi_nor { -+ status = "okay"; -+}; diff --git a/target/linux/bcm53xx/patches-4.4/047-0001-ARM-dts-BCM5301X-Add-basic-DT-for-Linksys-EA9200.patch b/target/linux/bcm53xx/patches-4.4/047-0001-ARM-dts-BCM5301X-Add-basic-DT-for-Linksys-EA9200.patch deleted file mode 100644 index ca2b7387c0..0000000000 --- a/target/linux/bcm53xx/patches-4.4/047-0001-ARM-dts-BCM5301X-Add-basic-DT-for-Linksys-EA9200.patch +++ /dev/null @@ -1,72 +0,0 @@ -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Subject: [PATCH] ARM: dts: BCM5301X: Add basic DT for Linksys EA9200 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -It's tri-band wireless home router based on BCM4709A0 with 3 x BCM43602 -chipsets. LEDs will be hopefully added later to the DT. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/Makefile | 1 + - arch/arm/boot/dts/bcm4709-linksys-ea9200.dts | 42 ++++++++++++++++++++++++++++ - 2 files changed, 43 insertions(+) - create mode 100644 arch/arm/boot/dts/bcm4709-linksys-ea9200.dts - ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -77,6 +77,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \ - bcm47081-luxul-xwr-1200.dtb \ - bcm4709-asus-rt-ac87u.dtb \ - bcm4709-buffalo-wxr-1900dhp.dtb \ -+ bcm4709-linksys-ea9200.dtb \ - bcm4709-netgear-r7000.dtb \ - bcm4709-netgear-r8000.dtb \ - bcm4709-tplink-archer-c9-v1.dtb \ ---- /dev/null -+++ b/arch/arm/boot/dts/bcm4709-linksys-ea9200.dts -@@ -0,0 +1,42 @@ -+/* -+ * Copyright (C) 2017 Rafał Miłecki <rafal@milecki.pl> -+ * -+ * Licensed under the ISC license. -+ */ -+ -+/dts-v1/; -+ -+#include "bcm4709.dtsi" -+#include "bcm5301x-nand-cs0-bch8.dtsi" -+ -+/ { -+ compatible = "linksys,ea9200", "brcm,bcm4709", "brcm,bcm4708"; -+ model = "Linksys EA9200"; -+ -+ chosen { -+ bootargs = "console=ttyS0,115200"; -+ }; -+ -+ memory { -+ reg = <0x00000000 0x08000000 -+ 0x88000000 0x08000000>; -+ }; -+ -+ gpio-keys { -+ compatible = "gpio-keys"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ wps { -+ label = "WPS"; -+ linux,code = <KEY_WPS_BUTTON>; -+ gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>; -+ }; -+ -+ restart { -+ label = "Reset"; -+ linux,code = <KEY_RESTART>; -+ gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>; -+ }; -+ }; -+}; diff --git a/target/linux/bcm53xx/patches-4.4/047-0002-ARM-dts-BCM5301X-Add-basic-DT-for-Linksys-EA6300-V1.patch b/target/linux/bcm53xx/patches-4.4/047-0002-ARM-dts-BCM5301X-Add-basic-DT-for-Linksys-EA6300-V1.patch deleted file mode 100644 index 93bf80c29b..0000000000 --- a/target/linux/bcm53xx/patches-4.4/047-0002-ARM-dts-BCM5301X-Add-basic-DT-for-Linksys-EA6300-V1.patch +++ /dev/null @@ -1,73 +0,0 @@ -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Subject: [PATCH] ARM: dts: BCM5301X: Add basic DT for Linksys EA6300 V1 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -It's wireless home router based on BCM4708A0 with BCM4360 + BCM43217 -wireless chipsets. LEDs will be hopefully added later to the DT. -According to some sources it may use the same board as EA6400 and just -differ by an original vendor firmware. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/Makefile | 1 + - arch/arm/boot/dts/bcm4708-linksys-ea6300-v1.dts | 41 +++++++++++++++++++++++++ - 2 files changed, 42 insertions(+) - create mode 100644 arch/arm/boot/dts/bcm4708-linksys-ea6300-v1.dts - ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -65,6 +65,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \ - bcm4708-asus-rt-ac56u.dtb \ - bcm4708-asus-rt-ac68u.dtb \ - bcm4708-buffalo-wzr-1750dhp.dtb \ -+ bcm4708-linksys-ea6300-v1.dtb \ - bcm4708-luxul-xap-1510.dtb \ - bcm4708-luxul-xwc-1000.dtb \ - bcm4708-netgear-r6250.dtb \ ---- /dev/null -+++ b/arch/arm/boot/dts/bcm4708-linksys-ea6300-v1.dts -@@ -0,0 +1,41 @@ -+/* -+ * Copyright (C) 2017 Rafał Miłecki <rafal@milecki.pl> -+ * -+ * Licensed under the ISC license. -+ */ -+ -+/dts-v1/; -+ -+#include "bcm4708.dtsi" -+#include "bcm5301x-nand-cs0-bch8.dtsi" -+ -+/ { -+ compatible = "linksys,ea6300-v1", "brcm,bcm4708"; -+ model = "Linksys EA6300 V1"; -+ -+ chosen { -+ bootargs = "console=ttyS0,115200"; -+ }; -+ -+ memory { -+ reg = <0x00000000 0x08000000>; -+ }; -+ -+ gpio-keys { -+ compatible = "gpio-keys"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ wps { -+ label = "WPS"; -+ linux,code = <KEY_WPS_BUTTON>; -+ gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>; -+ }; -+ -+ restart { -+ label = "Reset"; -+ linux,code = <KEY_RESTART>; -+ gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>; -+ }; -+ }; -+}; diff --git a/target/linux/bcm53xx/patches-4.4/047-0003-ARM-dts-BCM5301X-Add-NAND-entries-to-bcm953012k.patch b/target/linux/bcm53xx/patches-4.4/047-0003-ARM-dts-BCM5301X-Add-NAND-entries-to-bcm953012k.patch deleted file mode 100644 index 655548e85a..0000000000 --- a/target/linux/bcm53xx/patches-4.4/047-0003-ARM-dts-BCM5301X-Add-NAND-entries-to-bcm953012k.patch +++ /dev/null @@ -1,54 +0,0 @@ -From 3344d946ff277425052383e0a7877baf39911046 Mon Sep 17 00:00:00 2001 -From: Jon Mason <jon.mason@broadcom.com> -Date: Wed, 8 Feb 2017 15:45:15 -0500 -Subject: [PATCH] ARM: dts: BCM5301X: Add NAND entries to bcm953012k - -Add the NAND entry in the DTS for the bcm953012k reference board. - -Signed-off-by: Jon Mason <jon.mason@broadcom.com> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/bcm953012k.dts | 32 ++++++++++++++++++++++++++++++++ - 1 file changed, 32 insertions(+) - ---- a/arch/arm/boot/dts/bcm953012k.dts -+++ b/arch/arm/boot/dts/bcm953012k.dts -@@ -52,6 +52,38 @@ - }; - }; - -+&nand { -+ nandcs@0 { -+ compatible = "brcm,nandcs"; -+ reg = <0>; -+ nand-on-flash-bbt; -+ -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ nand-ecc-strength = <4>; -+ nand-ecc-step-size = <512>; -+ -+ partition@0 { -+ label = "nboot"; -+ reg = <0x00000000 0x00200000>; -+ read-only; -+ }; -+ partition@200000 { -+ label = "nenv"; -+ reg = <0x00200000 0x00400000>; -+ }; -+ partition@600000 { -+ label = "nsystem"; -+ reg = <0x00600000 0x00a00000>; -+ }; -+ partition@1000000 { -+ label = "nrootfs"; -+ reg = <0x01000000 0x07000000>; -+ }; -+ }; -+}; -+ - &uart0 { - clock-frequency = <62499840>; - }; diff --git a/target/linux/bcm53xx/patches-4.4/047-0005-ARM-dts-BCM5301X-Add-basic-DT-for-Linksys-EA9500.patch b/target/linux/bcm53xx/patches-4.4/047-0005-ARM-dts-BCM5301X-Add-basic-DT-for-Linksys-EA9500.patch deleted file mode 100644 index f288a667b7..0000000000 --- a/target/linux/bcm53xx/patches-4.4/047-0005-ARM-dts-BCM5301X-Add-basic-DT-for-Linksys-EA9500.patch +++ /dev/null @@ -1,69 +0,0 @@ -From 3dc9eca8ece2934047f1d5c290fd36c0e8698756 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Thu, 23 Feb 2017 14:06:36 +0100 -Subject: [PATCH] ARM: dts: BCM5301X: Add basic DT for Linksys EA9500 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -It's tri-band wireless home router based on BCM47094 AKA BCM4709C0. It -uses 3 x BCM4366 chipsets for wireless. -Panamera seems to be board name used by Linksys. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/Makefile | 1 + - arch/arm/boot/dts/bcm47094-linksys-panamera.dts | 36 +++++++++++++++++++++++++ - 2 files changed, 37 insertions(+) - create mode 100644 arch/arm/boot/dts/bcm47094-linksys-panamera.dts - ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -83,6 +83,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \ - bcm4709-netgear-r8000.dtb \ - bcm4709-tplink-archer-c9-v1.dtb \ - bcm47094-dlink-dir-885l.dtb \ -+ bcm47094-linksys-panamera.dtb \ - bcm47094-luxul-xwr-3100.dtb \ - bcm47094-netgear-r8500.dtb \ - bcm94708.dtb \ ---- /dev/null -+++ b/arch/arm/boot/dts/bcm47094-linksys-panamera.dts -@@ -0,0 +1,36 @@ -+/* -+ * Copyright (C) 2017 Rafał Miłecki <rafal@milecki.pl> -+ * -+ * Licensed under the ISC license. -+ */ -+ -+/dts-v1/; -+ -+#include "bcm47094.dtsi" -+#include "bcm5301x-nand-cs0-bch8.dtsi" -+ -+/ { -+ compatible = "linksys,panamera", "brcm,bcm47094", "brcm,bcm4708"; -+ model = "Linksys EA9500"; -+ -+ chosen { -+ bootargs = "console=ttyS0,115200"; -+ }; -+ -+ memory { -+ reg = <0x00000000 0x08000000 -+ 0x88000000 0x08000000>; -+ }; -+ -+ gpio-keys { -+ compatible = "gpio-keys"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ wps { -+ label = "WPS"; -+ linux,code = <KEY_WPS_BUTTON>; -+ gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>; -+ }; -+ }; -+}; diff --git a/target/linux/bcm53xx/patches-4.4/047-0006-ARM-dts-BCM5301X-Add-support-for-BCM953012HR.patch b/target/linux/bcm53xx/patches-4.4/047-0006-ARM-dts-BCM5301X-Add-support-for-BCM953012HR.patch deleted file mode 100644 index 76bfc598bd..0000000000 --- a/target/linux/bcm53xx/patches-4.4/047-0006-ARM-dts-BCM5301X-Add-support-for-BCM953012HR.patch +++ /dev/null @@ -1,129 +0,0 @@ -From 475dcdec8cd1bb1b73ddfd9f872822bf4ad9c242 Mon Sep 17 00:00:00 2001 -From: Steve Lin <steven.lin1@broadcom.com> -Date: Thu, 23 Feb 2017 14:23:03 -0500 -Subject: [PATCH] ARM: dts: BCM5301X: Add support for BCM953012HR - -Initial version of DTS to support Broadcom BCM953012HR Northstar -HR platform, similar to, but not the same as existing 953012K. - -Signed-off-by: Steve Lin <steven.lin1@broadcom.com> -Acked-by: Jon Mason <jon.mason@broadcom.com> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/Makefile | 1 + - arch/arm/boot/dts/bcm953012hr.dts | 99 +++++++++++++++++++++++++++++++++++++++ - 2 files changed, 100 insertions(+) - create mode 100644 arch/arm/boot/dts/bcm953012hr.dts - ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -89,6 +89,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \ - bcm94708.dtb \ - bcm94709.dtb \ - bcm953012er.dtb \ -+ bcm953012hr.dtb \ - bcm953012k.dtb - dtb-$(CONFIG_ARCH_BCM_53573) += \ - bcm47189-tenda-ac9.dtb ---- /dev/null -+++ b/arch/arm/boot/dts/bcm953012hr.dts -@@ -0,0 +1,99 @@ -+/* -+ * SPDX-License-Identifier: BSD-3-Clause -+ * -+ * Copyright(c) 2017 Broadcom -+ * -+ * Redistribution and use in source and binary forms, with or without -+ * modification, are permitted provided that the following conditions -+ * are met: -+ * -+ * * Redistributions of source code must retain the above copyright -+ * notice, this list of conditions and the following disclaimer. -+ * * Redistributions in binary form must reproduce the above copyright -+ * notice, this list of conditions and the following disclaimer in -+ * the documentation and/or other materials provided with the -+ * distribution. -+ * * Neither the name of Broadcom nor the names of its contributors -+ * may be used to endorse or promote products derived from this -+ * software without specific prior written permission. -+ * -+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ */ -+ -+/dts-v1/; -+ -+#include "bcm4708.dtsi" -+#include "bcm5301x-nand-cs0-bch4.dtsi" -+ -+/ { -+ model = "NorthStar HR (BCM953012HR)"; -+ compatible = "brcm,bcm953012hr", "brcm,brcm53012", "brcm,bcm4708"; -+ -+ aliases { -+ serial0 = &uart0; -+ }; -+ -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ -+ memory@80000000 { -+ reg = <0x80000000 0x10000000>; -+ }; -+}; -+ -+&nandcs { -+ partition@0 { -+ label = "nboot"; -+ reg = <0x00000000 0x00200000>; -+ read-only; -+ }; -+ partition@200000 { -+ label = "nenv"; -+ reg = <0x00200000 0x00400000>; -+ }; -+ partition@600000 { -+ label = "nsystem"; -+ reg = <0x00600000 0x00a00000>; -+ }; -+ partition@1000000 { -+ label = "nrootfs"; -+ reg = <0x01000000 0x07000000>; -+ }; -+}; -+ -+&spi_nor { -+ status = "okay"; -+ spi-max-frequency = <62500000>; -+ m25p,default-addr-width = <3>; -+ -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ partition@0 { -+ label = "boot"; -+ reg = <0x00000000 0x000d0000>; -+ }; -+ partition@d000 { -+ label = "env"; -+ reg = <0x000d0000 0x00030000>; -+ }; -+ partition@100000 { -+ label = "system"; -+ reg = <0x00100000 0x00600000>; -+ }; -+ partition@700000 { -+ label = "rootfs"; -+ reg = <0x00700000 0x00900000>; -+ }; -+}; diff --git a/target/linux/bcm53xx/patches-4.4/047-0007-ARM-dts-BCM53573-Describe-Tenda-AC9-PCIe-card-in-DT.patch b/target/linux/bcm53xx/patches-4.4/047-0007-ARM-dts-BCM53573-Describe-Tenda-AC9-PCIe-card-in-DT.patch deleted file mode 100644 index 8aa28a744f..0000000000 --- a/target/linux/bcm53xx/patches-4.4/047-0007-ARM-dts-BCM53573-Describe-Tenda-AC9-PCIe-card-in-DT.patch +++ /dev/null @@ -1,70 +0,0 @@ -From 3ba1bae984e585f500b8406b1bf3e42e0ec752b7 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Tue, 14 Feb 2017 17:49:05 +0100 -Subject: [PATCH] ARM: dts: BCM53573: Describe Tenda AC9 PCIe card in DT -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Tenda AC9 has PCIe controller with just one device connected to it: -0000:00:00.0 14e4:d145 Bridge Device -└─ 0000:01:00.0 14e4:a8db Network Controller - -This card is directly on SoC (doesn't use physical connector) and has -BCM43217 chipset with bcma bus. One of its components is ChipCommon core -which is also a GPIO controller. We need to describe it to be able to -add devices using its GPIO pins. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/bcm47189-tenda-ac9.dts | 27 +++++++++++++++++++++++++++ - arch/arm/boot/dts/bcm53573.dtsi | 4 ++++ - 2 files changed, 31 insertions(+) - ---- a/arch/arm/boot/dts/bcm47189-tenda-ac9.dts -+++ b/arch/arm/boot/dts/bcm47189-tenda-ac9.dts -@@ -72,3 +72,30 @@ - }; - }; - }; -+ -+&pcie0 { -+ ranges = <0x00000000 0 0 0 0 0x00100000>; -+ #address-cells = <3>; -+ #size-cells = <2>; -+ -+ bridge@0,0,0 { -+ reg = <0x0000 0 0 0 0>; -+ ranges = <0x00000000 0 0 0 0 0 0 0x00100000>; -+ #address-cells = <3>; -+ #size-cells = <2>; -+ -+ wifi@0,1,0 { -+ reg = <0x0000 0 0 0 0>; -+ ranges = <0x00000000 0 0 0 0x00100000>; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ pcie0_chipcommon: chipcommon@0 { -+ reg = <0 0x1000>; -+ -+ gpio-controller; -+ #gpio-cells = <2>; -+ }; -+ }; -+ }; -+}; ---- a/arch/arm/boot/dts/bcm53573.dtsi -+++ b/arch/arm/boot/dts/bcm53573.dtsi -@@ -113,6 +113,10 @@ - }; - }; - -+ pcie0: pcie@2000 { -+ reg = <0x00002000 0x1000>; -+ }; -+ - usb2: usb2@4000 { - reg = <0x4000 0x1000>; - ranges; diff --git a/target/linux/bcm53xx/patches-4.4/047-0008-ARM-dts-BCM53573-Add-Tenda-AC9-2-GHz-LED.patch b/target/linux/bcm53xx/patches-4.4/047-0008-ARM-dts-BCM53573-Add-Tenda-AC9-2-GHz-LED.patch deleted file mode 100644 index 9de64021d1..0000000000 --- a/target/linux/bcm53xx/patches-4.4/047-0008-ARM-dts-BCM53573-Add-Tenda-AC9-2-GHz-LED.patch +++ /dev/null @@ -1,36 +0,0 @@ -From 86cd47e761c773f2384ac2041730d7ccfeb40095 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Tue, 14 Feb 2017 17:49:06 +0100 -Subject: [PATCH] ARM: dts: BCM53573: Add Tenda AC9 2 GHz LED -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -It's connected to a GPIO pin of an extra controller placed on the PCIe -card. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/bcm47189-tenda-ac9.dts | 10 ++++++++++ - 1 file changed, 10 insertions(+) - ---- a/arch/arm/boot/dts/bcm47189-tenda-ac9.dts -+++ b/arch/arm/boot/dts/bcm47189-tenda-ac9.dts -@@ -48,6 +48,16 @@ - }; - }; - -+ pcie0_leds { -+ compatible = "gpio-leds"; -+ -+ 2ghz { -+ label = "bcm53xx:blue:2ghz"; -+ gpios = <&pcie0_chipcommon 3 GPIO_ACTIVE_HIGH>; -+ linux,default-trigger = "default-off"; -+ }; -+ }; -+ - gpio-keys { - compatible = "gpio-keys"; - #address-cells = <1>; diff --git a/target/linux/bcm53xx/patches-4.4/047-0009-ARM-dts-BCM5301X-Relicense-DTS-files-I-created-to-th.patch b/target/linux/bcm53xx/patches-4.4/047-0009-ARM-dts-BCM5301X-Relicense-DTS-files-I-created-to-th.patch deleted file mode 100644 index cbfaf32f60..0000000000 --- a/target/linux/bcm53xx/patches-4.4/047-0009-ARM-dts-BCM5301X-Relicense-DTS-files-I-created-to-th.patch +++ /dev/null @@ -1,265 +0,0 @@ -From 153580bd3e242c204bb8b1946d76da78e826f555 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Sat, 28 Jan 2017 12:51:35 +0100 -Subject: [PATCH] ARM: dts: BCM5301X: Relicense DTS files I created to the ISC -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -It's preferred to have DT source files licensed under BSD compatible -license. All new BCM5301X DTS files use ISC so let's also relicense old -ones to it. - -Except for me only Hauke was ever touched these files in his commit -9faa5960eef3 ("ARM: BCM5301X: add NAND flash chip description") and -commit bb1d8fba1965 ("ARM: BCM5301X: add NAND flash chip description for -Asus RT-AC87U"). - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Acked-by: Hauke Mehrtens <hauke@hauke-m.de> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dts | 12 +++++++++++- - arch/arm/boot/dts/bcm4708-asus-rt-ac68u.dts | 12 +++++++++++- - arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts | 12 +++++++++++- - arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts | 12 +++++++++++- - arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts | 12 +++++++++++- - arch/arm/boot/dts/bcm47081-buffalo-wzr-900dhp.dts | 12 +++++++++++- - arch/arm/boot/dts/bcm47081.dtsi | 12 +++++++++++- - arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts | 12 +++++++++++- - arch/arm/boot/dts/bcm4709-netgear-r7000.dts | 12 +++++++++++- - arch/arm/boot/dts/bcm4709-netgear-r8000.dts | 12 +++++++++++- - arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts | 12 +++++++++++- - 11 files changed, 121 insertions(+), 11 deletions(-) - ---- a/arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dts -+++ b/arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dts -@@ -4,7 +4,17 @@ - * - * Copyright (C) 2015 Rafał Miłecki <zajec5@gmail.com> - * -- * Licensed under the GNU/GPL. See COPYING for details. -+ * Permission to use, copy, modify, and/or distribute this software for any -+ * purpose with or without fee is hereby granted, provided that the above -+ * copyright notice and this permission notice appear in all copies. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH -+ * REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY -+ * AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, -+ * INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM -+ * LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE -+ * OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR -+ * PERFORMANCE OF THIS SOFTWARE. - */ - - /dts-v1/; ---- a/arch/arm/boot/dts/bcm4708-asus-rt-ac68u.dts -+++ b/arch/arm/boot/dts/bcm4708-asus-rt-ac68u.dts -@@ -4,7 +4,17 @@ - * - * Copyright (C) 2015 Rafał Miłecki <zajec5@gmail.com> - * -- * Licensed under the GNU/GPL. See COPYING for details. -+ * Permission to use, copy, modify, and/or distribute this software for any -+ * purpose with or without fee is hereby granted, provided that the above -+ * copyright notice and this permission notice appear in all copies. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH -+ * REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY -+ * AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, -+ * INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM -+ * LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE -+ * OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR -+ * PERFORMANCE OF THIS SOFTWARE. - */ - - /dts-v1/; ---- a/arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts -+++ b/arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts -@@ -4,7 +4,17 @@ - * - * Copyright (C) 2014 Rafał Miłecki <zajec5@gmail.com> - * -- * Licensed under the GNU/GPL. See COPYING for details. -+ * Permission to use, copy, modify, and/or distribute this software for any -+ * purpose with or without fee is hereby granted, provided that the above -+ * copyright notice and this permission notice appear in all copies. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH -+ * REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY -+ * AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, -+ * INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM -+ * LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE -+ * OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR -+ * PERFORMANCE OF THIS SOFTWARE. - */ - - /dts-v1/; ---- a/arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts -+++ b/arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts -@@ -4,7 +4,17 @@ - * - * Copyright (C) 2014 Rafał Miłecki <zajec5@gmail.com> - * -- * Licensed under the GNU/GPL. See COPYING for details. -+ * Permission to use, copy, modify, and/or distribute this software for any -+ * purpose with or without fee is hereby granted, provided that the above -+ * copyright notice and this permission notice appear in all copies. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH -+ * REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY -+ * AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, -+ * INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM -+ * LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE -+ * OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR -+ * PERFORMANCE OF THIS SOFTWARE. - */ - - /dts-v1/; ---- a/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts -+++ b/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts -@@ -4,7 +4,17 @@ - * - * Copyright (C) 2014 Rafał Miłecki <zajec5@gmail.com> - * -- * Licensed under the GNU/GPL. See COPYING for details. -+ * Permission to use, copy, modify, and/or distribute this software for any -+ * purpose with or without fee is hereby granted, provided that the above -+ * copyright notice and this permission notice appear in all copies. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH -+ * REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY -+ * AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, -+ * INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM -+ * LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE -+ * OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR -+ * PERFORMANCE OF THIS SOFTWARE. - */ - - /dts-v1/; ---- a/arch/arm/boot/dts/bcm47081-buffalo-wzr-900dhp.dts -+++ b/arch/arm/boot/dts/bcm47081-buffalo-wzr-900dhp.dts -@@ -4,7 +4,17 @@ - * - * Copyright (C) 2015 Rafał Miłecki <zajec5@gmail.com> - * -- * Licensed under the GNU/GPL. See COPYING for details. -+ * Permission to use, copy, modify, and/or distribute this software for any -+ * purpose with or without fee is hereby granted, provided that the above -+ * copyright notice and this permission notice appear in all copies. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH -+ * REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY -+ * AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, -+ * INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM -+ * LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE -+ * OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR -+ * PERFORMANCE OF THIS SOFTWARE. - */ - - /dts-v1/; ---- a/arch/arm/boot/dts/bcm47081.dtsi -+++ b/arch/arm/boot/dts/bcm47081.dtsi -@@ -4,7 +4,17 @@ - * - * Copyright © 2014 Rafał Miłecki <zajec5@gmail.com> - * -- * Licensed under the GNU/GPL. See COPYING for details. -+ * Permission to use, copy, modify, and/or distribute this software for any -+ * purpose with or without fee is hereby granted, provided that the above -+ * copyright notice and this permission notice appear in all copies. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH -+ * REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY -+ * AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, -+ * INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM -+ * LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE -+ * OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR -+ * PERFORMANCE OF THIS SOFTWARE. - */ - - #include "bcm5301x.dtsi" ---- a/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts -+++ b/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts -@@ -4,7 +4,17 @@ - * - * Copyright (C) 2015 Rafał Miłecki <zajec5@gmail.com> - * -- * Licensed under the GNU/GPL. See COPYING for details. -+ * Permission to use, copy, modify, and/or distribute this software for any -+ * purpose with or without fee is hereby granted, provided that the above -+ * copyright notice and this permission notice appear in all copies. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH -+ * REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY -+ * AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, -+ * INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM -+ * LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE -+ * OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR -+ * PERFORMANCE OF THIS SOFTWARE. - */ - - /dts-v1/; ---- a/arch/arm/boot/dts/bcm4709-netgear-r7000.dts -+++ b/arch/arm/boot/dts/bcm4709-netgear-r7000.dts -@@ -4,7 +4,17 @@ - * - * Copyright (C) 2015 Rafał Miłecki <zajec5@gmail.com> - * -- * Licensed under the GNU/GPL. See COPYING for details. -+ * Permission to use, copy, modify, and/or distribute this software for any -+ * purpose with or without fee is hereby granted, provided that the above -+ * copyright notice and this permission notice appear in all copies. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH -+ * REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY -+ * AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, -+ * INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM -+ * LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE -+ * OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR -+ * PERFORMANCE OF THIS SOFTWARE. - */ - - /dts-v1/; ---- a/arch/arm/boot/dts/bcm4709-netgear-r8000.dts -+++ b/arch/arm/boot/dts/bcm4709-netgear-r8000.dts -@@ -4,7 +4,17 @@ - * - * Copyright (C) 2015 Rafał Miłecki <zajec5@gmail.com> - * -- * Licensed under the GNU/GPL. See COPYING for details. -+ * Permission to use, copy, modify, and/or distribute this software for any -+ * purpose with or without fee is hereby granted, provided that the above -+ * copyright notice and this permission notice appear in all copies. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH -+ * REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY -+ * AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, -+ * INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM -+ * LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE -+ * OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR -+ * PERFORMANCE OF THIS SOFTWARE. - */ - - /dts-v1/; ---- a/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts -+++ b/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts -@@ -4,7 +4,17 @@ - * - * Copyright (C) 2016 Rafał Miłecki <zajec5@gmail.com> - * -- * Licensed under the GNU/GPL. See COPYING for details. -+ * Permission to use, copy, modify, and/or distribute this software for any -+ * purpose with or without fee is hereby granted, provided that the above -+ * copyright notice and this permission notice appear in all copies. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH -+ * REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY -+ * AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, -+ * INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM -+ * LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE -+ * OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR -+ * PERFORMANCE OF THIS SOFTWARE. - */ - - /dts-v1/; diff --git a/target/linux/bcm53xx/patches-4.4/047-0010-ARM-dts-BCM5301X-Add-missing-Netgear-R8000-LEDs-and-.patch b/target/linux/bcm53xx/patches-4.4/047-0010-ARM-dts-BCM5301X-Add-missing-Netgear-R8000-LEDs-and-.patch deleted file mode 100644 index 05de689061..0000000000 --- a/target/linux/bcm53xx/patches-4.4/047-0010-ARM-dts-BCM5301X-Add-missing-Netgear-R8000-LEDs-and-.patch +++ /dev/null @@ -1,66 +0,0 @@ -From 4a5782a889cfbc8523d7097c3f147572ed5129a6 Mon Sep 17 00:00:00 2001 -From: Aditya Xavier <adityaxavier@gmail.com> -Date: Sat, 28 Jan 2017 20:07:49 +0530 -Subject: [PATCH] ARM: dts: BCM5301X: Add missing Netgear R8000 LEDs and Keys -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Added two WAN status LEDs and a GPIO key for brightness which were -missing. - -Signed-off-by: Aditya Xavier <adityaxavier@gmail.com> -Acked-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/bcm4709-netgear-r8000.dts | 22 ++++++++++++++++++++-- - 1 file changed, 20 insertions(+), 2 deletions(-) - ---- a/arch/arm/boot/dts/bcm4709-netgear-r8000.dts -+++ b/arch/arm/boot/dts/bcm4709-netgear-r8000.dts -@@ -38,18 +38,30 @@ - leds { - compatible = "gpio-leds"; - -- power0 { -+ power-white { - label = "bcm53xx:white:power"; - gpios = <&chipcommon 2 GPIO_ACTIVE_LOW>; - linux,default-trigger = "default-on"; - }; - -- power1 { -+ power-amber { - label = "bcm53xx:amber:power"; - gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>; - linux,default-trigger = "default-off"; - }; - -+ wan-white { -+ label = "bcm53xx:white:wan"; -+ gpios = <&chipcommon 8 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "default-on"; -+ }; -+ -+ wan-amber { -+ label = "bcm53xx:amber:wan"; -+ gpios = <&chipcommon 9 GPIO_ACTIVE_HIGH>; -+ linux,default-trigger = "default-off"; -+ }; -+ - 5ghz-1 { - label = "bcm53xx:white:5ghz-1"; - gpios = <&chipcommon 12 GPIO_ACTIVE_LOW>; -@@ -115,6 +127,12 @@ - linux,code = <KEY_RESTART>; - gpios = <&chipcommon 6 GPIO_ACTIVE_LOW>; - }; -+ -+ brightness { -+ label = "Backlight"; -+ linux,code = <KEY_BRIGHTNESS_ZERO>; -+ gpios = <&chipcommon 19 GPIO_ACTIVE_LOW>; -+ }; - }; - }; - diff --git a/target/linux/bcm53xx/patches-4.4/047-0011-ARM-dts-BCM53573-Don-t-use-nonexistent-default-off-L.patch b/target/linux/bcm53xx/patches-4.4/047-0011-ARM-dts-BCM53573-Don-t-use-nonexistent-default-off-L.patch deleted file mode 100644 index ce74ff3e4c..0000000000 --- a/target/linux/bcm53xx/patches-4.4/047-0011-ARM-dts-BCM53573-Don-t-use-nonexistent-default-off-L.patch +++ /dev/null @@ -1,50 +0,0 @@ -From 820a3e952b266d4355e89ed91c9b11945030321e Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Wed, 8 Mar 2017 07:41:04 +0100 -Subject: [PATCH] ARM: dts: BCM53573: Don't use nonexistent "default-off" LED - trigger -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Such a trigger doesn't exist in Linux and is not needed as LED is being -turned off by default. This could cause errors in LEDs core code when -trying to set default trigger. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Acked-by: Pavel Machek <pavel@ucw.cz> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/bcm47189-tenda-ac9.dts | 4 ---- - 1 file changed, 4 deletions(-) - ---- a/arch/arm/boot/dts/bcm47189-tenda-ac9.dts -+++ b/arch/arm/boot/dts/bcm47189-tenda-ac9.dts -@@ -26,19 +26,16 @@ - usb { - label = "bcm53xx:blue:usb"; - gpios = <&chipcommon 1 GPIO_ACTIVE_HIGH>; -- linux,default-trigger = "default-off"; - }; - - wps { - label = "bcm53xx:blue:wps"; - gpios = <&chipcommon 10 GPIO_ACTIVE_HIGH>; -- linux,default-trigger = "default-off"; - }; - - 5ghz { - label = "bcm53xx:blue:5ghz"; - gpios = <&chipcommon 11 GPIO_ACTIVE_HIGH>; -- linux,default-trigger = "default-off"; - }; - - system { -@@ -54,7 +51,6 @@ - 2ghz { - label = "bcm53xx:blue:2ghz"; - gpios = <&pcie0_chipcommon 3 GPIO_ACTIVE_HIGH>; -- linux,default-trigger = "default-off"; - }; - }; - diff --git a/target/linux/bcm53xx/patches-4.4/047-0012-ARM-dts-BCM5301X-Don-t-use-nonexistent-default-off-L.patch b/target/linux/bcm53xx/patches-4.4/047-0012-ARM-dts-BCM5301X-Don-t-use-nonexistent-default-off-L.patch deleted file mode 100644 index cecae0bb7b..0000000000 --- a/target/linux/bcm53xx/patches-4.4/047-0012-ARM-dts-BCM5301X-Don-t-use-nonexistent-default-off-L.patch +++ /dev/null @@ -1,651 +0,0 @@ -From 0b660259e927177dc0c6eb3b1c39f23c6a011c5f Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Wed, 8 Mar 2017 07:41:05 +0100 -Subject: [PATCH] ARM: dts: BCM5301X: Don't use nonexistent "default-off" LED - trigger -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Such a trigger doesn't exist in Linux and is not needed as LED is being -turned off by default. This could cause errors in LEDs core code when -trying to set default trigger. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dts | 5 ----- - arch/arm/boot/dts/bcm4708-asus-rt-ac68u.dts | 2 -- - arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts | 5 ----- - arch/arm/boot/dts/bcm4708-netgear-r6250.dts | 3 --- - arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts | 3 --- - arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts | 10 ---------- - arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts | 2 -- - arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts | 4 ---- - arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts | 2 -- - arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts | 8 -------- - arch/arm/boot/dts/bcm4709-netgear-r7000.dts | 7 ------- - arch/arm/boot/dts/bcm4709-netgear-r8000.dts | 9 --------- - arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts | 8 -------- - arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts | 6 ------ - arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts | 8 -------- - arch/arm/boot/dts/bcm47094-netgear-r8500.dts | 6 ------ - 16 files changed, 88 deletions(-) - ---- a/arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dts -+++ b/arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dts -@@ -41,19 +41,16 @@ - usb3 { - label = "bcm53xx:blue:usb3"; - gpios = <&chipcommon 0 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "default-off"; - }; - - wan { - label = "bcm53xx:blue:wan"; - gpios = <&chipcommon 1 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "default-off"; - }; - - lan { - label = "bcm53xx:blue:lan"; - gpios = <&chipcommon 2 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "default-off"; - }; - - power { -@@ -71,14 +68,12 @@ - 2ghz { - label = "bcm53xx:blue:2ghz"; - gpios = <&chipcommon 6 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "default-off"; - }; - - - usb2 { - label = "bcm53xx:blue:usb2"; - gpios = <&chipcommon 14 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "default-off"; - }; - }; - ---- a/arch/arm/boot/dts/bcm4708-asus-rt-ac68u.dts -+++ b/arch/arm/boot/dts/bcm4708-asus-rt-ac68u.dts -@@ -41,7 +41,6 @@ - usb2 { - label = "bcm53xx:blue:usb2"; - gpios = <&chipcommon 0 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "default-off"; - }; - - power { -@@ -59,7 +58,6 @@ - usb3 { - label = "bcm53xx:blue:usb3"; - gpios = <&chipcommon 14 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "default-off"; - }; - }; - ---- a/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts -+++ b/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts -@@ -52,13 +52,11 @@ - usb { - label = "bcm53xx:blue:usb"; - gpios = <&hc595 0 GPIO_ACTIVE_HIGH>; -- linux,default-trigger = "default-off"; - }; - - power0 { - label = "bcm53xx:red:power"; - gpios = <&hc595 1 GPIO_ACTIVE_HIGH>; -- linux,default-trigger = "default-off"; - }; - - power1 { -@@ -76,7 +74,6 @@ - router1 { - label = "bcm53xx:amber:router"; - gpios = <&hc595 4 GPIO_ACTIVE_HIGH>; -- linux,default-trigger = "default-off"; - }; - - wan { -@@ -88,13 +85,11 @@ - wireless0 { - label = "bcm53xx:blue:wireless"; - gpios = <&hc595 6 GPIO_ACTIVE_HIGH>; -- linux,default-trigger = "default-off"; - }; - - wireless1 { - label = "bcm53xx:amber:wireless"; - gpios = <&hc595 7 GPIO_ACTIVE_HIGH>; -- linux,default-trigger = "default-off"; - }; - }; - ---- a/arch/arm/boot/dts/bcm4708-netgear-r6250.dts -+++ b/arch/arm/boot/dts/bcm4708-netgear-r6250.dts -@@ -43,19 +43,16 @@ - power1 { - label = "bcm53xx:amber:power"; - gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "default-off"; - }; - - usb { - label = "bcm53xx:blue:usb"; - gpios = <&chipcommon 8 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "default-off"; - }; - - wireless { - label = "bcm53xx:blue:wireless"; - gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "default-off"; - }; - }; - ---- a/arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts -+++ b/arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts -@@ -47,7 +47,6 @@ - power0 { - label = "bcm53xx:green:power"; - gpios = <&chipcommon 2 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "default-off"; - }; - - power1 { -@@ -59,13 +58,11 @@ - usb { - label = "bcm53xx:blue:usb"; - gpios = <&chipcommon 8 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "default-off"; - }; - - wireless { - label = "bcm53xx:blue:wireless"; - gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "default-off"; - }; - }; - ---- a/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts -+++ b/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts -@@ -37,61 +37,51 @@ - power-amber { - label = "bcm53xx:amber:power"; - gpios = <&chipcommon 2 GPIO_ACTIVE_HIGH>; -- linux,default-trigger = "default-off"; - }; - - usb2 { - label = "bcm53xx:white:usb2"; - gpios = <&chipcommon 3 GPIO_ACTIVE_HIGH>; -- linux,default-trigger = "default-off"; - }; - - usb3-white { - label = "bcm53xx:white:usb3"; - gpios = <&chipcommon 4 GPIO_ACTIVE_HIGH>; -- linux,default-trigger = "default-off"; - }; - - usb3-green { - label = "bcm53xx:green:usb3"; - gpios = <&chipcommon 5 GPIO_ACTIVE_HIGH>; -- linux,default-trigger = "default-off"; - }; - - wps { - label = "bcm53xx:white:wps"; - gpios = <&chipcommon 6 GPIO_ACTIVE_HIGH>; -- linux,default-trigger = "default-off"; - }; - - status-red { - label = "bcm53xx:red:status"; - gpios = <&chipcommon 8 GPIO_ACTIVE_HIGH>; -- linux,default-trigger = "default-off"; - }; - - status-green { - label = "bcm53xx:green:status"; - gpios = <&chipcommon 9 GPIO_ACTIVE_HIGH>; -- linux,default-trigger = "default-off"; - }; - - status-blue { - label = "bcm53xx:blue:status"; - gpios = <&chipcommon 10 GPIO_ACTIVE_HIGH>; -- linux,default-trigger = "default-off"; - }; - - wan-white { - label = "bcm53xx:white:wan"; - gpios = <&chipcommon 12 GPIO_ACTIVE_HIGH>; -- linux,default-trigger = "default-off"; - }; - - wan-red { - label = "bcm53xx:red:wan"; - gpios = <&chipcommon 13 GPIO_ACTIVE_HIGH>; -- linux,default-trigger = "default-off"; - }; - }; - ---- a/arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts -+++ b/arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts -@@ -47,7 +47,6 @@ - usb2 { - label = "bcm53xx:blue:usb2"; - gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "default-off"; - }; - - wan { -@@ -65,7 +64,6 @@ - usb3 { - label = "bcm53xx:blue:usb3"; - gpios = <&chipcommon 14 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "default-off"; - }; - }; - ---- a/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts -+++ b/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts -@@ -68,7 +68,6 @@ - power1 { - label = "bcm53xx:red:power"; - gpios = <&hc595 2 GPIO_ACTIVE_HIGH>; -- linux,default-trigger = "default-off"; - }; - - router0 { -@@ -80,7 +79,6 @@ - router1 { - label = "bcm53xx:amber:router"; - gpios = <&hc595 4 GPIO_ACTIVE_HIGH>; -- linux,default-trigger = "default-off"; - }; - - wan { -@@ -92,13 +90,11 @@ - wireless0 { - label = "bcm53xx:green:wireless"; - gpios = <&hc595 6 GPIO_ACTIVE_HIGH>; -- linux,default-trigger = "default-off"; - }; - - wireless1 { - label = "bcm53xx:amber:wireless"; - gpios = <&hc595 7 GPIO_ACTIVE_HIGH>; -- linux,default-trigger = "default-off"; - }; - }; - ---- a/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts -+++ b/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts -@@ -41,7 +41,6 @@ - wps { - label = "bcm53xx:blue:wps"; - gpios = <&chipcommon 1 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "default-off"; - }; - - power { -@@ -53,7 +52,6 @@ - wan { - label = "bcm53xx:red:wan"; - gpios = <&chipcommon 5 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "default-off"; - }; - }; - ---- a/arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts -+++ b/arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts -@@ -31,13 +31,11 @@ - usb { - label = "bcm53xx:green:usb"; - gpios = <&chipcommon 4 GPIO_ACTIVE_HIGH>; -- linux,default-trigger = "default-off"; - }; - - power-amber { - label = "bcm53xx:amber:power"; - gpios = <&chipcommon 5 GPIO_ACTIVE_HIGH>; -- linux,default-trigger = "default-off"; - }; - - power-white { -@@ -49,37 +47,31 @@ - router-amber { - label = "bcm53xx:amber:router"; - gpios = <&chipcommon 7 GPIO_ACTIVE_HIGH>; -- linux,default-trigger = "default-off"; - }; - - router-white { - label = "bcm53xx:white:router"; - gpios = <&chipcommon 8 GPIO_ACTIVE_HIGH>; -- linux,default-trigger = "default-off"; - }; - - wan-amber { - label = "bcm53xx:amber:wan"; - gpios = <&chipcommon 9 GPIO_ACTIVE_HIGH>; -- linux,default-trigger = "default-off"; - }; - - wan-white { - label = "bcm53xx:white:wan"; - gpios = <&chipcommon 10 GPIO_ACTIVE_HIGH>; -- linux,default-trigger = "default-off"; - }; - - wireless-amber { - label = "bcm53xx:amber:wireless"; - gpios = <&chipcommon 11 GPIO_ACTIVE_HIGH>; -- linux,default-trigger = "default-off"; - }; - - wireless-white { - label = "bcm53xx:white:wireless"; - gpios = <&chipcommon 12 GPIO_ACTIVE_HIGH>; -- linux,default-trigger = "default-off"; - }; - }; - ---- a/arch/arm/boot/dts/bcm4709-netgear-r7000.dts -+++ b/arch/arm/boot/dts/bcm4709-netgear-r7000.dts -@@ -47,43 +47,36 @@ - power-amber { - label = "bcm53xx:amber:power"; - gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "default-off"; - }; - - 5ghz { - label = "bcm53xx:white:5ghz"; - gpios = <&chipcommon 12 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "default-off"; - }; - - 2ghz { - label = "bcm53xx:white:2ghz"; - gpios = <&chipcommon 13 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "default-off"; - }; - - wps { - label = "bcm53xx:white:wps"; - gpios = <&chipcommon 14 GPIO_ACTIVE_HIGH>; -- linux,default-trigger = "default-off"; - }; - - wireless { - label = "bcm53xx:white:wireless"; - gpios = <&chipcommon 15 GPIO_ACTIVE_HIGH>; -- linux,default-trigger = "default-off"; - }; - - usb3 { - label = "bcm53xx:white:usb3"; - gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "default-off"; - }; - - usb2 { - label = "bcm53xx:white:usb2"; - gpios = <&chipcommon 18 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "default-off"; - }; - }; - ---- a/arch/arm/boot/dts/bcm4709-netgear-r8000.dts -+++ b/arch/arm/boot/dts/bcm4709-netgear-r8000.dts -@@ -47,7 +47,6 @@ - power-amber { - label = "bcm53xx:amber:power"; - gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "default-off"; - }; - - wan-white { -@@ -59,49 +58,41 @@ - wan-amber { - label = "bcm53xx:amber:wan"; - gpios = <&chipcommon 9 GPIO_ACTIVE_HIGH>; -- linux,default-trigger = "default-off"; - }; - - 5ghz-1 { - label = "bcm53xx:white:5ghz-1"; - gpios = <&chipcommon 12 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "default-off"; - }; - - 2ghz { - label = "bcm53xx:white:2ghz"; - gpios = <&chipcommon 13 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "default-off"; - }; - - wireless { - label = "bcm53xx:white:wireless"; - gpios = <&chipcommon 14 GPIO_ACTIVE_HIGH>; -- linux,default-trigger = "default-off"; - }; - - wps { - label = "bcm53xx:white:wps"; - gpios = <&chipcommon 15 GPIO_ACTIVE_HIGH>; -- linux,default-trigger = "default-off"; - }; - - 5ghz-2 { - label = "bcm53xx:white:5ghz-2"; - gpios = <&chipcommon 16 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "default-off"; - }; - - usb3 { - label = "bcm53xx:white:usb3"; - gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "default-off"; - }; - - usb2 { - label = "bcm53xx:white:usb2"; - gpios = <&chipcommon 18 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "default-off"; - }; - }; - ---- a/arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts -+++ b/arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts -@@ -26,49 +26,41 @@ - lan { - label = "bcm53xx:blue:lan"; - gpios = <&chipcommon 1 GPIO_ACTIVE_HIGH>; -- linux,default-trigger = "default-off"; - }; - - wps { - label = "bcm53xx:blue:wps"; - gpios = <&chipcommon 2 GPIO_ACTIVE_HIGH>; -- linux,default-trigger = "default-off"; - }; - - 2ghz { - label = "bcm53xx:blue:2ghz"; - gpios = <&chipcommon 4 GPIO_ACTIVE_HIGH>; -- linux,default-trigger = "default-off"; - }; - - 5ghz { - label = "bcm53xx:blue:5ghz"; - gpios = <&chipcommon 5 GPIO_ACTIVE_HIGH>; -- linux,default-trigger = "default-off"; - }; - - usb3 { - label = "bcm53xx:blue:usb3"; - gpios = <&chipcommon 6 GPIO_ACTIVE_HIGH>; -- linux,default-trigger = "default-off"; - }; - - usb2 { - label = "bcm53xx:blue:usb2"; - gpios = <&chipcommon 7 GPIO_ACTIVE_HIGH>; -- linux,default-trigger = "default-off"; - }; - - wan-blue { - label = "bcm53xx:blue:wan"; - gpios = <&chipcommon 14 GPIO_ACTIVE_HIGH>; -- linux,default-trigger = "default-off"; - }; - - wan-amber { - label = "bcm53xx:amber:wan"; - gpios = <&chipcommon 15 GPIO_ACTIVE_HIGH>; -- linux,default-trigger = "default-off"; - }; - - power { ---- a/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts -+++ b/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts -@@ -56,37 +56,31 @@ - wan-white { - label = "bcm53xx:white:wan"; - gpios = <&chipcommon 1 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "default-off"; - }; - - power-amber { - label = "bcm53xx:amber:power"; - gpios = <&chipcommon 2 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "default-off"; - }; - - wan-amber { - label = "bcm53xx:amber:wan"; - gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "default-off"; - }; - - usb3-white { - label = "bcm53xx:white:usb3"; - gpios = <&chipcommon 8 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "default-off"; - }; - - 2ghz { - label = "bcm53xx:white:2ghz"; - gpios = <&chipcommon 13 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "default-off"; - }; - - 5ghz { - label = "bcm53xx:white:5ghz"; - gpios = <&chipcommon 14 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "default-off"; - }; - }; - ---- a/arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts -+++ b/arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts -@@ -34,37 +34,31 @@ - lan3 { - label = "bcm53xx:green:lan3"; - gpios = <&chipcommon 1 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "default-off"; - }; - - lan4 { - label = "bcm53xx:green:lan4"; - gpios = <&chipcommon 2 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "default-off"; - }; - - wan { - label = "bcm53xx:green:wan"; - gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "default-off"; - }; - - lan1 { - label = "bcm53xx:green:lan1"; - gpios = <&chipcommon 4 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "default-off"; - }; - - lan2 { - label = "bcm53xx:green:lan2"; - gpios = <&chipcommon 6 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "default-off"; - }; - - usb3 { - label = "bcm53xx:green:usb3"; - gpios = <&chipcommon 8 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "default-off"; - }; - - status { -@@ -76,13 +70,11 @@ - 2ghz { - label = "bcm53xx:green:2ghz"; - gpios = <&chipcommon 13 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "default-off"; - }; - - 5ghz { - label = "bcm53xx:green:5ghz"; - gpios = <&chipcommon 14 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "default-off"; - }; - }; - ---- a/arch/arm/boot/dts/bcm47094-netgear-r8500.dts -+++ b/arch/arm/boot/dts/bcm47094-netgear-r8500.dts -@@ -34,37 +34,31 @@ - power1 { - label = "bcm53xx:amber:power"; - gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "default-off"; - }; - - 5ghz-1 { - label = "bcm53xx:white:5ghz-1"; - gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "default-off"; - }; - - 5ghz-2 { - label = "bcm53xx:white:5ghz-2"; - gpios = <&chipcommon 12 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "default-off"; - }; - - 2ghz { - label = "bcm53xx:white:2ghz"; - gpios = <&chipcommon 13 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "default-off"; - }; - - usb2 { - label = "bcm53xx:white:usb2"; - gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "default-off"; - }; - - usb3 { - label = "bcm53xx:white:usb3"; - gpios = <&chipcommon 18 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "default-off"; - }; - }; - diff --git a/target/linux/bcm53xx/patches-4.4/047-0014-ARM-dts-BCM5301X-Add-TWD-WD-Support-to-DT.patch b/target/linux/bcm53xx/patches-4.4/047-0014-ARM-dts-BCM5301X-Add-TWD-WD-Support-to-DT.patch deleted file mode 100644 index b112cba682..0000000000 --- a/target/linux/bcm53xx/patches-4.4/047-0014-ARM-dts-BCM5301X-Add-TWD-WD-Support-to-DT.patch +++ /dev/null @@ -1,40 +0,0 @@ -From f22c635e585471d01a38b829c0753c1467b5058e Mon Sep 17 00:00:00 2001 -From: Jon Mason <jonmason@broadcom.com> -Date: Mon, 6 Mar 2017 11:24:44 -0500 -Subject: [PATCH] ARM: dts: BCM5301X: Add TWD WD Support to DT - -Add support for the ARM TWD Watchdog to the bcm5301x device tree. The -ARM TWD timer allocated the register space for the WDT, so this patch -necessitated shrinking that. Also, the GIC masks were added for these. - -Signed-off-by: Jon Mason <jonmason@broadcom.com> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/bcm5301x.dtsi | 15 ++++++++++++--- - 1 file changed, 12 insertions(+), 3 deletions(-) - ---- a/arch/arm/boot/dts/bcm5301x.dtsi -+++ b/arch/arm/boot/dts/bcm5301x.dtsi -@@ -70,10 +70,19 @@ - clocks = <&periph_clk>; - }; - -- local-timer@20600 { -+ timer@20600 { - compatible = "arm,cortex-a9-twd-timer"; -- reg = <0x20600 0x100>; -- interrupts = <GIC_PPI 13 IRQ_TYPE_EDGE_RISING>; -+ reg = <0x20600 0x20>; -+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | -+ IRQ_TYPE_EDGE_RISING)>; -+ clocks = <&periph_clk>; -+ }; -+ -+ watchdog@20620 { -+ compatible = "arm,cortex-a9-twd-wdt"; -+ reg = <0x20620 0x20>; -+ interrupts = <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | -+ IRQ_TYPE_EDGE_RISING)>; - clocks = <&periph_clk>; - }; - diff --git a/target/linux/bcm53xx/patches-4.4/047-0015-ARM-dts-BCM5301X-Add-I2C-support-to-the-DT.patch b/target/linux/bcm53xx/patches-4.4/047-0015-ARM-dts-BCM5301X-Add-I2C-support-to-the-DT.patch deleted file mode 100644 index d233e06817..0000000000 --- a/target/linux/bcm53xx/patches-4.4/047-0015-ARM-dts-BCM5301X-Add-I2C-support-to-the-DT.patch +++ /dev/null @@ -1,34 +0,0 @@ -From bb097e3e00457bd69ad3a767f6b99424e2e06411 Mon Sep 17 00:00:00 2001 -From: Jon Mason <jonmason@broadcom.com> -Date: Mon, 6 Mar 2017 11:24:45 -0500 -Subject: [PATCH] ARM: dts: BCM5301X: Add I2C support to the DT - -Add I2C support to the bcm5301x Device Tree. Since no driver changes -are needed to enable this hardware, only the device tree changes are -required to make this functional. - -Signed-off-by: Jon Mason <jonmason@broadcom.com> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/bcm5301x.dtsi | 10 ++++++++++ - 1 file changed, 10 insertions(+) - ---- a/arch/arm/boot/dts/bcm5301x.dtsi -+++ b/arch/arm/boot/dts/bcm5301x.dtsi -@@ -338,6 +338,16 @@ - }; - }; - -+ i2c0: i2c@18009000 { -+ compatible = "brcm,iproc-i2c"; -+ reg = <0x18009000 0x50>; -+ interrupts = <GIC_SPI 121 IRQ_TYPE_NONE>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ clock-frequency = <100000>; -+ status = "disabled"; -+ }; -+ - lcpll0: lcpll0@1800c100 { - #clock-cells = <1>; - compatible = "brcm,nsp-lcpll0"; diff --git a/target/linux/bcm53xx/patches-4.4/047-0016-ARM-dts-BCM5301X-Add-support-for-TP-LINK-Archer-C5-V.patch b/target/linux/bcm53xx/patches-4.4/047-0016-ARM-dts-BCM5301X-Add-support-for-TP-LINK-Archer-C5-V.patch deleted file mode 100644 index db8fdb525d..0000000000 --- a/target/linux/bcm53xx/patches-4.4/047-0016-ARM-dts-BCM5301X-Add-support-for-TP-LINK-Archer-C5-V.patch +++ /dev/null @@ -1,130 +0,0 @@ -From d6661da842bbeec2082b7263c9e682792e7951a9 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Tue, 14 Mar 2017 11:39:41 +0100 -Subject: [PATCH] ARM: dts: BCM5301X: Add support for TP-LINK Archer C5 V2 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This is BCM47081A0 based home router with BCM43217 and BCM4352 wireless -chipsets. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/Makefile | 1 + - arch/arm/boot/dts/bcm47081-tplink-archer-c5-v2.dts | 98 ++++++++++++++++++++++ - 2 files changed, 99 insertions(+) - create mode 100644 arch/arm/boot/dts/bcm47081-tplink-archer-c5-v2.dts - ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -76,6 +76,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \ - bcm47081-buffalo-wzr-900dhp.dtb \ - bcm47081-luxul-xap-1410.dtb \ - bcm47081-luxul-xwr-1200.dtb \ -+ bcm47081-tplink-archer-c5-v2.dtb \ - bcm4709-asus-rt-ac87u.dtb \ - bcm4709-buffalo-wxr-1900dhp.dtb \ - bcm4709-linksys-ea9200.dtb \ ---- /dev/null -+++ b/arch/arm/boot/dts/bcm47081-tplink-archer-c5-v2.dts -@@ -0,0 +1,98 @@ -+/* -+ * Copyright (C) 2017 Rafał Miłecki <rafal@milecki.pl> -+ * -+ * Licensed under the ISC license. -+ */ -+ -+/dts-v1/; -+ -+#include "bcm47081.dtsi" -+ -+/ { -+ compatible = "tplink,archer-c5-v2", "brcm,bcm47081", "brcm,bcm4708"; -+ model = "TP-LINK Archer C5 V2"; -+ -+ chosen { -+ bootargs = "earlycon"; -+ }; -+ -+ memory { -+ reg = <0x00000000 0x08000000>; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ -+ 2ghz { -+ label = "bcm53xx:green:2ghz"; -+ gpios = <&chipcommon 0 GPIO_ACTIVE_HIGH>; -+ }; -+ -+ lan { -+ label = "bcm53xx:green:lan"; -+ gpios = <&chipcommon 1 GPIO_ACTIVE_HIGH>; -+ }; -+ -+ usb2-port1 { -+ label = "bcm53xx:green:usb2-port1"; -+ gpios = <&chipcommon 2 GPIO_ACTIVE_HIGH>; -+ }; -+ -+ power { -+ label = "bcm53xx:green:power"; -+ gpios = <&chipcommon 4 GPIO_ACTIVE_HIGH>; -+ linux,default-trigger = "default-on"; -+ }; -+ -+ wan-green { -+ label = "bcm53xx:green:wan"; -+ gpios = <&chipcommon 5 GPIO_ACTIVE_HIGH>; -+ }; -+ -+ wps { -+ label = "bcm53xx:green:wps"; -+ gpios = <&chipcommon 6 GPIO_ACTIVE_HIGH>; -+ }; -+ -+ wan-amber { -+ label = "bcm53xx:amber:wan"; -+ gpios = <&chipcommon 8 GPIO_ACTIVE_HIGH>; -+ }; -+ -+ 5ghz { -+ label = "bcm53xx:green:5ghz"; -+ gpios = <&chipcommon 12 GPIO_ACTIVE_HIGH>; -+ }; -+ -+ usb2-port2 { -+ label = "bcm53xx:green:usb2-port2"; -+ gpios = <&chipcommon 13 GPIO_ACTIVE_HIGH>; -+ }; -+ }; -+ -+ gpio-keys { -+ compatible = "gpio-keys"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ rfkill { -+ label = "WiFi"; -+ linux,code = <KEY_RFKILL>; -+ gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>; -+ }; -+ -+ restart { -+ label = "Reset"; -+ linux,code = <KEY_RESTART>; -+ gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>; -+ }; -+ }; -+}; -+ -+&spi_nor { -+ status = "okay"; -+}; -+ -+&usb2 { -+ vcc-gpio = <&chipcommon 9 GPIO_ACTIVE_HIGH>; -+}; diff --git a/target/linux/bcm53xx/patches-4.4/047-0017-ARM-dts-BCM953012HR-Add-ethernet-aliases.patch b/target/linux/bcm53xx/patches-4.4/047-0017-ARM-dts-BCM953012HR-Add-ethernet-aliases.patch deleted file mode 100644 index 781af7a527..0000000000 --- a/target/linux/bcm53xx/patches-4.4/047-0017-ARM-dts-BCM953012HR-Add-ethernet-aliases.patch +++ /dev/null @@ -1,27 +0,0 @@ -From a7996761d1dacbac10c892c16faa90dfe46affcd Mon Sep 17 00:00:00 2001 -From: Steve Lin <steven.lin1@broadcom.com> -Date: Wed, 15 Mar 2017 16:59:35 -0400 -Subject: [PATCH] ARM: dts: BCM953012HR: Add ethernet aliases - -Adding ethernet aliases. These are used, for example, by bootloaders, -to modify the MAC addresses in the device tree. - -Signed-off-by: Steve Lin <steven.lin1@broadcom.com> -Acked-by: Jon Mason <jon.mason@broadcom.com> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/bcm953012hr.dts | 3 +++ - 1 file changed, 3 insertions(+) - ---- a/arch/arm/boot/dts/bcm953012hr.dts -+++ b/arch/arm/boot/dts/bcm953012hr.dts -@@ -41,6 +41,9 @@ - - aliases { - serial0 = &uart0; -+ ethernet0 = &gmac0; -+ ethernet1 = &gmac1; -+ ethernet2 = &gmac2; - }; - - chosen { diff --git a/target/linux/bcm53xx/patches-4.4/047-0018-ARM-dts-BCM5301X-Specify-serial-console-params-in-dt.patch b/target/linux/bcm53xx/patches-4.4/047-0018-ARM-dts-BCM5301X-Specify-serial-console-params-in-dt.patch deleted file mode 100644 index d174adc0b8..0000000000 --- a/target/linux/bcm53xx/patches-4.4/047-0018-ARM-dts-BCM5301X-Specify-serial-console-params-in-dt.patch +++ /dev/null @@ -1,161 +0,0 @@ -From 5be82d0475941dc96eeeee3c754baf48365f7bf5 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Wed, 15 Mar 2017 18:03:27 +0100 -Subject: [PATCH] ARM: dts: BCM5301X: Specify serial console params in dtsi - files -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -So far every Northstar device we have seen was using the same serial -console params (115200n8). It probably make the most sense to put it in -some proper dtsi files instead of repeating over and over for every -single device. As different boards may use different bootloaders it -seems the safest idea is to use board specific dtsi files. - -Just in case some vendor decides to use different UART (parameters) this -can be always easily overwritten. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/bcm4708.dtsi | 8 ++++++++ - arch/arm/boot/dts/bcm47081.dtsi | 8 ++++++++ - arch/arm/boot/dts/bcm5301x.dtsi | 4 ---- - arch/arm/boot/dts/bcm94708.dts | 8 -------- - arch/arm/boot/dts/bcm94709.dts | 8 -------- - arch/arm/boot/dts/bcm953012er.dts | 8 -------- - arch/arm/boot/dts/bcm953012hr.dts | 5 ----- - arch/arm/boot/dts/bcm953012k.dts | 4 ---- - 8 files changed, 16 insertions(+), 37 deletions(-) - ---- a/arch/arm/boot/dts/bcm4708.dtsi -+++ b/arch/arm/boot/dts/bcm4708.dtsi -@@ -12,6 +12,14 @@ - / { - compatible = "brcm,bcm4708"; - -+ aliases { -+ serial0 = &uart0; -+ }; -+ -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ - cpus { - #address-cells = <1>; - #size-cells = <0>; ---- a/arch/arm/boot/dts/bcm47081.dtsi -+++ b/arch/arm/boot/dts/bcm47081.dtsi -@@ -22,6 +22,14 @@ - / { - compatible = "brcm,bcm47081"; - -+ aliases { -+ serial0 = &uart0; -+ }; -+ -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ - cpus { - #address-cells = <1>; - #size-cells = <0>; ---- a/arch/arm/boot/dts/bcm5301x.dtsi -+++ b/arch/arm/boot/dts/bcm5301x.dtsi -@@ -18,10 +18,6 @@ - / { - interrupt-parent = <&gic>; - -- chosen { -- stdout-path = &uart0; -- }; -- - chipcommonA { - compatible = "simple-bus"; - ranges = <0x00000000 0x18000000 0x00001000>; ---- a/arch/arm/boot/dts/bcm94708.dts -+++ b/arch/arm/boot/dts/bcm94708.dts -@@ -38,14 +38,6 @@ - model = "NorthStar SVK (BCM94708)"; - compatible = "brcm,bcm94708", "brcm,bcm4708"; - -- aliases { -- serial0 = &uart0; -- }; -- -- chosen { -- stdout-path = "serial0:115200n8"; -- }; -- - memory { - reg = <0x00000000 0x08000000>; - }; ---- a/arch/arm/boot/dts/bcm94709.dts -+++ b/arch/arm/boot/dts/bcm94709.dts -@@ -38,14 +38,6 @@ - model = "NorthStar SVK (BCM94709)"; - compatible = "brcm,bcm94709", "brcm,bcm4709", "brcm,bcm4708"; - -- aliases { -- serial0 = &uart0; -- }; -- -- chosen { -- stdout-path = "serial0:115200n8"; -- }; -- - memory { - reg = <0x00000000 0x08000000>; - }; ---- a/arch/arm/boot/dts/bcm953012er.dts -+++ b/arch/arm/boot/dts/bcm953012er.dts -@@ -39,14 +39,6 @@ - model = "NorthStar Enterprise Router (BCM953012ER)"; - compatible = "brcm,bcm953012er", "brcm,brcm53012", "brcm,bcm4708"; - -- aliases { -- serial0 = &uart0; -- }; -- -- chosen { -- stdout-path = "serial0:115200n8"; -- }; -- - memory { - reg = <0x00000000 0x8000000>; - }; ---- a/arch/arm/boot/dts/bcm953012hr.dts -+++ b/arch/arm/boot/dts/bcm953012hr.dts -@@ -40,16 +40,11 @@ - compatible = "brcm,bcm953012hr", "brcm,brcm53012", "brcm,bcm4708"; - - aliases { -- serial0 = &uart0; - ethernet0 = &gmac0; - ethernet1 = &gmac1; - ethernet2 = &gmac2; - }; - -- chosen { -- stdout-path = "serial0:115200n8"; -- }; -- - memory@80000000 { - reg = <0x80000000 0x10000000>; - }; ---- a/arch/arm/boot/dts/bcm953012k.dts -+++ b/arch/arm/boot/dts/bcm953012k.dts -@@ -43,10 +43,6 @@ - serial1 = &uart1; - }; - -- chosen { -- stdout-path = "serial0:115200n8"; -- }; -- - memory { - reg = <0x00000000 0x10000000>; - }; diff --git a/target/linux/bcm53xx/patches-4.4/047-0019-ARM-dts-BCM53573-Specify-serial-console-parameters.patch b/target/linux/bcm53xx/patches-4.4/047-0019-ARM-dts-BCM53573-Specify-serial-console-parameters.patch deleted file mode 100644 index b2a9a1f6c8..0000000000 --- a/target/linux/bcm53xx/patches-4.4/047-0019-ARM-dts-BCM53573-Specify-serial-console-parameters.patch +++ /dev/null @@ -1,33 +0,0 @@ -From 3a599e0dbc03ffc51568cf3376633d127451632d Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Wed, 15 Mar 2017 18:03:28 +0100 -Subject: [PATCH] ARM: dts: BCM53573: Specify serial console parameters -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This adds baud rate, parity & number of data bits. It's required to get -serial working correctly. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/bcm53573.dtsi | 6 +++++- - 1 file changed, 5 insertions(+), 1 deletion(-) - ---- a/arch/arm/boot/dts/bcm53573.dtsi -+++ b/arch/arm/boot/dts/bcm53573.dtsi -@@ -13,8 +13,12 @@ - / { - interrupt-parent = <&gic>; - -+ aliases { -+ serial0 = &uart0; -+ }; -+ - chosen { -- stdout-path = &uart0; -+ stdout-path = "serial0:115200n8"; - }; - - cpus { diff --git a/target/linux/bcm53xx/patches-4.4/047-0020-ARM-dts-BCM5301X-Add-CPU-thermal-sensor-and-zone.patch b/target/linux/bcm53xx/patches-4.4/047-0020-ARM-dts-BCM5301X-Add-CPU-thermal-sensor-and-zone.patch deleted file mode 100644 index 461696e960..0000000000 --- a/target/linux/bcm53xx/patches-4.4/047-0020-ARM-dts-BCM5301X-Add-CPU-thermal-sensor-and-zone.patch +++ /dev/null @@ -1,59 +0,0 @@ -From e55d2c7272ff647efac4aecd895b20ee66e43519 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Fri, 14 Apr 2017 23:42:28 +0200 -Subject: [PATCH] ARM: dts: BCM5301X: Add CPU thermal sensor and zone -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This uses CPU thermal sensor available on every Northstar chipset to -monitor temperature. We don't have any cooling or throttling so only a -critical trip was added. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Acked-by: Jon Mason <jon.mason@broadcom.com> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/bcm5301x.dtsi | 26 ++++++++++++++++++++++++++ - 1 file changed, 26 insertions(+) - ---- a/arch/arm/boot/dts/bcm5301x.dtsi -+++ b/arch/arm/boot/dts/bcm5301x.dtsi -@@ -363,6 +363,12 @@ - "sata2"; - }; - -+ thermal: thermal@1800c2c0 { -+ compatible = "brcm,ns-thermal"; -+ reg = <0x1800c2c0 0x10>; -+ #thermal-sensor-cells = <0>; -+ }; -+ - srab: srab@18007000 { - compatible = "brcm,bcm5301x-srab"; - reg = <0x18007000 0x1000>; -@@ -390,4 +396,24 @@ - - brcm,nand-has-wp; - }; -+ -+ thermal-zones { -+ cpu_thermal: cpu-thermal { -+ polling-delay-passive = <0>; -+ polling-delay = <1000>; -+ coefficients = <(-556) 418000>; -+ thermal-sensors = <&thermal>; -+ -+ trips { -+ cpu-crit { -+ temperature = <125000>; -+ hysteresis = <0>; -+ type = "critical"; -+ }; -+ }; -+ -+ cooling-maps { -+ }; -+ }; -+ }; - }; diff --git a/target/linux/bcm53xx/patches-4.4/047-0021-ARM-dts-BCM5301X-Specify-MDIO-bus-in-the-DT.patch b/target/linux/bcm53xx/patches-4.4/047-0021-ARM-dts-BCM5301X-Specify-MDIO-bus-in-the-DT.patch deleted file mode 100644 index 8449a342a2..0000000000 --- a/target/linux/bcm53xx/patches-4.4/047-0021-ARM-dts-BCM5301X-Specify-MDIO-bus-in-the-DT.patch +++ /dev/null @@ -1,34 +0,0 @@ -From c4b88e77c28fad5151a1a4eac516b947e2d51be5 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Wed, 19 Apr 2017 23:54:25 +0200 -Subject: [PATCH] ARM: dts: BCM5301X: Specify MDIO bus in the DT -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Northstar devices have MDIO bus that may contain various PHYs attached. -A common example is USB 3.0 PHY (that doesn't have an MDIO driver yet). - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/bcm5301x.dtsi | 8 ++++++++ - 1 file changed, 8 insertions(+) - ---- a/arch/arm/boot/dts/bcm5301x.dtsi -+++ b/arch/arm/boot/dts/bcm5301x.dtsi -@@ -334,6 +334,14 @@ - }; - }; - -+ mdio: mdio@18003000 { -+ compatible = "brcm,iproc-mdio"; -+ reg = <0x18003000 0x8>; -+ #size-cells = <1>; -+ #address-cells = <0>; -+ status = "disabled"; -+ }; -+ - i2c0: i2c@18009000 { - compatible = "brcm,iproc-i2c"; - reg = <0x18009000 0x50>; diff --git a/target/linux/bcm53xx/patches-4.4/049-v4.14-0001-ARM-dts-BCM5301X-Specify-USB-ports-for-each-controll.patch b/target/linux/bcm53xx/patches-4.4/049-v4.14-0001-ARM-dts-BCM5301X-Specify-USB-ports-for-each-controll.patch deleted file mode 100644 index 9857dec9bd..0000000000 --- a/target/linux/bcm53xx/patches-4.4/049-v4.14-0001-ARM-dts-BCM5301X-Specify-USB-ports-for-each-controll.patch +++ /dev/null @@ -1,74 +0,0 @@ -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Tue, 27 Jun 2017 19:35:27 +0200 -Subject: [PATCH] ARM: dts: BCM5301X: Specify USB ports for each controller -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Northstar has 3 controllers: OHCI and EHCI (each with 2 ports) and XHCI -(with just 1 port). Describe them in the DT. In future this will allow -to reference them as trigger sources. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/bcm5301x.dtsi | 34 ++++++++++++++++++++++++++++++++++ - 1 file changed, 34 insertions(+) - ---- a/arch/arm/boot/dts/bcm5301x.dtsi -+++ b/arch/arm/boot/dts/bcm5301x.dtsi -@@ -272,6 +272,19 @@ - reg = <0x00021000 0x1000>; - interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; - phys = <&usb2_phy>; -+ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ ehci_port1: port@1 { -+ reg = <1>; -+ #trigger-source-cells = <0>; -+ }; -+ -+ ehci_port2: port@2 { -+ reg = <2>; -+ #trigger-source-cells = <0>; -+ }; - }; - - ohci: ohci@22000 { -@@ -280,6 +293,19 @@ - compatible = "generic-ohci"; - reg = <0x00022000 0x1000>; - interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; -+ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ ohci_port1: port@1 { -+ reg = <1>; -+ #trigger-source-cells = <0>; -+ }; -+ -+ ohci_port2: port@2 { -+ reg = <2>; -+ #trigger-source-cells = <0>; -+ }; - }; - }; - -@@ -300,6 +326,14 @@ - interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; - phys = <&usb3_phy>; - phy-names = "usb"; -+ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ xhci_port1: port@1 { -+ reg = <1>; -+ #trigger-source-cells = <0>; -+ }; - }; - }; - diff --git a/target/linux/bcm53xx/patches-4.4/049-v4.14-0002-ARM-dts-BCM5301X-Specify-USB-ports-for-USB-LEDs-of-f.patch b/target/linux/bcm53xx/patches-4.4/049-v4.14-0002-ARM-dts-BCM5301X-Specify-USB-ports-for-USB-LEDs-of-f.patch deleted file mode 100644 index c2195b1726..0000000000 --- a/target/linux/bcm53xx/patches-4.4/049-v4.14-0002-ARM-dts-BCM5301X-Specify-USB-ports-for-USB-LEDs-of-f.patch +++ /dev/null @@ -1,139 +0,0 @@ -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Wed, 2 Aug 2017 06:40:41 +0200 -Subject: [PATCH] ARM: dts: BCM5301X: Specify USB ports for USB LEDs of few - devices -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This uses trigger-sources documented in commit 80dc6e1cd85fc ("dt-bindings: -leds: document new trigger-sources property") to specify USB ports. Such an -information can be used by operating system to setup LEDs behavior. - -I updated dts files for 7 devices I own and I was able to test. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts | 4 ++++ - arch/arm/boot/dts/bcm4708-netgear-r6250.dts | 3 +++ - arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts | 6 ++++++ - arch/arm/boot/dts/bcm47081-tplink-archer-c5-v2.dts | 4 ++++ - arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts | 5 +++++ - arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts | 3 +++ - arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts | 3 +++ - 7 files changed, 28 insertions(+) - ---- a/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts -+++ b/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts -@@ -52,6 +52,10 @@ - usb { - label = "bcm53xx:blue:usb"; - gpios = <&hc595 0 GPIO_ACTIVE_HIGH>; -+ trigger-sources = <&ohci_port1>, <&ehci_port1>, -+ <&xhci_port1>, <&ohci_port2>, -+ <&ehci_port2>; -+ linux,default-trigger = "usbport"; - }; - - power0 { ---- a/arch/arm/boot/dts/bcm4708-netgear-r6250.dts -+++ b/arch/arm/boot/dts/bcm4708-netgear-r6250.dts -@@ -48,6 +48,9 @@ - usb { - label = "bcm53xx:blue:usb"; - gpios = <&chipcommon 8 GPIO_ACTIVE_LOW>; -+ trigger-sources = <&ohci_port1>, <&ehci_port1>, -+ <&xhci_port1>; -+ linux,default-trigger = "usbport"; - }; - - wireless { ---- a/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts -+++ b/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts -@@ -42,16 +42,22 @@ - usb2 { - label = "bcm53xx:white:usb2"; - gpios = <&chipcommon 3 GPIO_ACTIVE_HIGH>; -+ trigger-sources = <&ohci_port2>, <&ehci_port2>; -+ linux,default-trigger = "usbport"; - }; - - usb3-white { - label = "bcm53xx:white:usb3"; - gpios = <&chipcommon 4 GPIO_ACTIVE_HIGH>; -+ trigger-sources = <&xhci_port1>; -+ linux,default-trigger = "usbport"; - }; - - usb3-green { - label = "bcm53xx:green:usb3"; - gpios = <&chipcommon 5 GPIO_ACTIVE_HIGH>; -+ trigger-sources = <&ohci_port1>, <&ehci_port1>; -+ linux,default-trigger = "usbport"; - }; - - wps { ---- a/arch/arm/boot/dts/bcm47081-tplink-archer-c5-v2.dts -+++ b/arch/arm/boot/dts/bcm47081-tplink-archer-c5-v2.dts -@@ -36,6 +36,8 @@ - usb2-port1 { - label = "bcm53xx:green:usb2-port1"; - gpios = <&chipcommon 2 GPIO_ACTIVE_HIGH>; -+ trigger-sources = <&ohci_port1>, <&ehci_port1>; -+ linux,default-trigger = "usbport"; - }; - - power { -@@ -67,6 +69,8 @@ - usb2-port2 { - label = "bcm53xx:green:usb2-port2"; - gpios = <&chipcommon 13 GPIO_ACTIVE_HIGH>; -+ trigger-sources = <&ohci_port2>, <&ehci_port2>; -+ linux,default-trigger = "usbport"; - }; - }; - ---- a/arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts -+++ b/arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts -@@ -46,11 +46,16 @@ - usb3 { - label = "bcm53xx:blue:usb3"; - gpios = <&chipcommon 6 GPIO_ACTIVE_HIGH>; -+ trigger-sources = <&ohci_port1>, <&ehci_port1>, -+ <&xhci_port1>; -+ linux,default-trigger = "usbport"; - }; - - usb2 { - label = "bcm53xx:blue:usb2"; - gpios = <&chipcommon 7 GPIO_ACTIVE_HIGH>; -+ trigger-sources = <&ohci_port2>, <&ehci_port2>; -+ linux,default-trigger = "usbport"; - }; - - wan-blue { ---- a/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts -+++ b/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts -@@ -71,6 +71,9 @@ - usb3-white { - label = "bcm53xx:white:usb3"; - gpios = <&chipcommon 8 GPIO_ACTIVE_LOW>; -+ trigger-sources = <&ohci_port1>, <&ehci_port1>, -+ <&xhci_port1>; -+ linux,default-trigger = "usbport"; - }; - - 2ghz { ---- a/arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts -+++ b/arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts -@@ -59,6 +59,9 @@ - usb3 { - label = "bcm53xx:green:usb3"; - gpios = <&chipcommon 8 GPIO_ACTIVE_LOW>; -+ trigger-sources = <&ohci_port1>, <&ehci_port1>, -+ <&xhci_port1>; -+ linux,default-trigger = "usbport"; - }; - - status { diff --git a/target/linux/bcm53xx/patches-4.4/049-v4.14-0003-ARM-dts-BCM53573-Add-Broadcom-BCM947189ACDBMR-board-.patch b/target/linux/bcm53xx/patches-4.4/049-v4.14-0003-ARM-dts-BCM53573-Add-Broadcom-BCM947189ACDBMR-board-.patch deleted file mode 100644 index 69deca161f..0000000000 --- a/target/linux/bcm53xx/patches-4.4/049-v4.14-0003-ARM-dts-BCM53573-Add-Broadcom-BCM947189ACDBMR-board-.patch +++ /dev/null @@ -1,135 +0,0 @@ -From 092ccf0415c720a1e9458a46fe75f77574027a55 Mon Sep 17 00:00:00 2001 -From: Florian Fainelli <f.fainelli@gmail.com> -Date: Tue, 18 Jul 2017 12:37:37 -0700 -Subject: [PATCH] ARM: dts: BCM53573: Add Broadcom BCM947189ACDBMR board - support - -Adds support for the Broadcom reference board BCM947189ACDMBR which -features the following: - -* 128MB of DRAM -* External MoCA support through a Broadcom BCM6802 chip -* 1x external Gigabit PHY through the external BCM6802 -* 1x USB 2.0 port -* 1x PCIE slot -* Few configurable buttons and LEDs - -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/Makefile | 3 +- - arch/arm/boot/dts/bcm947189acdbmr.dts | 97 +++++++++++++++++++++++++++++++++++ - 2 files changed, 99 insertions(+), 1 deletion(-) - create mode 100644 arch/arm/boot/dts/bcm947189acdbmr.dts - ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -93,7 +93,8 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \ - bcm953012hr.dtb \ - bcm953012k.dtb - dtb-$(CONFIG_ARCH_BCM_53573) += \ -- bcm47189-tenda-ac9.dtb -+ bcm47189-tenda-ac9.dtb \ -+ bcm947189acdbmr.dtb - dtb-$(CONFIG_ARCH_BCM_63XX) += \ - bcm963138dvt.dtb - dtb-$(CONFIG_ARCH_BCM_CYGNUS) += \ ---- /dev/null -+++ b/arch/arm/boot/dts/bcm947189acdbmr.dts -@@ -0,0 +1,97 @@ -+/* -+ * Copyright (C) 2017 Broadcom -+ * Author: Florian Fainelli <f.fainelli@gmail.com> -+ * -+ * Licensed under the ISC license. -+ */ -+ -+/dts-v1/; -+ -+#include "bcm53573.dtsi" -+ -+/ { -+ compatible = "brcm,bcm947189acdbmr", "brcm,bcm47189", "brcm,bcm53573"; -+ model = "Broadcom BCM947189ACDBMR"; -+ -+ chosen { -+ bootargs = "console=ttyS0,115200 earlycon"; -+ }; -+ -+ memory { -+ reg = <0x00000000 0x08000000>; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ -+ wps { -+ label = "bcm53xx:blue:wps"; -+ gpios = <&chipcommon 10 GPIO_ACTIVE_HIGH>; -+ }; -+ -+ 5ghz { -+ label = "bcm53xx:blue:5ghz"; -+ gpios = <&chipcommon 11 GPIO_ACTIVE_HIGH>; -+ }; -+ -+ 2ghz { -+ label = "bcm53xx:blue:2ghz"; -+ gpios = <&chipcommon 12 GPIO_ACTIVE_HIGH>; -+ }; -+ }; -+ -+ gpio-keys { -+ compatible = "gpio-keys"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ restart { -+ label = "Reset"; -+ linux,code = <KEY_RESTART>; -+ gpios = <&chipcommon 7 GPIO_ACTIVE_HIGH>; -+ }; -+ -+ wps { -+ label = "WPS"; -+ linux,code = <KEY_WPS_BUTTON>; -+ gpios = <&chipcommon 9 GPIO_ACTIVE_LOW>; -+ }; -+ }; -+ -+ spi { -+ compatible = "spi-gpio"; -+ num-chipselects = <1>; -+ gpio-sck = <&chipcommon 21 0>; -+ gpio-miso = <&chipcommon 22 0>; -+ gpio-mosi = <&chipcommon 23 0>; -+ cs-gpios = <&chipcommon 24 0>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ /* External BCM6802 MoCA chip is connected */ -+ }; -+}; -+ -+&pcie0 { -+ ranges = <0x00000000 0 0 0 0 0x00100000>; -+ #address-cells = <3>; -+ #size-cells = <2>; -+ -+ bridge@0,0,0 { -+ reg = <0x0000 0 0 0 0>; -+ ranges = <0x00000000 0 0 0 0 0 0 0x00100000>; -+ #address-cells = <3>; -+ #size-cells = <2>; -+ -+ wifi@0,1,0 { -+ reg = <0x0000 0 0 0 0>; -+ ranges = <0x00000000 0 0 0 0x00100000>; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ }; -+ }; -+}; -+ -+&usb2 { -+ vcc-gpio = <&chipcommon 8 GPIO_ACTIVE_HIGH>; -+}; diff --git a/target/linux/bcm53xx/patches-4.4/049-v4.14-0004-ARM-BCM53573-Specify-ports-for-USB-LED-for-Tenda-AC9.patch b/target/linux/bcm53xx/patches-4.4/049-v4.14-0004-ARM-BCM53573-Specify-ports-for-USB-LED-for-Tenda-AC9.patch deleted file mode 100644 index 75f1d1772e..0000000000 --- a/target/linux/bcm53xx/patches-4.4/049-v4.14-0004-ARM-BCM53573-Specify-ports-for-USB-LED-for-Tenda-AC9.patch +++ /dev/null @@ -1,58 +0,0 @@ -From 0173b2cd6948b5b96ac4e8dbc3bcb4dd0b45c296 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Thu, 17 Aug 2017 11:05:14 +0200 -Subject: [PATCH] ARM: BCM53573: Specify ports for USB LED for Tenda AC9 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This uses trigger-sources documented in commit 80dc6e1cd85fc ("dt-bindings: -leds: document new trigger-sources property") to specify USB ports. Such an -information can be used by operating system to setup LEDs behavior. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/bcm47189-tenda-ac9.dts | 2 ++ - arch/arm/boot/dts/bcm53573.dtsi | 4 ++++ - 2 files changed, 6 insertions(+) - ---- a/arch/arm/boot/dts/bcm47189-tenda-ac9.dts -+++ b/arch/arm/boot/dts/bcm47189-tenda-ac9.dts -@@ -26,6 +26,8 @@ - usb { - label = "bcm53xx:blue:usb"; - gpios = <&chipcommon 1 GPIO_ACTIVE_HIGH>; -+ trigger-sources = <&ohci_port1>, <&ehci_port1>; -+ linux,default-trigger = "usbport"; - }; - - wps { ---- a/arch/arm/boot/dts/bcm53573.dtsi -+++ b/arch/arm/boot/dts/bcm53573.dtsi -@@ -138,10 +138,12 @@ - - ehci_port1: port@1 { - reg = <1>; -+ #trigger-source-cells = <0>; - }; - - ehci_port2: port@2 { - reg = <2>; -+ #trigger-source-cells = <0>; - }; - }; - -@@ -158,10 +160,12 @@ - - ohci_port1: port@1 { - reg = <1>; -+ #trigger-source-cells = <0>; - }; - - ohci_port2: port@2 { - reg = <2>; -+ #trigger-source-cells = <0>; - }; - }; - }; diff --git a/target/linux/bcm53xx/patches-4.4/049-v4.15-0001-ARM-dts-BCM5301X-Specify-USB-ports-for-USB-LED-of-Lu.patch b/target/linux/bcm53xx/patches-4.4/049-v4.15-0001-ARM-dts-BCM5301X-Specify-USB-ports-for-USB-LED-of-Lu.patch deleted file mode 100644 index 3148f6c32d..0000000000 --- a/target/linux/bcm53xx/patches-4.4/049-v4.15-0001-ARM-dts-BCM5301X-Specify-USB-ports-for-USB-LED-of-Lu.patch +++ /dev/null @@ -1,30 +0,0 @@ -From 2460266f21f140936e627f28f28d1a4f30887ae9 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Fri, 6 Oct 2017 10:52:35 +0200 -Subject: [PATCH] ARM: dts: BCM5301X: Specify USB ports for USB LED of Luxul - XWR-1200 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This info can be used by operating system to setup LED behavior. - -Reported-by: Dan Haab <dhaab@luxul.com> -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - ---- a/arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts -+++ b/arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts -@@ -57,7 +57,8 @@ - usb { - label = "bcm53xx:green:usb"; - gpios = <&chipcommon 8 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "none"; -+ trigger-sources = <&ohci_port2>, <&ehci_port2>; -+ linux,default-trigger = "usbport"; - }; - - status { diff --git a/target/linux/bcm53xx/patches-4.4/049-v4.15-0002-ARM-dts-BCM5301X-Add-DT-for-Luxul-XBR-4500.patch b/target/linux/bcm53xx/patches-4.4/049-v4.15-0002-ARM-dts-BCM5301X-Add-DT-for-Luxul-XBR-4500.patch deleted file mode 100644 index fbe8f54699..0000000000 --- a/target/linux/bcm53xx/patches-4.4/049-v4.15-0002-ARM-dts-BCM5301X-Add-DT-for-Luxul-XBR-4500.patch +++ /dev/null @@ -1,96 +0,0 @@ -From 1f4b0d5596d2e3ea8e953d578ab8444ce860d35d Mon Sep 17 00:00:00 2001 -From: Dan Haab <dhaab@luxul.com> -Date: Mon, 9 Oct 2017 09:46:22 -0600 -Subject: [PATCH] ARM: dts: BCM5301X: Add DT for Luxul XBR-4500 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This is BCM47094 (AKA BCM4709C0) based router with ports-on-the-front -board design. - -Signed-off-by: Dan Haab <dhaab@luxul.com> -Acked-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/Makefile | 1 + - arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts | 63 +++++++++++++++++++++++++++ - 2 files changed, 64 insertions(+) - create mode 100644 arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts - ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -85,6 +85,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \ - bcm4709-tplink-archer-c9-v1.dtb \ - bcm47094-dlink-dir-885l.dtb \ - bcm47094-linksys-panamera.dtb \ -+ bcm47094-luxul-xbr-4500.dtb \ - bcm47094-luxul-xwr-3100.dtb \ - bcm47094-netgear-r8500.dtb \ - bcm94708.dtb \ ---- /dev/null -+++ b/arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts -@@ -0,0 +1,63 @@ -+/* -+ * Copyright (C) 2017 Luxul Inc. -+ * -+ * Licensed under the ISC license. -+ */ -+ -+/dts-v1/; -+ -+#include "bcm4708.dtsi" -+#include "bcm5301x-nand-cs0-bch8.dtsi" -+ -+/ { -+ compatible = "luxul,xbr-4500-v1", "brcm,bcm47094", "brcm,bcm4708"; -+ model = "Luxul XBR-4500 V1"; -+ -+ chosen { -+ bootargs = "earlycon"; -+ }; -+ -+ memory { -+ reg = <0x00000000 0x08000000 -+ 0x88000000 0x18000000>; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ -+ status { -+ label = "bcm53xx:green:status"; -+ gpios = <&chipcommon 20 GPIO_ACTIVE_HIGH>; -+ linux,default-trigger = "timer"; -+ }; -+ -+ usb3 { -+ label = "bcm53xx:green:usb3"; -+ gpios = <&chipcommon 19 GPIO_ACTIVE_HIGH>; -+ trigger-sources = <&ohci_port1>, <&ehci_port1>, -+ <&xhci_port1>; -+ linux,default-trigger = "usbport"; -+ }; -+ -+ }; -+ -+ gpio-keys { -+ compatible = "gpio-keys"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ restart { -+ label = "Reset"; -+ linux,code = <KEY_RESTART>; -+ gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>; -+ }; -+ }; -+}; -+ -+&usb3 { -+ vcc-gpio = <&chipcommon 18 GPIO_ACTIVE_HIGH>; -+}; -+ -+&spi_nor { -+ status = "okay"; -+}; diff --git a/target/linux/bcm53xx/patches-4.4/049-v4.15-0003-ARM-dts-BCM5301X-Add-DT-for-Luxul-ABR-4500.patch b/target/linux/bcm53xx/patches-4.4/049-v4.15-0003-ARM-dts-BCM5301X-Add-DT-for-Luxul-ABR-4500.patch deleted file mode 100644 index b5ba1dde18..0000000000 --- a/target/linux/bcm53xx/patches-4.4/049-v4.15-0003-ARM-dts-BCM5301X-Add-DT-for-Luxul-ABR-4500.patch +++ /dev/null @@ -1,96 +0,0 @@ -From 65f78c4c41a9b9a7637e1dda2d5e41cf26ea971c Mon Sep 17 00:00:00 2001 -From: Dan Haab <dhaab@luxul.com> -Date: Mon, 9 Oct 2017 09:46:23 -0600 -Subject: [PATCH] ARM: dts: BCM5301X: Add DT for Luxul ABR-4500 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This is BCM47094 (AKA BCM4709C0) based router with rear-facing ports -board design. - -Signed-off-by: Dan Haab <dhaab@luxul.com> -Acked-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/Makefile | 1 + - arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts | 63 +++++++++++++++++++++++++++ - 2 files changed, 64 insertions(+) - create mode 100644 arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts - ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -85,6 +85,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \ - bcm4709-tplink-archer-c9-v1.dtb \ - bcm47094-dlink-dir-885l.dtb \ - bcm47094-linksys-panamera.dtb \ -+ bcm47094-luxul-abr-4500.dtb \ - bcm47094-luxul-xbr-4500.dtb \ - bcm47094-luxul-xwr-3100.dtb \ - bcm47094-netgear-r8500.dtb \ ---- /dev/null -+++ b/arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts -@@ -0,0 +1,63 @@ -+/* -+ * Copyright (C) 2017 Luxul Inc. -+ * -+ * Licensed under the ISC license. -+ */ -+ -+/dts-v1/; -+ -+#include "bcm4708.dtsi" -+#include "bcm5301x-nand-cs0-bch8.dtsi" -+ -+/ { -+ compatible = "luxul,abr-4500-v1", "brcm,bcm47094", "brcm,bcm4708"; -+ model = "Luxul ABR-4500 V1"; -+ -+ chosen { -+ bootargs = "earlycon"; -+ }; -+ -+ memory { -+ reg = <0x00000000 0x08000000 -+ 0x88000000 0x18000000>; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ -+ status { -+ label = "bcm53xx:green:status"; -+ gpios = <&chipcommon 20 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "timer"; -+ }; -+ -+ usb3 { -+ label = "bcm53xx:green:usb3"; -+ gpios = <&chipcommon 19 GPIO_ACTIVE_LOW>; -+ trigger-sources = <&ohci_port1>, <&ehci_port1>, -+ <&xhci_port1>; -+ linux,default-trigger = "usbport"; -+ }; -+ -+ }; -+ -+ gpio-keys { -+ compatible = "gpio-keys"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ restart { -+ label = "Reset"; -+ linux,code = <KEY_RESTART>; -+ gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>; -+ }; -+ }; -+}; -+ -+&usb3 { -+ vcc-gpio = <&chipcommon 18 GPIO_ACTIVE_HIGH>; -+}; -+ -+&spi_nor { -+ status = "okay"; -+}; diff --git a/target/linux/bcm53xx/patches-4.4/049-v4.15-0004-ARM-dts-BCM53573-Add-DT-for-Luxul-XAP-810.patch b/target/linux/bcm53xx/patches-4.4/049-v4.15-0004-ARM-dts-BCM53573-Add-DT-for-Luxul-XAP-810.patch deleted file mode 100644 index 407537f3b4..0000000000 --- a/target/linux/bcm53xx/patches-4.4/049-v4.15-0004-ARM-dts-BCM53573-Add-DT-for-Luxul-XAP-810.patch +++ /dev/null @@ -1,120 +0,0 @@ -From 0aa052ce1c3340850a7e5980b6d24b3ea5779591 Mon Sep 17 00:00:00 2001 -From: Dan Haab <dhaab@luxul.com> -Date: Mon, 9 Oct 2017 09:46:59 -0600 -Subject: [PATCH] ARM: dts: BCM53573: Add DT for Luxul XAP-810 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This is BCM53573 WiSoC based access point with an extra BCM43217 chipset -used for 2.4 GHz. - -Signed-off-by: Dan Haab <dhaab@luxul.com> -Acked-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/Makefile | 1 + - arch/arm/boot/dts/bcm47189-luxul-xap-810.dts | 87 ++++++++++++++++++++++++++++ - 2 files changed, 88 insertions(+) - create mode 100644 arch/arm/boot/dts/bcm47189-luxul-xap-810.dts - ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -95,6 +95,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \ - bcm953012hr.dtb \ - bcm953012k.dtb - dtb-$(CONFIG_ARCH_BCM_53573) += \ -+ bcm47189-luxul-xap-810.dtb \ - bcm47189-tenda-ac9.dtb \ - bcm947189acdbmr.dtb - dtb-$(CONFIG_ARCH_BCM_63XX) += \ ---- /dev/null -+++ b/arch/arm/boot/dts/bcm47189-luxul-xap-810.dts -@@ -0,0 +1,87 @@ -+/* -+ * Copyright 2017 Luxul Inc. -+ * -+ * Licensed under the ISC license. -+ */ -+ -+/dts-v1/; -+ -+#include "bcm53573.dtsi" -+ -+/ { -+ compatible = "luxul,xap-810-v1", "brcm,bcm47189", "brcm,bcm53573"; -+ model = "Luxul XAP-810 V1"; -+ -+ chosen { -+ bootargs = "earlycon"; -+ }; -+ -+ memory { -+ reg = <0x00000000 0x08000000>; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ -+ 5ghz { -+ label = "bcm53xx:blue:5ghz"; -+ gpios = <&chipcommon 11 GPIO_ACTIVE_HIGH>; -+ linux,default-trigger = "default-off"; -+ }; -+ -+ system { -+ label = "bcm53xx:green:system"; -+ gpios = <&chipcommon 15 GPIO_ACTIVE_HIGH>; -+ linux,default-trigger = "timer"; -+ }; -+ }; -+ -+ pcie0_leds { -+ compatible = "gpio-leds"; -+ -+ 2ghz { -+ label = "bcm53xx:blue:2ghz"; -+ gpios = <&pcie0_chipcommon 3 GPIO_ACTIVE_HIGH>; -+ linux,default-trigger = "default-off"; -+ }; -+ }; -+ -+ gpio-keys { -+ compatible = "gpio-keys"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ restart { -+ label = "Reset"; -+ linux,code = <KEY_RESTART>; -+ gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>; -+ }; -+ }; -+}; -+ -+&pcie0 { -+ ranges = <0x00000000 0 0 0 0 0x00100000>; -+ #address-cells = <3>; -+ #size-cells = <2>; -+ -+ bridge@0,0,0 { -+ reg = <0x0000 0 0 0 0>; -+ ranges = <0x00000000 0 0 0 0 0 0 0x00100000>; -+ #address-cells = <3>; -+ #size-cells = <2>; -+ -+ wifi@0,1,0 { -+ reg = <0x0000 0 0 0 0>; -+ ranges = <0x00000000 0 0 0 0x00100000>; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ pcie0_chipcommon: chipcommon@0 { -+ reg = <0 0x1000>; -+ -+ gpio-controller; -+ #gpio-cells = <2>; -+ }; -+ }; -+ }; -+}; diff --git a/target/linux/bcm53xx/patches-4.4/049-v4.15-0005-ARM-dts-BCM53573-Add-DT-for-Luxul-XAP-1440.patch b/target/linux/bcm53xx/patches-4.4/049-v4.15-0005-ARM-dts-BCM53573-Add-DT-for-Luxul-XAP-1440.patch deleted file mode 100644 index 51b3dc7903..0000000000 --- a/target/linux/bcm53xx/patches-4.4/049-v4.15-0005-ARM-dts-BCM53573-Add-DT-for-Luxul-XAP-1440.patch +++ /dev/null @@ -1,83 +0,0 @@ -From 7030ea600d560026b91726f2eb79c856b813afa9 Mon Sep 17 00:00:00 2001 -From: Dan Haab <dhaab@luxul.com> -Date: Mon, 9 Oct 2017 09:47:00 -0600 -Subject: [PATCH] ARM: dts: BCM53573: Add DT for Luxul XAP-1440 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This is BCM53573 WiSoC based outdoor access point with an extra BCM43217 -chipset used for 2.4 GHz. - -Signed-off-by: Dan Haab <dhaab@luxul.com> -Acked-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm/boot/dts/Makefile | 1 + - arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts | 50 +++++++++++++++++++++++++++ - 2 files changed, 51 insertions(+) - create mode 100644 arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts - ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -95,6 +95,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \ - bcm953012hr.dtb \ - bcm953012k.dtb - dtb-$(CONFIG_ARCH_BCM_53573) += \ -+ bcm47189-luxul-xap-1440.dtb \ - bcm47189-luxul-xap-810.dtb \ - bcm47189-tenda-ac9.dtb \ - bcm947189acdbmr.dtb ---- /dev/null -+++ b/arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts -@@ -0,0 +1,50 @@ -+/* -+ * Copyright 2017 Luxul Inc. -+ * -+ * Licensed under the ISC license. -+ */ -+ -+/dts-v1/; -+ -+#include "bcm53573.dtsi" -+ -+/ { -+ compatible = "luxul,xap-1440-v1", "brcm,bcm47189", "brcm,bcm53573"; -+ model = "Luxul XAP-1440 V1"; -+ -+ chosen { -+ bootargs = "earlycon"; -+ }; -+ -+ memory { -+ reg = <0x00000000 0x08000000>; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ -+ wlan { -+ label = "bcm53xx:blue:wlan"; -+ gpios = <&chipcommon 10 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "default-off"; -+ }; -+ -+ system { -+ label = "bcm53xx:green:system"; -+ gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "timer"; -+ }; -+ }; -+ -+ gpio-keys { -+ compatible = "gpio-keys"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ restart { -+ label = "Reset"; -+ linux,code = <KEY_RESTART>; -+ gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>; -+ }; -+ }; -+}; diff --git a/target/linux/bcm53xx/patches-4.4/070-0001-phy-bcm-ns-usb2-new-driver-for-USB-2.0-PHY-on-Norths.patch b/target/linux/bcm53xx/patches-4.4/070-0001-phy-bcm-ns-usb2-new-driver-for-USB-2.0-PHY-on-Norths.patch deleted file mode 100644 index c12cdb1861..0000000000 --- a/target/linux/bcm53xx/patches-4.4/070-0001-phy-bcm-ns-usb2-new-driver-for-USB-2.0-PHY-on-Norths.patch +++ /dev/null @@ -1,252 +0,0 @@ -From d3feb406733544dbf0e239ef945a09decdceac88 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com> -Date: Thu, 14 Apr 2016 11:37:43 +0200 -Subject: [PATCH] phy: bcm-ns-usb2: new driver for USB 2.0 PHY on Northstar -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Northstar is a family of SoCs used in home routers. They have USB 2.0 -and 3.0 controllers with PHYs that need to be properly initialized. -This driver provides PHY init support in a generic way and can be bound -with an EHCI controller driver. -There are (just a few) registers being defined in bcma header. It's -because DMU/CRU registers will be also needed in other drivers. We will -need them e.g. in PCIe controller/PHY driver and at some point probably -in clock driver for BCM53573 chipset. By using include/linux/bcma/ we -avoid code duplication. - -Signed-off-by: Rafał Miłecki <zajec5@gmail.com> -Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> ---- - .../devicetree/bindings/phy/bcm-ns-usb2-phy.txt | 21 ++++ - drivers/phy/Kconfig | 9 ++ - drivers/phy/Makefile | 1 + - drivers/phy/phy-bcm-ns-usb2.c | 137 +++++++++++++++++++++ - include/linux/bcma/bcma.h | 1 + - include/linux/bcma/bcma_driver_arm_c9.h | 15 +++ - 6 files changed, 184 insertions(+) - create mode 100644 Documentation/devicetree/bindings/phy/bcm-ns-usb2-phy.txt - create mode 100644 drivers/phy/phy-bcm-ns-usb2.c - create mode 100644 include/linux/bcma/bcma_driver_arm_c9.h - ---- /dev/null -+++ b/Documentation/devicetree/bindings/phy/bcm-ns-usb2-phy.txt -@@ -0,0 +1,21 @@ -+Driver for Broadcom Northstar USB 2.0 PHY -+ -+Required properties: -+- compatible: brcm,ns-usb2-phy -+- reg: iomem address range of DMU (Device Management Unit) -+- reg-names: "dmu", the only needed & supported reg right now -+- clocks: USB PHY reference clock -+- clock-names: "phy-ref-clk", the only needed & supported clock right now -+ -+To initialize USB 2.0 PHY driver needs to setup PLL correctly. To do this it -+requires passing phandle to the USB PHY reference clock. -+ -+Example: -+ usb2-phy { -+ compatible = "brcm,ns-usb2-phy"; -+ reg = <0x1800c000 0x1000>; -+ reg-names = "dmu"; -+ #phy-cells = <0>; -+ clocks = <&genpll BCM_NSP_GENPLL_USB_PHY_REF_CLK>; -+ clock-names = "phy-ref-clk"; -+ }; ---- a/drivers/phy/Kconfig -+++ b/drivers/phy/Kconfig -@@ -15,6 +15,15 @@ config GENERIC_PHY - phy users can obtain reference to the PHY. All the users of this - framework should select this config. - -+config PHY_BCM_NS_USB2 -+ tristate "Broadcom Northstar USB 2.0 PHY Driver" -+ depends on ARCH_BCM_IPROC || COMPILE_TEST -+ depends on HAS_IOMEM && OF -+ select GENERIC_PHY -+ help -+ Enable this to support Broadcom USB 2.0 PHY connected to the USB -+ controller on Northstar family. -+ - config PHY_BERLIN_USB - tristate "Marvell Berlin USB PHY Driver" - depends on ARCH_BERLIN && RESET_CONTROLLER && HAS_IOMEM && OF ---- a/drivers/phy/Makefile -+++ b/drivers/phy/Makefile -@@ -3,6 +3,7 @@ - # - - obj-$(CONFIG_GENERIC_PHY) += phy-core.o -+obj-$(CONFIG_PHY_BCM_NS_USB2) += phy-bcm-ns-usb2.o - obj-$(CONFIG_PHY_BERLIN_USB) += phy-berlin-usb.o - obj-$(CONFIG_PHY_BERLIN_SATA) += phy-berlin-sata.o - obj-$(CONFIG_PHY_DM816X_USB) += phy-dm816x-usb.o ---- /dev/null -+++ b/drivers/phy/phy-bcm-ns-usb2.c -@@ -0,0 +1,137 @@ -+/* -+ * Broadcom Northstar USB 2.0 PHY Driver -+ * -+ * Copyright (C) 2016 Rafał Miłecki <zajec5@gmail.com> -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ */ -+ -+#include <linux/bcma/bcma.h> -+#include <linux/clk.h> -+#include <linux/delay.h> -+#include <linux/err.h> -+#include <linux/module.h> -+#include <linux/of_address.h> -+#include <linux/of_platform.h> -+#include <linux/phy/phy.h> -+#include <linux/platform_device.h> -+#include <linux/slab.h> -+ -+struct bcm_ns_usb2 { -+ struct device *dev; -+ struct clk *ref_clk; -+ struct phy *phy; -+ void __iomem *dmu; -+}; -+ -+static int bcm_ns_usb2_phy_init(struct phy *phy) -+{ -+ struct bcm_ns_usb2 *usb2 = phy_get_drvdata(phy); -+ struct device *dev = usb2->dev; -+ void __iomem *dmu = usb2->dmu; -+ u32 ref_clk_rate, usb2ctl, usb_pll_ndiv, usb_pll_pdiv; -+ int err = 0; -+ -+ err = clk_prepare_enable(usb2->ref_clk); -+ if (err < 0) { -+ dev_err(dev, "Failed to prepare ref clock: %d\n", err); -+ goto err_out; -+ } -+ -+ ref_clk_rate = clk_get_rate(usb2->ref_clk); -+ if (!ref_clk_rate) { -+ dev_err(dev, "Failed to get ref clock rate\n"); -+ err = -EINVAL; -+ goto err_clk_off; -+ } -+ -+ usb2ctl = readl(dmu + BCMA_DMU_CRU_USB2_CONTROL); -+ -+ if (usb2ctl & BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_PDIV_MASK) { -+ usb_pll_pdiv = usb2ctl; -+ usb_pll_pdiv &= BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_PDIV_MASK; -+ usb_pll_pdiv >>= BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_PDIV_SHIFT; -+ } else { -+ usb_pll_pdiv = 1 << 3; -+ } -+ -+ /* Calculate ndiv based on a solid 1920 MHz that is for USB2 PHY */ -+ usb_pll_ndiv = (1920000000 * usb_pll_pdiv) / ref_clk_rate; -+ -+ /* Unlock DMU PLL settings with some magic value */ -+ writel(0x0000ea68, dmu + BCMA_DMU_CRU_CLKSET_KEY); -+ -+ /* Write USB 2.0 PLL control setting */ -+ usb2ctl &= ~BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_NDIV_MASK; -+ usb2ctl |= usb_pll_ndiv << BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_NDIV_SHIFT; -+ writel(usb2ctl, dmu + BCMA_DMU_CRU_USB2_CONTROL); -+ -+ /* Lock DMU PLL settings */ -+ writel(0x00000000, dmu + BCMA_DMU_CRU_CLKSET_KEY); -+ -+err_clk_off: -+ clk_disable_unprepare(usb2->ref_clk); -+err_out: -+ return err; -+} -+ -+static const struct phy_ops ops = { -+ .init = bcm_ns_usb2_phy_init, -+ .owner = THIS_MODULE, -+}; -+ -+static int bcm_ns_usb2_probe(struct platform_device *pdev) -+{ -+ struct device *dev = &pdev->dev; -+ struct bcm_ns_usb2 *usb2; -+ struct resource *res; -+ struct phy_provider *phy_provider; -+ -+ usb2 = devm_kzalloc(&pdev->dev, sizeof(*usb2), GFP_KERNEL); -+ if (!usb2) -+ return -ENOMEM; -+ usb2->dev = dev; -+ -+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dmu"); -+ usb2->dmu = devm_ioremap_resource(dev, res); -+ if (IS_ERR(usb2->dmu)) { -+ dev_err(dev, "Failed to map DMU regs\n"); -+ return PTR_ERR(usb2->dmu); -+ } -+ -+ usb2->ref_clk = devm_clk_get(dev, "phy-ref-clk"); -+ if (IS_ERR(usb2->ref_clk)) { -+ dev_err(dev, "Clock not defined\n"); -+ return PTR_ERR(usb2->ref_clk); -+ } -+ -+ usb2->phy = devm_phy_create(dev, NULL, &ops); -+ if (IS_ERR(dev)) -+ return PTR_ERR(dev); -+ -+ phy_set_drvdata(usb2->phy, usb2); -+ platform_set_drvdata(pdev, usb2); -+ -+ phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); -+ return PTR_ERR_OR_ZERO(phy_provider); -+} -+ -+static const struct of_device_id bcm_ns_usb2_id_table[] = { -+ { .compatible = "brcm,ns-usb2-phy", }, -+ {}, -+}; -+MODULE_DEVICE_TABLE(of, bcm_ns_usb2_id_table); -+ -+static struct platform_driver bcm_ns_usb2_driver = { -+ .probe = bcm_ns_usb2_probe, -+ .driver = { -+ .name = "bcm_ns_usb2", -+ .of_match_table = bcm_ns_usb2_id_table, -+ }, -+}; -+module_platform_driver(bcm_ns_usb2_driver); -+ -+MODULE_LICENSE("GPL v2"); ---- a/include/linux/bcma/bcma.h -+++ b/include/linux/bcma/bcma.h -@@ -4,6 +4,7 @@ - #include <linux/pci.h> - #include <linux/mod_devicetable.h> - -+#include <linux/bcma/bcma_driver_arm_c9.h> - #include <linux/bcma/bcma_driver_chipcommon.h> - #include <linux/bcma/bcma_driver_pci.h> - #include <linux/bcma/bcma_driver_pcie2.h> ---- /dev/null -+++ b/include/linux/bcma/bcma_driver_arm_c9.h -@@ -0,0 +1,15 @@ -+#ifndef LINUX_BCMA_DRIVER_ARM_C9_H_ -+#define LINUX_BCMA_DRIVER_ARM_C9_H_ -+ -+/* DMU (Device Management Unit) */ -+#define BCMA_DMU_CRU_USB2_CONTROL 0x0164 -+#define BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_NDIV_MASK 0x00000FFC -+#define BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_NDIV_SHIFT 2 -+#define BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_PDIV_MASK 0x00007000 -+#define BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_PDIV_SHIFT 12 -+#define BCMA_DMU_CRU_CLKSET_KEY 0x0180 -+#define BCMA_DMU_CRU_STRAPS_CTRL 0x02A0 -+#define BCMA_DMU_CRU_STRAPS_CTRL_USB3 0x00000010 -+#define BCMA_DMU_CRU_STRAPS_CTRL_4BYTE 0x00008000 -+ -+#endif /* LINUX_BCMA_DRIVER_ARM_C9_H_ */ diff --git a/target/linux/bcm53xx/patches-4.4/070-0002-phy-bcm-ns-usb2-checking-the-wrong-variable.patch b/target/linux/bcm53xx/patches-4.4/070-0002-phy-bcm-ns-usb2-checking-the-wrong-variable.patch deleted file mode 100644 index ae3462f43e..0000000000 --- a/target/linux/bcm53xx/patches-4.4/070-0002-phy-bcm-ns-usb2-checking-the-wrong-variable.patch +++ /dev/null @@ -1,27 +0,0 @@ -From 6c081ff6fd5abd621797570be43d5e3c6acfcd58 Mon Sep 17 00:00:00 2001 -From: Dan Carpenter <dan.carpenter@oracle.com> -Date: Tue, 10 May 2016 11:01:33 +0300 -Subject: [PATCH] phy: bcm-ns-usb2: checking the wrong variable - -We intended to test "usb2->phy" here instead of "dev". - -Fixes: d3feb4067335 ('phy: bcm-ns-usb2: new driver for USB 2.0 PHY on Northstar') -Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> -Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> ---- - drivers/phy/phy-bcm-ns-usb2.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - ---- a/drivers/phy/phy-bcm-ns-usb2.c -+++ b/drivers/phy/phy-bcm-ns-usb2.c -@@ -109,8 +109,8 @@ static int bcm_ns_usb2_probe(struct plat - } - - usb2->phy = devm_phy_create(dev, NULL, &ops); -- if (IS_ERR(dev)) -- return PTR_ERR(dev); -+ if (IS_ERR(usb2->phy)) -+ return PTR_ERR(usb2->phy); - - phy_set_drvdata(usb2->phy, usb2); - platform_set_drvdata(pdev, usb2); diff --git a/target/linux/bcm53xx/patches-4.4/071-0001-phy-bcm-ns-usb3-new-driver-for-USB-3.0-PHY-on-Norths.patch b/target/linux/bcm53xx/patches-4.4/071-0001-phy-bcm-ns-usb3-new-driver-for-USB-3.0-PHY-on-Norths.patch deleted file mode 100644 index ad34fc8484..0000000000 --- a/target/linux/bcm53xx/patches-4.4/071-0001-phy-bcm-ns-usb3-new-driver-for-USB-3.0-PHY-on-Norths.patch +++ /dev/null @@ -1,361 +0,0 @@ -From b8d7478ecfec51b3430f677da44e662d5ff12444 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Fri, 12 Aug 2016 00:28:03 +0200 -Subject: [PATCH] phy: bcm-ns-usb3: new driver for USB 3.0 PHY on Northstar -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Northstar is a family of SoCs used in home routers. They have USB 2.0 -and 3.0 controllers with PHYs that need to be properly initialized. -This driver provides PHY init support in a generic way and can be bound -with XHCI controller driver. - -There aren't any public datasheets from Broadcom so we can't have nice -defines for all used bits. It means we just follow Broadcom's -initialization procedure using their magic values. We were quite lucky -actually that Broadcom put some comments in their SDK reference code -explaining what given writes are responsible for. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> ---- - .../devicetree/bindings/phy/bcm-ns-usb3-phy.txt | 23 ++ - drivers/phy/Kconfig | 9 + - drivers/phy/Makefile | 1 + - drivers/phy/phy-bcm-ns-usb3.c | 274 +++++++++++++++++++++ - 4 files changed, 307 insertions(+) - create mode 100644 Documentation/devicetree/bindings/phy/bcm-ns-usb3-phy.txt - create mode 100644 drivers/phy/phy-bcm-ns-usb3.c - ---- /dev/null -+++ b/Documentation/devicetree/bindings/phy/bcm-ns-usb3-phy.txt -@@ -0,0 +1,23 @@ -+Driver for Broadcom Northstar USB 3.0 PHY -+ -+Required properties: -+ -+- compatible: one of: "brcm,ns-ax-usb3-phy", "brcm,ns-bx-usb3-phy". -+- reg: register mappings for DMP (Device Management Plugin) and ChipCommon B -+ MMI. -+- reg-names: "dmp" and "ccb-mii" -+ -+Initialization of USB 3.0 PHY depends on Northstar version. There are currently -+three known series: Ax, Bx and Cx. -+Known A0: BCM4707 rev 0 -+Known B0: BCM4707 rev 4, BCM53573 rev 2 -+Known B1: BCM4707 rev 6 -+Known C0: BCM47094 rev 0 -+ -+Example: -+ usb3-phy { -+ compatible = "brcm,ns-ax-usb3-phy"; -+ reg = <0x18105000 0x1000>, <0x18003000 0x1000>; -+ reg-names = "dmp", "ccb-mii"; -+ #phy-cells = <0>; -+ }; ---- a/drivers/phy/Kconfig -+++ b/drivers/phy/Kconfig -@@ -24,6 +24,15 @@ config PHY_BCM_NS_USB2 - Enable this to support Broadcom USB 2.0 PHY connected to the USB - controller on Northstar family. - -+config PHY_BCM_NS_USB3 -+ tristate "Broadcom Northstar USB 3.0 PHY Driver" -+ depends on ARCH_BCM_IPROC || COMPILE_TEST -+ depends on HAS_IOMEM && OF -+ select GENERIC_PHY -+ help -+ Enable this to support Broadcom USB 3.0 PHY connected to the USB -+ controller on Northstar family. -+ - config PHY_BERLIN_USB - tristate "Marvell Berlin USB PHY Driver" - depends on ARCH_BERLIN && RESET_CONTROLLER && HAS_IOMEM && OF ---- a/drivers/phy/Makefile -+++ b/drivers/phy/Makefile -@@ -4,6 +4,7 @@ - - obj-$(CONFIG_GENERIC_PHY) += phy-core.o - obj-$(CONFIG_PHY_BCM_NS_USB2) += phy-bcm-ns-usb2.o -+obj-$(CONFIG_PHY_BCM_NS_USB3) += phy-bcm-ns-usb3.o - obj-$(CONFIG_PHY_BERLIN_USB) += phy-berlin-usb.o - obj-$(CONFIG_PHY_BERLIN_SATA) += phy-berlin-sata.o - obj-$(CONFIG_PHY_DM816X_USB) += phy-dm816x-usb.o ---- /dev/null -+++ b/drivers/phy/phy-bcm-ns-usb3.c -@@ -0,0 +1,274 @@ -+/* -+ * Broadcom Northstar USB 3.0 PHY Driver -+ * -+ * Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl> -+ * -+ * All magic values used for initialization (and related comments) were obtained -+ * from Broadcom's SDK: -+ * Copyright (c) Broadcom Corp, 2012 -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include <linux/bcma/bcma.h> -+#include <linux/delay.h> -+#include <linux/err.h> -+#include <linux/module.h> -+#include <linux/of_platform.h> -+#include <linux/platform_device.h> -+#include <linux/phy/phy.h> -+#include <linux/slab.h> -+ -+#define BCM_NS_USB3_MII_MNG_TIMEOUT_US 1000 /* usecs */ -+ -+enum bcm_ns_family { -+ BCM_NS_UNKNOWN, -+ BCM_NS_AX, -+ BCM_NS_BX, -+}; -+ -+struct bcm_ns_usb3 { -+ struct device *dev; -+ enum bcm_ns_family family; -+ void __iomem *dmp; -+ void __iomem *ccb_mii; -+ struct phy *phy; -+}; -+ -+static const struct of_device_id bcm_ns_usb3_id_table[] = { -+ { -+ .compatible = "brcm,ns-ax-usb3-phy", -+ .data = (int *)BCM_NS_AX, -+ }, -+ { -+ .compatible = "brcm,ns-bx-usb3-phy", -+ .data = (int *)BCM_NS_BX, -+ }, -+ {}, -+}; -+MODULE_DEVICE_TABLE(of, bcm_ns_usb3_id_table); -+ -+static int bcm_ns_usb3_wait_reg(struct bcm_ns_usb3 *usb3, void __iomem *addr, -+ u32 mask, u32 value, unsigned long timeout) -+{ -+ unsigned long deadline = jiffies + timeout; -+ u32 val; -+ -+ do { -+ val = readl(addr); -+ if ((val & mask) == value) -+ return 0; -+ cpu_relax(); -+ udelay(10); -+ } while (!time_after_eq(jiffies, deadline)); -+ -+ dev_err(usb3->dev, "Timeout waiting for register %p\n", addr); -+ -+ return -EBUSY; -+} -+ -+static inline int bcm_ns_usb3_mii_mng_wait_idle(struct bcm_ns_usb3 *usb3) -+{ -+ return bcm_ns_usb3_wait_reg(usb3, usb3->ccb_mii + BCMA_CCB_MII_MNG_CTL, -+ 0x0100, 0x0000, -+ usecs_to_jiffies(BCM_NS_USB3_MII_MNG_TIMEOUT_US)); -+} -+ -+static int bcm_ns_usb3_mii_mng_write32(struct bcm_ns_usb3 *usb3, u32 value) -+{ -+ int err; -+ -+ err = bcm_ns_usb3_mii_mng_wait_idle(usb3); -+ if (err < 0) { -+ dev_err(usb3->dev, "Couldn't write 0x%08x value\n", value); -+ return err; -+ } -+ -+ writel(value, usb3->ccb_mii + BCMA_CCB_MII_MNG_CMD_DATA); -+ -+ return 0; -+} -+ -+static int bcm_ns_usb3_phy_init_ns_bx(struct bcm_ns_usb3 *usb3) -+{ -+ int err; -+ -+ /* Enable MDIO. Setting MDCDIV as 26 */ -+ writel(0x0000009a, usb3->ccb_mii + BCMA_CCB_MII_MNG_CTL); -+ -+ /* Wait for MDIO? */ -+ udelay(2); -+ -+ /* USB3 PLL Block */ -+ err = bcm_ns_usb3_mii_mng_write32(usb3, 0x587e8000); -+ if (err < 0) -+ return err; -+ -+ /* Assert Ana_Pllseq start */ -+ bcm_ns_usb3_mii_mng_write32(usb3, 0x58061000); -+ -+ /* Assert CML Divider ratio to 26 */ -+ bcm_ns_usb3_mii_mng_write32(usb3, 0x582a6400); -+ -+ /* Asserting PLL Reset */ -+ bcm_ns_usb3_mii_mng_write32(usb3, 0x582ec000); -+ -+ /* Deaaserting PLL Reset */ -+ bcm_ns_usb3_mii_mng_write32(usb3, 0x582e8000); -+ -+ /* Waiting MII Mgt interface idle */ -+ bcm_ns_usb3_mii_mng_wait_idle(usb3); -+ -+ /* Deasserting USB3 system reset */ -+ writel(0, usb3->dmp + BCMA_RESET_CTL); -+ -+ /* PLL frequency monitor enable */ -+ bcm_ns_usb3_mii_mng_write32(usb3, 0x58069000); -+ -+ /* PIPE Block */ -+ bcm_ns_usb3_mii_mng_write32(usb3, 0x587e8060); -+ -+ /* CMPMAX & CMPMINTH setting */ -+ bcm_ns_usb3_mii_mng_write32(usb3, 0x580af30d); -+ -+ /* DEGLITCH MIN & MAX setting */ -+ bcm_ns_usb3_mii_mng_write32(usb3, 0x580e6302); -+ -+ /* TXPMD block */ -+ bcm_ns_usb3_mii_mng_write32(usb3, 0x587e8040); -+ -+ /* Enabling SSC */ -+ bcm_ns_usb3_mii_mng_write32(usb3, 0x58061003); -+ -+ /* Waiting MII Mgt interface idle */ -+ bcm_ns_usb3_mii_mng_wait_idle(usb3); -+ -+ return 0; -+} -+ -+static int bcm_ns_usb3_phy_init_ns_ax(struct bcm_ns_usb3 *usb3) -+{ -+ int err; -+ -+ /* Enable MDIO. Setting MDCDIV as 26 */ -+ writel(0x0000009a, usb3->ccb_mii + BCMA_CCB_MII_MNG_CTL); -+ -+ /* Wait for MDIO? */ -+ udelay(2); -+ -+ /* PLL30 block */ -+ err = bcm_ns_usb3_mii_mng_write32(usb3, 0x587e8000); -+ if (err < 0) -+ return err; -+ -+ bcm_ns_usb3_mii_mng_write32(usb3, 0x582a6400); -+ -+ bcm_ns_usb3_mii_mng_write32(usb3, 0x587e80e0); -+ -+ bcm_ns_usb3_mii_mng_write32(usb3, 0x580a009c); -+ -+ /* Enable SSC */ -+ bcm_ns_usb3_mii_mng_write32(usb3, 0x587e8040); -+ -+ bcm_ns_usb3_mii_mng_write32(usb3, 0x580a21d3); -+ -+ bcm_ns_usb3_mii_mng_write32(usb3, 0x58061003); -+ -+ /* Waiting MII Mgt interface idle */ -+ bcm_ns_usb3_mii_mng_wait_idle(usb3); -+ -+ /* Deasserting USB3 system reset */ -+ writel(0, usb3->dmp + BCMA_RESET_CTL); -+ -+ return 0; -+} -+ -+static int bcm_ns_usb3_phy_init(struct phy *phy) -+{ -+ struct bcm_ns_usb3 *usb3 = phy_get_drvdata(phy); -+ int err; -+ -+ /* Perform USB3 system soft reset */ -+ writel(BCMA_RESET_CTL_RESET, usb3->dmp + BCMA_RESET_CTL); -+ -+ switch (usb3->family) { -+ case BCM_NS_AX: -+ err = bcm_ns_usb3_phy_init_ns_ax(usb3); -+ break; -+ case BCM_NS_BX: -+ err = bcm_ns_usb3_phy_init_ns_bx(usb3); -+ break; -+ default: -+ WARN_ON(1); -+ err = -ENOTSUPP; -+ } -+ -+ return err; -+} -+ -+static const struct phy_ops ops = { -+ .init = bcm_ns_usb3_phy_init, -+ .owner = THIS_MODULE, -+}; -+ -+static int bcm_ns_usb3_probe(struct platform_device *pdev) -+{ -+ struct device *dev = &pdev->dev; -+ const struct of_device_id *of_id; -+ struct bcm_ns_usb3 *usb3; -+ struct resource *res; -+ struct phy_provider *phy_provider; -+ -+ usb3 = devm_kzalloc(dev, sizeof(*usb3), GFP_KERNEL); -+ if (!usb3) -+ return -ENOMEM; -+ -+ usb3->dev = dev; -+ -+ of_id = of_match_device(bcm_ns_usb3_id_table, dev); -+ if (!of_id) -+ return -EINVAL; -+ usb3->family = (enum bcm_ns_family)of_id->data; -+ -+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dmp"); -+ usb3->dmp = devm_ioremap_resource(dev, res); -+ if (IS_ERR(usb3->dmp)) { -+ dev_err(dev, "Failed to map DMP regs\n"); -+ return PTR_ERR(usb3->dmp); -+ } -+ -+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ccb-mii"); -+ usb3->ccb_mii = devm_ioremap_resource(dev, res); -+ if (IS_ERR(usb3->ccb_mii)) { -+ dev_err(dev, "Failed to map ChipCommon B MII regs\n"); -+ return PTR_ERR(usb3->ccb_mii); -+ } -+ -+ usb3->phy = devm_phy_create(dev, NULL, &ops); -+ if (IS_ERR(usb3->phy)) { -+ dev_err(dev, "Failed to create PHY\n"); -+ return PTR_ERR(usb3->phy); -+ } -+ -+ phy_set_drvdata(usb3->phy, usb3); -+ platform_set_drvdata(pdev, usb3); -+ -+ phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); -+ if (!IS_ERR(phy_provider)) -+ dev_info(dev, "Registered Broadcom Northstar USB 3.0 PHY driver\n"); -+ -+ return PTR_ERR_OR_ZERO(phy_provider); -+} -+ -+static struct platform_driver bcm_ns_usb3_driver = { -+ .probe = bcm_ns_usb3_probe, -+ .driver = { -+ .name = "bcm_ns_usb3", -+ .of_match_table = bcm_ns_usb3_id_table, -+ }, -+}; -+module_platform_driver(bcm_ns_usb3_driver); -+ -+MODULE_LICENSE("GPL v2"); diff --git a/target/linux/bcm53xx/patches-4.4/071-0002-phy-bcm-ns-usb3-split-all-writes-into-reg-val-pairs.patch b/target/linux/bcm53xx/patches-4.4/071-0002-phy-bcm-ns-usb3-split-all-writes-into-reg-val-pairs.patch deleted file mode 100644 index ddbec25863..0000000000 --- a/target/linux/bcm53xx/patches-4.4/071-0002-phy-bcm-ns-usb3-split-all-writes-into-reg-val-pairs.patch +++ /dev/null @@ -1,177 +0,0 @@ -From fff3364a637796611c06f59a6f2be61685d99bfe Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Sun, 2 Apr 2017 18:55:22 +0200 -Subject: [PATCH] phy: bcm-ns-usb3: split all writes into reg & val pairs -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -So far all the PHY initialization was implemented using some totally -magic values. There was some pattern there but it wasn't clear what is -it about. - -Thanks to the patch submitted by Broadcom: -[PATCH 5/6] phy: Add USB3 PHY support for Broadcom NSP SoC -and the upstream "iproc-mdio" driver we now know there is a MDIO bus -underneath with PHY(s) and their registers. - -It allows us to clean the driver a bit by making all these values less -magical. The next step is switching to using a proper MDIO layer. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Acked-by: Jon Mason <jon.mason@broadcom.com> -Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> ---- - drivers/phy/phy-bcm-ns-usb3.c | 69 ++++++++++++++++++++++++++++++------------- - 1 file changed, 49 insertions(+), 20 deletions(-) - ---- a/drivers/phy/phy-bcm-ns-usb3.c -+++ b/drivers/phy/phy-bcm-ns-usb3.c -@@ -2,6 +2,7 @@ - * Broadcom Northstar USB 3.0 PHY Driver - * - * Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl> -+ * Copyright (C) 2016 Broadcom - * - * All magic values used for initialization (and related comments) were obtained - * from Broadcom's SDK: -@@ -23,6 +24,23 @@ - - #define BCM_NS_USB3_MII_MNG_TIMEOUT_US 1000 /* usecs */ - -+#define BCM_NS_USB3_PHY_BASE_ADDR_REG 0x1f -+#define BCM_NS_USB3_PHY_PLL30_BLOCK 0x8000 -+#define BCM_NS_USB3_PHY_TX_PMD_BLOCK 0x8040 -+#define BCM_NS_USB3_PHY_PIPE_BLOCK 0x8060 -+ -+/* Registers of PLL30 block */ -+#define BCM_NS_USB3_PLL_CONTROL 0x01 -+#define BCM_NS_USB3_PLLA_CONTROL0 0x0a -+#define BCM_NS_USB3_PLLA_CONTROL1 0x0b -+ -+/* Registers of TX PMD block */ -+#define BCM_NS_USB3_TX_PMD_CONTROL1 0x01 -+ -+/* Registers of PIPE block */ -+#define BCM_NS_USB3_LFPS_CMP 0x02 -+#define BCM_NS_USB3_LFPS_DEGLITCH 0x03 -+ - enum bcm_ns_family { - BCM_NS_UNKNOWN, - BCM_NS_AX, -@@ -76,8 +94,10 @@ static inline int bcm_ns_usb3_mii_mng_wa - usecs_to_jiffies(BCM_NS_USB3_MII_MNG_TIMEOUT_US)); - } - --static int bcm_ns_usb3_mii_mng_write32(struct bcm_ns_usb3 *usb3, u32 value) -+static int bcm_ns_usb3_mdio_phy_write(struct bcm_ns_usb3 *usb3, u16 reg, -+ u16 value) - { -+ u32 tmp = 0; - int err; - - err = bcm_ns_usb3_mii_mng_wait_idle(usb3); -@@ -86,7 +106,11 @@ static int bcm_ns_usb3_mii_mng_write32(s - return err; - } - -- writel(value, usb3->ccb_mii + BCMA_CCB_MII_MNG_CMD_DATA); -+ /* TODO: Use a proper MDIO bus layer */ -+ tmp |= 0x58020000; /* Magic value for MDIO PHY write */ -+ tmp |= reg << 18; -+ tmp |= value; -+ writel(tmp, usb3->ccb_mii + BCMA_CCB_MII_MNG_CMD_DATA); - - return 0; - } -@@ -102,21 +126,22 @@ static int bcm_ns_usb3_phy_init_ns_bx(st - udelay(2); - - /* USB3 PLL Block */ -- err = bcm_ns_usb3_mii_mng_write32(usb3, 0x587e8000); -+ err = bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PHY_BASE_ADDR_REG, -+ BCM_NS_USB3_PHY_PLL30_BLOCK); - if (err < 0) - return err; - - /* Assert Ana_Pllseq start */ -- bcm_ns_usb3_mii_mng_write32(usb3, 0x58061000); -+ bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PLL_CONTROL, 0x1000); - - /* Assert CML Divider ratio to 26 */ -- bcm_ns_usb3_mii_mng_write32(usb3, 0x582a6400); -+ bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PLLA_CONTROL0, 0x6400); - - /* Asserting PLL Reset */ -- bcm_ns_usb3_mii_mng_write32(usb3, 0x582ec000); -+ bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PLLA_CONTROL1, 0xc000); - - /* Deaaserting PLL Reset */ -- bcm_ns_usb3_mii_mng_write32(usb3, 0x582e8000); -+ bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PLLA_CONTROL1, 0x8000); - - /* Waiting MII Mgt interface idle */ - bcm_ns_usb3_mii_mng_wait_idle(usb3); -@@ -125,22 +150,24 @@ static int bcm_ns_usb3_phy_init_ns_bx(st - writel(0, usb3->dmp + BCMA_RESET_CTL); - - /* PLL frequency monitor enable */ -- bcm_ns_usb3_mii_mng_write32(usb3, 0x58069000); -+ bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PLL_CONTROL, 0x9000); - - /* PIPE Block */ -- bcm_ns_usb3_mii_mng_write32(usb3, 0x587e8060); -+ bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PHY_BASE_ADDR_REG, -+ BCM_NS_USB3_PHY_PIPE_BLOCK); - - /* CMPMAX & CMPMINTH setting */ -- bcm_ns_usb3_mii_mng_write32(usb3, 0x580af30d); -+ bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_LFPS_CMP, 0xf30d); - - /* DEGLITCH MIN & MAX setting */ -- bcm_ns_usb3_mii_mng_write32(usb3, 0x580e6302); -+ bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_LFPS_DEGLITCH, 0x6302); - - /* TXPMD block */ -- bcm_ns_usb3_mii_mng_write32(usb3, 0x587e8040); -+ bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PHY_BASE_ADDR_REG, -+ BCM_NS_USB3_PHY_TX_PMD_BLOCK); - - /* Enabling SSC */ -- bcm_ns_usb3_mii_mng_write32(usb3, 0x58061003); -+ bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_TX_PMD_CONTROL1, 0x1003); - - /* Waiting MII Mgt interface idle */ - bcm_ns_usb3_mii_mng_wait_idle(usb3); -@@ -159,22 +186,24 @@ static int bcm_ns_usb3_phy_init_ns_ax(st - udelay(2); - - /* PLL30 block */ -- err = bcm_ns_usb3_mii_mng_write32(usb3, 0x587e8000); -+ err = bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PHY_BASE_ADDR_REG, -+ BCM_NS_USB3_PHY_PLL30_BLOCK); - if (err < 0) - return err; - -- bcm_ns_usb3_mii_mng_write32(usb3, 0x582a6400); -+ bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PLLA_CONTROL0, 0x6400); - -- bcm_ns_usb3_mii_mng_write32(usb3, 0x587e80e0); -+ bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PHY_BASE_ADDR_REG, 0x80e0); - -- bcm_ns_usb3_mii_mng_write32(usb3, 0x580a009c); -+ bcm_ns_usb3_mdio_phy_write(usb3, 0x02, 0x009c); - - /* Enable SSC */ -- bcm_ns_usb3_mii_mng_write32(usb3, 0x587e8040); -+ bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PHY_BASE_ADDR_REG, -+ BCM_NS_USB3_PHY_TX_PMD_BLOCK); - -- bcm_ns_usb3_mii_mng_write32(usb3, 0x580a21d3); -+ bcm_ns_usb3_mdio_phy_write(usb3, 0x02, 0x21d3); - -- bcm_ns_usb3_mii_mng_write32(usb3, 0x58061003); -+ bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_TX_PMD_CONTROL1, 0x1003); - - /* Waiting MII Mgt interface idle */ - bcm_ns_usb3_mii_mng_wait_idle(usb3); diff --git a/target/linux/bcm53xx/patches-4.4/080-USB-bcma-switch-to-GPIO-descriptor-for-power-control.patch b/target/linux/bcm53xx/patches-4.4/080-USB-bcma-switch-to-GPIO-descriptor-for-power-control.patch deleted file mode 100644 index bc735a234e..0000000000 --- a/target/linux/bcm53xx/patches-4.4/080-USB-bcma-switch-to-GPIO-descriptor-for-power-control.patch +++ /dev/null @@ -1,75 +0,0 @@ -From 9faae5a37b266afca6914163316856c5ed4ec366 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com> -Date: Sun, 1 Nov 2015 10:04:41 +0100 -Subject: [PATCH] USB: bcma: switch to GPIO descriptor for power control -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -So far we were using simple (legacy) GPIO functions & some poor logic to -control power. It got many drawbacks: we were ignoring OF flags -(GPIO_ACTIVE_LOW), we were not setting direction to output and we were -assuming gpio_request success all the time. -Fix it by switching to gpiod functions and adding appropriate checks. - -Signed-off-by: Rafał Miłecki <zajec5@gmail.com> -Acked-by: Hauke Mehrtens <hauke@hauke-m.de> -Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> ---- - drivers/usb/host/bcma-hcd.c | 21 ++++++++++----------- - 1 file changed, 10 insertions(+), 11 deletions(-) - ---- a/drivers/usb/host/bcma-hcd.c -+++ b/drivers/usb/host/bcma-hcd.c -@@ -21,6 +21,7 @@ - */ - #include <linux/bcma/bcma.h> - #include <linux/delay.h> -+#include <linux/gpio/consumer.h> - #include <linux/platform_device.h> - #include <linux/module.h> - #include <linux/slab.h> -@@ -36,6 +37,7 @@ MODULE_LICENSE("GPL"); - struct bcma_hcd_device { - struct platform_device *ehci_dev; - struct platform_device *ohci_dev; -+ struct gpio_desc *gpio_desc; - }; - - /* Wait for bitmask in a register to get set or cleared. -@@ -228,19 +230,12 @@ static void bcma_hcd_init_chip_arm(struc - - static void bcma_hci_platform_power_gpio(struct bcma_device *dev, bool val) - { -- int gpio; -+ struct bcma_hcd_device *usb_dev = bcma_get_drvdata(dev); - -- gpio = of_get_named_gpio(dev->dev.of_node, "vcc-gpio", 0); -- if (!gpio_is_valid(gpio)) -+ if (IS_ERR_OR_NULL(usb_dev->gpio_desc)) - return; - -- if (val) { -- gpio_request(gpio, "bcma-hcd-gpio"); -- gpio_set_value(gpio, 1); -- } else { -- gpio_set_value(gpio, 0); -- gpio_free(gpio); -- } -+ gpiod_set_value(usb_dev->gpio_desc, val); - } - - static const struct usb_ehci_pdata ehci_pdata = { -@@ -314,7 +309,11 @@ static int bcma_hcd_probe(struct bcma_de - if (!usb_dev) - return -ENOMEM; - -- bcma_hci_platform_power_gpio(dev, true); -+ if (dev->dev.of_node) -+ usb_dev->gpio_desc = devm_get_gpiod_from_child(&dev->dev, "vcc", -+ &dev->dev.of_node->fwnode); -+ if (!IS_ERR_OR_NULL(usb_dev->gpio_desc)) -+ gpiod_direction_output(usb_dev->gpio_desc, 1); - - switch (dev->id.id) { - case BCMA_CORE_NS_USB20: diff --git a/target/linux/bcm53xx/patches-4.4/081-0001-USB-bcma-make-helper-creating-platform-dev-more-gene.patch b/target/linux/bcm53xx/patches-4.4/081-0001-USB-bcma-make-helper-creating-platform-dev-more-gene.patch deleted file mode 100644 index 320b6dd31d..0000000000 --- a/target/linux/bcm53xx/patches-4.4/081-0001-USB-bcma-make-helper-creating-platform-dev-more-gene.patch +++ /dev/null @@ -1,77 +0,0 @@ -From 352d9e2ee85b43170388599a17cd7b219f270163 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com> -Date: Sat, 5 Dec 2015 13:15:06 +0100 -Subject: [PATCH] USB: bcma: make helper creating platform dev more generic -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Having "bool ohci" argument in bcma_hcd_create_pdev function limited it -to support two cases only (OHCI and EHCI) and put too much logic in it. -Lets make caller pass all required data. This adds few extra arguments -to the function call but will allow us to reuse this code and handle -more cases in the future (e.g. add XHCI support). - -Signed-off-by: Rafał Miłecki <zajec5@gmail.com> -Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> ---- - drivers/usb/host/bcma-hcd.c | 24 +++++++++++++----------- - 1 file changed, 13 insertions(+), 11 deletions(-) - ---- a/drivers/usb/host/bcma-hcd.c -+++ b/drivers/usb/host/bcma-hcd.c -@@ -244,7 +244,10 @@ static const struct usb_ehci_pdata ehci_ - static const struct usb_ohci_pdata ohci_pdata = { - }; - --static struct platform_device *bcma_hcd_create_pdev(struct bcma_device *dev, bool ohci, u32 addr) -+static struct platform_device *bcma_hcd_create_pdev(struct bcma_device *dev, -+ const char *name, u32 addr, -+ const void *data, -+ size_t size) - { - struct platform_device *hci_dev; - struct resource hci_res[2]; -@@ -259,8 +262,7 @@ static struct platform_device *bcma_hcd_ - hci_res[1].start = dev->irq; - hci_res[1].flags = IORESOURCE_IRQ; - -- hci_dev = platform_device_alloc(ohci ? "ohci-platform" : -- "ehci-platform" , 0); -+ hci_dev = platform_device_alloc(name, 0); - if (!hci_dev) - return ERR_PTR(-ENOMEM); - -@@ -271,12 +273,8 @@ static struct platform_device *bcma_hcd_ - ARRAY_SIZE(hci_res)); - if (ret) - goto err_alloc; -- if (ohci) -- ret = platform_device_add_data(hci_dev, &ohci_pdata, -- sizeof(ohci_pdata)); -- else -- ret = platform_device_add_data(hci_dev, &ehci_pdata, -- sizeof(ehci_pdata)); -+ if (data) -+ ret = platform_device_add_data(hci_dev, data, size); - if (ret) - goto err_alloc; - ret = platform_device_add(hci_dev); -@@ -333,11 +331,15 @@ static int bcma_hcd_probe(struct bcma_de - && chipinfo->rev == 0) - ohci_addr = 0x18009000; - -- usb_dev->ohci_dev = bcma_hcd_create_pdev(dev, true, ohci_addr); -+ usb_dev->ohci_dev = bcma_hcd_create_pdev(dev, "ohci-platform", -+ ohci_addr, &ohci_pdata, -+ sizeof(ohci_pdata)); - if (IS_ERR(usb_dev->ohci_dev)) - return PTR_ERR(usb_dev->ohci_dev); - -- usb_dev->ehci_dev = bcma_hcd_create_pdev(dev, false, dev->addr); -+ usb_dev->ehci_dev = bcma_hcd_create_pdev(dev, "ehci-platform", -+ dev->addr, &ehci_pdata, -+ sizeof(ehci_pdata)); - if (IS_ERR(usb_dev->ehci_dev)) { - err = PTR_ERR(usb_dev->ehci_dev); - goto err_unregister_ohci_dev; diff --git a/target/linux/bcm53xx/patches-4.4/081-0002-USB-bcma-separate-code-initializing-USB-2.0-core.patch b/target/linux/bcm53xx/patches-4.4/081-0002-USB-bcma-separate-code-initializing-USB-2.0-core.patch deleted file mode 100644 index 36ce273e3d..0000000000 --- a/target/linux/bcm53xx/patches-4.4/081-0002-USB-bcma-separate-code-initializing-USB-2.0-core.patch +++ /dev/null @@ -1,116 +0,0 @@ -From adbff3a4f93d8501e8ae11906268e21b086d57ed Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com> -Date: Sat, 5 Dec 2015 13:15:07 +0100 -Subject: [PATCH] USB: bcma: separate code initializing USB 2.0 core -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This splits one big probing function into two smaller ones. The main one -is now responsible for the generic stuff: allocating memory & enabling -power using GPIO. The new one contains code that is specific to the USB -2.0 bcma core. -This will allow adding support for the USB 3.0 bcma core (handling XHCI) -in the future. - -Signed-off-by: Rafał Miłecki <zajec5@gmail.com> -Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> ---- - drivers/usb/host/bcma-hcd.c | 59 ++++++++++++++++++++++++++++++--------------- - 1 file changed, 39 insertions(+), 20 deletions(-) - ---- a/drivers/usb/host/bcma-hcd.c -+++ b/drivers/usb/host/bcma-hcd.c -@@ -35,6 +35,7 @@ MODULE_DESCRIPTION("Common USB driver fo - MODULE_LICENSE("GPL"); - - struct bcma_hcd_device { -+ struct bcma_device *core; - struct platform_device *ehci_dev; - struct platform_device *ohci_dev; - struct gpio_desc *gpio_desc; -@@ -288,31 +289,16 @@ err_alloc: - return ERR_PTR(ret); - } - --static int bcma_hcd_probe(struct bcma_device *dev) -+static int bcma_hcd_usb20_init(struct bcma_hcd_device *usb_dev) - { -- int err; -+ struct bcma_device *dev = usb_dev->core; -+ struct bcma_chipinfo *chipinfo = &dev->bus->chipinfo; - u32 ohci_addr; -- struct bcma_hcd_device *usb_dev; -- struct bcma_chipinfo *chipinfo; -- -- chipinfo = &dev->bus->chipinfo; -- -- /* TODO: Probably need checks here; is the core connected? */ -+ int err; - - if (dma_set_mask_and_coherent(dev->dma_dev, DMA_BIT_MASK(32))) - return -EOPNOTSUPP; - -- usb_dev = devm_kzalloc(&dev->dev, sizeof(struct bcma_hcd_device), -- GFP_KERNEL); -- if (!usb_dev) -- return -ENOMEM; -- -- if (dev->dev.of_node) -- usb_dev->gpio_desc = devm_get_gpiod_from_child(&dev->dev, "vcc", -- &dev->dev.of_node->fwnode); -- if (!IS_ERR_OR_NULL(usb_dev->gpio_desc)) -- gpiod_direction_output(usb_dev->gpio_desc, 1); -- - switch (dev->id.id) { - case BCMA_CORE_NS_USB20: - bcma_hcd_init_chip_arm(dev); -@@ -345,7 +331,6 @@ static int bcma_hcd_probe(struct bcma_de - goto err_unregister_ohci_dev; - } - -- bcma_set_drvdata(dev, usb_dev); - return 0; - - err_unregister_ohci_dev: -@@ -353,6 +338,40 @@ err_unregister_ohci_dev: - return err; - } - -+static int bcma_hcd_probe(struct bcma_device *core) -+{ -+ int err; -+ struct bcma_hcd_device *usb_dev; -+ -+ /* TODO: Probably need checks here; is the core connected? */ -+ -+ usb_dev = devm_kzalloc(&core->dev, sizeof(struct bcma_hcd_device), -+ GFP_KERNEL); -+ if (!usb_dev) -+ return -ENOMEM; -+ usb_dev->core = core; -+ -+ if (core->dev.of_node) -+ usb_dev->gpio_desc = devm_get_gpiod_from_child(&core->dev, "vcc", -+ &core->dev.of_node->fwnode); -+ if (!IS_ERR_OR_NULL(usb_dev->gpio_desc)) -+ gpiod_direction_output(usb_dev->gpio_desc, 1); -+ -+ switch (core->id.id) { -+ case BCMA_CORE_USB20_HOST: -+ case BCMA_CORE_NS_USB20: -+ err = bcma_hcd_usb20_init(usb_dev); -+ if (err) -+ return err; -+ break; -+ default: -+ return -ENODEV; -+ } -+ -+ bcma_set_drvdata(core, usb_dev); -+ return 0; -+} -+ - static void bcma_hcd_remove(struct bcma_device *dev) - { - struct bcma_hcd_device *usb_dev = bcma_get_drvdata(dev); diff --git a/target/linux/bcm53xx/patches-4.4/081-0003-USB-bcma-use-simpler-devm-helper-for-getting-vcc-GPI.patch b/target/linux/bcm53xx/patches-4.4/081-0003-USB-bcma-use-simpler-devm-helper-for-getting-vcc-GPI.patch deleted file mode 100644 index 840669ce4c..0000000000 --- a/target/linux/bcm53xx/patches-4.4/081-0003-USB-bcma-use-simpler-devm-helper-for-getting-vcc-GPI.patch +++ /dev/null @@ -1,34 +0,0 @@ -From 1507372b97a098fd51b92c4dbdbbcd65cba26939 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com> -Date: Wed, 23 Mar 2016 12:37:11 +0100 -Subject: [PATCH] USB: bcma: use simpler devm helper for getting vcc GPIO -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Thanks to switching to devm_gpiod_get: -1) We don't have to pass fwnode pointer -2) We can request initial GPIO value at getting call -This was successfully tested on Netgear R6250 (BCM4708). - -Signed-off-by: Rafał Miłecki <zajec5@gmail.com> -Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> ---- - drivers/usb/host/bcma-hcd.c | 6 ++---- - 1 file changed, 2 insertions(+), 4 deletions(-) - ---- a/drivers/usb/host/bcma-hcd.c -+++ b/drivers/usb/host/bcma-hcd.c -@@ -352,10 +352,8 @@ static int bcma_hcd_probe(struct bcma_de - usb_dev->core = core; - - if (core->dev.of_node) -- usb_dev->gpio_desc = devm_get_gpiod_from_child(&core->dev, "vcc", -- &core->dev.of_node->fwnode); -- if (!IS_ERR_OR_NULL(usb_dev->gpio_desc)) -- gpiod_direction_output(usb_dev->gpio_desc, 1); -+ usb_dev->gpio_desc = devm_gpiod_get(&core->dev, "vcc", -+ GPIOD_OUT_HIGH); - - switch (core->id.id) { - case BCMA_CORE_USB20_HOST: diff --git a/target/linux/bcm53xx/patches-4.4/082-0001-USB-bcma-initialize-Northstar-USB-3.0-controller.patch b/target/linux/bcm53xx/patches-4.4/082-0001-USB-bcma-initialize-Northstar-USB-3.0-controller.patch deleted file mode 100644 index a1075b3a43..0000000000 --- a/target/linux/bcm53xx/patches-4.4/082-0001-USB-bcma-initialize-Northstar-USB-3.0-controller.patch +++ /dev/null @@ -1,67 +0,0 @@ -From 3cc7e7b7872ebd0f200b5450f5471bc3700de141 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com> -Date: Fri, 8 Jul 2016 14:02:50 +0200 -Subject: [PATCH] USB: bcma: initialize Northstar USB 3.0 controller -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -It's a rather simple controller, we just need to make sure USB is -powered (using GPIO pin) and reset bus core. Once this is done it's -safe to register XHCI controller and let it init PHY and do its magic. - -Signed-off-by: Rafał Miłecki <zajec5@gmail.com> -Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> ---- - drivers/usb/host/bcma-hcd.c | 19 +++++++++++++++++++ - 1 file changed, 19 insertions(+) - ---- a/drivers/usb/host/bcma-hcd.c -+++ b/drivers/usb/host/bcma-hcd.c -@@ -27,6 +27,7 @@ - #include <linux/slab.h> - #include <linux/of.h> - #include <linux/of_gpio.h> -+#include <linux/of_platform.h> - #include <linux/usb/ehci_pdriver.h> - #include <linux/usb/ohci_pdriver.h> - -@@ -338,6 +339,18 @@ err_unregister_ohci_dev: - return err; - } - -+static int bcma_hcd_usb30_init(struct bcma_hcd_device *bcma_hcd) -+{ -+ struct bcma_device *core = bcma_hcd->core; -+ struct device *dev = &core->dev; -+ -+ bcma_core_enable(core, 0); -+ -+ of_platform_default_populate(dev->of_node, NULL, dev); -+ -+ return 0; -+} -+ - static int bcma_hcd_probe(struct bcma_device *core) - { - int err; -@@ -362,6 +375,11 @@ static int bcma_hcd_probe(struct bcma_de - if (err) - return err; - break; -+ case BCMA_CORE_NS_USB30: -+ err = bcma_hcd_usb30_init(usb_dev); -+ if (err) -+ return err; -+ break; - default: - return -ENODEV; - } -@@ -416,6 +434,7 @@ static int bcma_hcd_resume(struct bcma_d - static const struct bcma_device_id bcma_hcd_table[] = { - BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_USB20_HOST, BCMA_ANY_REV, BCMA_ANY_CLASS), - BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_NS_USB20, BCMA_ANY_REV, BCMA_ANY_CLASS), -+ BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_NS_USB30, BCMA_ANY_REV, BCMA_ANY_CLASS), - {}, - }; - MODULE_DEVICE_TABLE(bcma, bcma_hcd_table); diff --git a/target/linux/bcm53xx/patches-4.4/082-0002-USB-bcma-support-old-USB-2.0-controller-on-Northstar.patch b/target/linux/bcm53xx/patches-4.4/082-0002-USB-bcma-support-old-USB-2.0-controller-on-Northstar.patch deleted file mode 100644 index 2762785f79..0000000000 --- a/target/linux/bcm53xx/patches-4.4/082-0002-USB-bcma-support-old-USB-2.0-controller-on-Northstar.patch +++ /dev/null @@ -1,163 +0,0 @@ -From d6b76c4ddb124dd22c6e910ca9332e472e7b3273 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Wed, 10 Aug 2016 11:56:46 +0200 -Subject: [PATCH] USB: bcma: support old USB 2.0 controller on Northstar - devices -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Currently bcma-hcd driver handles 3 different bcma cores: -1) BCMA_CORE_USB20_HOST (0x819) -2) BCMA_CORE_NS_USB20 (0x504) -3) BCMA_CORE_NS_USB30 (0x505) - -The first one was introduced years ago and so far was used on MIPS -devices only. All Northstar (ARM) devices were using other two cores -which allowed easy implementation of separated initialization paths. - -It seems however Broadcom decided to reuse this old USB 2.0 controller -on some recently introduced cheaper Northstar BCM53573 SoCs. I noticed -this on Tenda AC9 (based on BCM47189B0 belonging to BCM53573 family). - -There is no difference in this old controller core identification -between MIPS and ARM devices: they share the same id and revision. We -need different controller initialization procedure however. -To handle this add a check for architecture and implement required -initialization for ARM case. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> ---- - drivers/usb/host/bcma-hcd.c | 86 ++++++++++++++++++++++++++++++++++++++++-- - include/linux/bcma/bcma_regs.h | 1 + - 2 files changed, 83 insertions(+), 4 deletions(-) - ---- a/drivers/usb/host/bcma-hcd.c -+++ b/drivers/usb/host/bcma-hcd.c -@@ -35,6 +35,9 @@ MODULE_AUTHOR("Hauke Mehrtens"); - MODULE_DESCRIPTION("Common USB driver for BCMA Bus"); - MODULE_LICENSE("GPL"); - -+/* See BCMA_CLKCTLST_EXTRESREQ and BCMA_CLKCTLST_EXTRESST */ -+#define USB_BCMA_CLKCTLST_USB_CLK_REQ 0x00000100 -+ - struct bcma_hcd_device { - struct bcma_device *core; - struct platform_device *ehci_dev; -@@ -166,6 +169,76 @@ static void bcma_hcd_init_chip_mips(stru - } - } - -+/** -+ * bcma_hcd_usb20_old_arm_init - Initialize old USB 2.0 controller on ARM -+ * -+ * Old USB 2.0 core is identified as BCMA_CORE_USB20_HOST and was introduced -+ * long before Northstar devices. It seems some cheaper chipsets like BCM53573 -+ * still use it. -+ * Initialization of this old core differs between MIPS and ARM. -+ */ -+static int bcma_hcd_usb20_old_arm_init(struct bcma_hcd_device *usb_dev) -+{ -+ struct bcma_device *core = usb_dev->core; -+ struct device *dev = &core->dev; -+ struct bcma_device *pmu_core; -+ -+ usleep_range(10000, 20000); -+ if (core->id.rev < 5) -+ return 0; -+ -+ pmu_core = bcma_find_core(core->bus, BCMA_CORE_PMU); -+ if (!pmu_core) { -+ dev_err(dev, "Could not find PMU core\n"); -+ return -ENOENT; -+ } -+ -+ /* Take USB core out of reset */ -+ bcma_awrite32(core, BCMA_IOCTL, BCMA_IOCTL_CLK | BCMA_IOCTL_FGC); -+ usleep_range(100, 200); -+ bcma_awrite32(core, BCMA_RESET_CTL, BCMA_RESET_CTL_RESET); -+ usleep_range(100, 200); -+ bcma_awrite32(core, BCMA_RESET_CTL, 0); -+ usleep_range(100, 200); -+ bcma_awrite32(core, BCMA_IOCTL, BCMA_IOCTL_CLK); -+ usleep_range(100, 200); -+ -+ /* Enable Misc PLL */ -+ bcma_write32(core, BCMA_CLKCTLST, BCMA_CLKCTLST_FORCEHT | -+ BCMA_CLKCTLST_HQCLKREQ | -+ USB_BCMA_CLKCTLST_USB_CLK_REQ); -+ usleep_range(100, 200); -+ -+ bcma_write32(core, 0x510, 0xc7f85000); -+ bcma_write32(core, 0x510, 0xc7f85003); -+ usleep_range(300, 600); -+ -+ /* Program USB PHY PLL parameters */ -+ bcma_write32(pmu_core, BCMA_CC_PMU_PLLCTL_ADDR, 0x6); -+ bcma_write32(pmu_core, BCMA_CC_PMU_PLLCTL_DATA, 0x005360c1); -+ usleep_range(100, 200); -+ bcma_write32(pmu_core, BCMA_CC_PMU_PLLCTL_ADDR, 0x7); -+ bcma_write32(pmu_core, BCMA_CC_PMU_PLLCTL_DATA, 0x0); -+ usleep_range(100, 200); -+ bcma_set32(pmu_core, BCMA_CC_PMU_CTL, BCMA_CC_PMU_CTL_PLL_UPD); -+ usleep_range(100, 200); -+ -+ bcma_write32(core, 0x510, 0x7f8d007); -+ udelay(1000); -+ -+ /* Take controller out of reset */ -+ bcma_write32(core, 0x200, 0x4ff); -+ usleep_range(25, 50); -+ bcma_write32(core, 0x200, 0x6ff); -+ usleep_range(25, 50); -+ bcma_write32(core, 0x200, 0x7ff); -+ usleep_range(25, 50); -+ -+ of_platform_default_populate(dev->of_node, NULL, dev); -+ -+ return 0; -+} -+ - static void bcma_hcd_init_chip_arm_phy(struct bcma_device *dev) - { - struct bcma_device *arm_core; -@@ -370,19 +443,24 @@ static int bcma_hcd_probe(struct bcma_de - - switch (core->id.id) { - case BCMA_CORE_USB20_HOST: -+ if (IS_ENABLED(CONFIG_ARM)) -+ err = bcma_hcd_usb20_old_arm_init(usb_dev); -+ else if (IS_ENABLED(CONFIG_MIPS)) -+ err = bcma_hcd_usb20_init(usb_dev); -+ else -+ err = -ENOTSUPP; -+ break; - case BCMA_CORE_NS_USB20: - err = bcma_hcd_usb20_init(usb_dev); -- if (err) -- return err; - break; - case BCMA_CORE_NS_USB30: - err = bcma_hcd_usb30_init(usb_dev); -- if (err) -- return err; - break; - default: - return -ENODEV; - } -+ if (err) -+ return err; - - bcma_set_drvdata(core, usb_dev); - return 0; ---- a/include/linux/bcma/bcma_regs.h -+++ b/include/linux/bcma/bcma_regs.h -@@ -10,6 +10,7 @@ - #define BCMA_CLKCTLST_HAVEALPREQ 0x00000008 /* ALP available request */ - #define BCMA_CLKCTLST_HAVEHTREQ 0x00000010 /* HT available request */ - #define BCMA_CLKCTLST_HWCROFF 0x00000020 /* Force HW clock request off */ -+#define BCMA_CLKCTLST_HQCLKREQ 0x00000040 /* HQ Clock */ - #define BCMA_CLKCTLST_EXTRESREQ 0x00000700 /* Mask of external resource requests */ - #define BCMA_CLKCTLST_EXTRESREQ_SHIFT 8 - #define BCMA_CLKCTLST_HAVEALP 0x00010000 /* ALP available */ diff --git a/target/linux/bcm53xx/patches-4.4/082-0003-USB-bcma-drop-Northstar-PHY-2.0-initialization-code.patch b/target/linux/bcm53xx/patches-4.4/082-0003-USB-bcma-drop-Northstar-PHY-2.0-initialization-code.patch deleted file mode 100644 index 0af94e6137..0000000000 --- a/target/linux/bcm53xx/patches-4.4/082-0003-USB-bcma-drop-Northstar-PHY-2.0-initialization-code.patch +++ /dev/null @@ -1,136 +0,0 @@ -From e8624859dde2ad07633dac7ec86629a516411ea1 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Wed, 21 Sep 2016 18:01:43 +0200 -Subject: [PATCH] USB: bcma: drop Northstar PHY 2.0 initialization code -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This driver should initialize controller only, PHY initialization should -be handled by separated PHY driver. We already have phy-bcm-ns-usb2 in -place so let it makes its duty. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> ---- - drivers/usb/host/bcma-hcd.c | 80 ++++++++++++++------------------------------- - 1 file changed, 25 insertions(+), 55 deletions(-) - ---- a/drivers/usb/host/bcma-hcd.c -+++ b/drivers/usb/host/bcma-hcd.c -@@ -239,44 +239,10 @@ static int bcma_hcd_usb20_old_arm_init(s - return 0; - } - --static void bcma_hcd_init_chip_arm_phy(struct bcma_device *dev) --{ -- struct bcma_device *arm_core; -- void __iomem *dmu; -- -- arm_core = bcma_find_core(dev->bus, BCMA_CORE_ARMCA9); -- if (!arm_core) { -- dev_err(&dev->dev, "can not find ARM Cortex A9 ihost core\n"); -- return; -- } -- -- dmu = ioremap_nocache(arm_core->addr_s[0], 0x1000); -- if (!dmu) { -- dev_err(&dev->dev, "can not map ARM Cortex A9 ihost core\n"); -- return; -- } -- -- /* Unlock DMU PLL settings */ -- iowrite32(0x0000ea68, dmu + 0x180); -- -- /* Write USB 2.0 PLL control setting */ -- iowrite32(0x00dd10c3, dmu + 0x164); -- -- /* Lock DMU PLL settings */ -- iowrite32(0x00000000, dmu + 0x180); -- -- iounmap(dmu); --} -- --static void bcma_hcd_init_chip_arm_hc(struct bcma_device *dev) -+static void bcma_hcd_usb20_ns_init_hc(struct bcma_device *dev) - { - u32 val; - -- /* -- * Delay after PHY initialized to ensure HC is ready to be configured -- */ -- usleep_range(1000, 2000); -- - /* Set packet buffer OUT threshold */ - val = bcma_read32(dev, 0x94); - val &= 0xffff; -@@ -287,20 +253,33 @@ static void bcma_hcd_init_chip_arm_hc(st - val = bcma_read32(dev, 0x9c); - val |= 1; - bcma_write32(dev, 0x9c, val); -+ -+ /* -+ * Broadcom initializes PHY and then waits to ensure HC is ready to be -+ * configured. In our case the order is reversed. We just initialized -+ * controller and we let HCD initialize PHY, so let's wait (sleep) now. -+ */ -+ usleep_range(1000, 2000); - } - --static void bcma_hcd_init_chip_arm(struct bcma_device *dev) -+/** -+ * bcma_hcd_usb20_ns_init - Initialize Northstar USB 2.0 controller -+ */ -+static int bcma_hcd_usb20_ns_init(struct bcma_hcd_device *bcma_hcd) - { -- bcma_core_enable(dev, 0); -+ struct bcma_device *core = bcma_hcd->core; -+ struct bcma_chipinfo *ci = &core->bus->chipinfo; -+ struct device *dev = &core->dev; -+ -+ bcma_core_enable(core, 0); - -- if (dev->bus->chipinfo.id == BCMA_CHIP_ID_BCM4707 || -- dev->bus->chipinfo.id == BCMA_CHIP_ID_BCM53018) { -- if (dev->bus->chipinfo.pkg == BCMA_PKG_ID_BCM4707 || -- dev->bus->chipinfo.pkg == BCMA_PKG_ID_BCM4708) -- bcma_hcd_init_chip_arm_phy(dev); -+ if (ci->id == BCMA_CHIP_ID_BCM4707 || -+ ci->id == BCMA_CHIP_ID_BCM53018) -+ bcma_hcd_usb20_ns_init_hc(core); - -- bcma_hcd_init_chip_arm_hc(dev); -- } -+ of_platform_default_populate(dev->of_node, NULL, dev); -+ -+ return 0; - } - - static void bcma_hci_platform_power_gpio(struct bcma_device *dev, bool val) -@@ -373,16 +352,7 @@ static int bcma_hcd_usb20_init(struct bc - if (dma_set_mask_and_coherent(dev->dma_dev, DMA_BIT_MASK(32))) - return -EOPNOTSUPP; - -- switch (dev->id.id) { -- case BCMA_CORE_NS_USB20: -- bcma_hcd_init_chip_arm(dev); -- break; -- case BCMA_CORE_USB20_HOST: -- bcma_hcd_init_chip_mips(dev); -- break; -- default: -- return -ENODEV; -- } -+ bcma_hcd_init_chip_mips(dev); - - /* In AI chips EHCI is addrspace 0, OHCI is 1 */ - ohci_addr = dev->addr_s[0]; -@@ -451,7 +421,7 @@ static int bcma_hcd_probe(struct bcma_de - err = -ENOTSUPP; - break; - case BCMA_CORE_NS_USB20: -- err = bcma_hcd_usb20_init(usb_dev); -+ err = bcma_hcd_usb20_ns_init(usb_dev); - break; - case BCMA_CORE_NS_USB30: - err = bcma_hcd_usb30_init(usb_dev); diff --git a/target/linux/bcm53xx/patches-4.4/083-0001-spi-bcm-qspi-Add-Broadcom-MSPI-driver.patch b/target/linux/bcm53xx/patches-4.4/083-0001-spi-bcm-qspi-Add-Broadcom-MSPI-driver.patch deleted file mode 100644 index b10ba83c69..0000000000 --- a/target/linux/bcm53xx/patches-4.4/083-0001-spi-bcm-qspi-Add-Broadcom-MSPI-driver.patch +++ /dev/null @@ -1,832 +0,0 @@ -From fa236a7ef24048bafaeed13f68df35a819794758 Mon Sep 17 00:00:00 2001 -From: Kamal Dasu <kdasu.kdev@gmail.com> -Date: Wed, 24 Aug 2016 18:04:23 -0400 -Subject: [PATCH] spi: bcm-qspi: Add Broadcom MSPI driver - -Master SPI driver for Broadcom settop, iProc SoCs. The driver -is used for devices that use SPI protocol on BRCMSTB, NSP, NS2 -SoCs. SoC platform driver call exported porbe(), remove() -and suspend/resume pm_ops implemented in this common driver. - -Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com> -Signed-off-by: Yendapally Reddy Dhananjaya Reddy -Signed-off-by: Mark Brown <broonie@kernel.org> ---- - drivers/spi/Kconfig | 10 + - drivers/spi/Makefile | 1 + - drivers/spi/spi-bcm-qspi.c | 712 +++++++++++++++++++++++++++++++++++++++++++++ - drivers/spi/spi-bcm-qspi.h | 63 ++++ - 4 files changed, 786 insertions(+) - create mode 100644 drivers/spi/spi-bcm-qspi.c - create mode 100644 drivers/spi/spi-bcm-qspi.h - ---- a/drivers/spi/Kconfig -+++ b/drivers/spi/Kconfig -@@ -147,6 +147,16 @@ config SPI_BCM63XX_HSSPI - This enables support for the High Speed SPI controller present on - newer Broadcom BCM63XX SoCs. - -+config SPI_BCM_QSPI -+ tristate "Broadcom BSPI and MSPI controller support" -+ depends on ARCH_BRCMSTB || ARCH_BCM || ARCH_BCM_IPROC || COMPILE_TEST -+ default ARCH_BCM_IPROC -+ help -+ Enables support for the Broadcom SPI flash and MSPI controller. -+ Select this option for any one of BRCMSTB, iProc NSP and NS2 SoCs -+ based platforms. This driver works for both SPI master for spi-nor -+ flash device as well as MSPI device. -+ - config SPI_BITBANG - tristate "Utilities for Bitbanging SPI masters" - help ---- a/drivers/spi/Makefile -+++ b/drivers/spi/Makefile -@@ -19,6 +19,7 @@ obj-$(CONFIG_SPI_BCM2835AUX) += spi-bcm - obj-$(CONFIG_SPI_BCM53XX) += spi-bcm53xx.o - obj-$(CONFIG_SPI_BCM63XX) += spi-bcm63xx.o - obj-$(CONFIG_SPI_BCM63XX_HSSPI) += spi-bcm63xx-hsspi.o -+obj-$(CONFIG_SPI_BCM_QSPI) += spi-bcm-qspi.o - obj-$(CONFIG_SPI_BFIN5XX) += spi-bfin5xx.o - obj-$(CONFIG_SPI_ADI_V3) += spi-adi-v3.o - obj-$(CONFIG_SPI_BFIN_SPORT) += spi-bfin-sport.o ---- /dev/null -+++ b/drivers/spi/spi-bcm-qspi.c -@@ -0,0 +1,712 @@ -+/* -+ * Driver for Broadcom BRCMSTB, NSP, NS2, Cygnus SPI Controllers -+ * -+ * Copyright 2016 Broadcom -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License, version 2, as -+ * published by the Free Software Foundation (the "GPL"). -+ * -+ * This program is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License version 2 (GPLv2) for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * version 2 (GPLv2) along with this source code. -+ */ -+ -+#include <linux/clk.h> -+#include <linux/delay.h> -+#include <linux/device.h> -+#include <linux/init.h> -+#include <linux/interrupt.h> -+#include <linux/io.h> -+#include <linux/ioport.h> -+#include <linux/kernel.h> -+#include <linux/module.h> -+#include <linux/mtd/cfi.h> -+#include <linux/mtd/spi-nor.h> -+#include <linux/of.h> -+#include <linux/of_irq.h> -+#include <linux/platform_device.h> -+#include <linux/slab.h> -+#include <linux/spi/spi.h> -+#include <linux/sysfs.h> -+#include <linux/types.h> -+#include "spi-bcm-qspi.h" -+ -+#define DRIVER_NAME "bcm_qspi" -+ -+/* MSPI register offsets */ -+#define MSPI_SPCR0_LSB 0x000 -+#define MSPI_SPCR0_MSB 0x004 -+#define MSPI_SPCR1_LSB 0x008 -+#define MSPI_SPCR1_MSB 0x00c -+#define MSPI_NEWQP 0x010 -+#define MSPI_ENDQP 0x014 -+#define MSPI_SPCR2 0x018 -+#define MSPI_MSPI_STATUS 0x020 -+#define MSPI_CPTQP 0x024 -+#define MSPI_SPCR3 0x028 -+#define MSPI_TXRAM 0x040 -+#define MSPI_RXRAM 0x0c0 -+#define MSPI_CDRAM 0x140 -+#define MSPI_WRITE_LOCK 0x180 -+ -+#define MSPI_MASTER_BIT BIT(7) -+ -+#define MSPI_NUM_CDRAM 16 -+#define MSPI_CDRAM_CONT_BIT BIT(7) -+#define MSPI_CDRAM_BITSE_BIT BIT(6) -+#define MSPI_CDRAM_PCS 0xf -+ -+#define MSPI_SPCR2_SPE BIT(6) -+#define MSPI_SPCR2_CONT_AFTER_CMD BIT(7) -+ -+#define MSPI_MSPI_STATUS_SPIF BIT(0) -+ -+#define INTR_BASE_BIT_SHIFT 0x02 -+#define INTR_COUNT 0x07 -+ -+#define NUM_CHIPSELECT 4 -+#define QSPI_SPBR_MIN 8U -+#define QSPI_SPBR_MAX 255U -+ -+#define OPCODE_DIOR 0xBB -+#define OPCODE_QIOR 0xEB -+#define OPCODE_DIOR_4B 0xBC -+#define OPCODE_QIOR_4B 0xEC -+ -+#define MAX_CMD_SIZE 6 -+ -+#define ADDR_4MB_MASK GENMASK(22, 0) -+ -+/* stop at end of transfer, no other reason */ -+#define TRANS_STATUS_BREAK_NONE 0 -+/* stop at end of spi_message */ -+#define TRANS_STATUS_BREAK_EOM 1 -+/* stop at end of spi_transfer if delay */ -+#define TRANS_STATUS_BREAK_DELAY 2 -+/* stop at end of spi_transfer if cs_change */ -+#define TRANS_STATUS_BREAK_CS_CHANGE 4 -+/* stop if we run out of bytes */ -+#define TRANS_STATUS_BREAK_NO_BYTES 8 -+ -+/* events that make us stop filling TX slots */ -+#define TRANS_STATUS_BREAK_TX (TRANS_STATUS_BREAK_EOM | \ -+ TRANS_STATUS_BREAK_DELAY | \ -+ TRANS_STATUS_BREAK_CS_CHANGE) -+ -+/* events that make us deassert CS */ -+#define TRANS_STATUS_BREAK_DESELECT (TRANS_STATUS_BREAK_EOM | \ -+ TRANS_STATUS_BREAK_CS_CHANGE) -+ -+struct bcm_qspi_parms { -+ u32 speed_hz; -+ u8 mode; -+ u8 bits_per_word; -+}; -+ -+enum base_type { -+ MSPI, -+ CHIP_SELECT, -+ BASEMAX, -+}; -+ -+struct bcm_qspi_irq { -+ const char *irq_name; -+ const irq_handler_t irq_handler; -+ u32 mask; -+}; -+ -+struct bcm_qspi_dev_id { -+ const struct bcm_qspi_irq *irqp; -+ void *dev; -+}; -+ -+struct qspi_trans { -+ struct spi_transfer *trans; -+ int byte; -+}; -+ -+struct bcm_qspi { -+ struct platform_device *pdev; -+ struct spi_master *master; -+ struct clk *clk; -+ u32 base_clk; -+ u32 max_speed_hz; -+ void __iomem *base[BASEMAX]; -+ struct bcm_qspi_parms last_parms; -+ struct qspi_trans trans_pos; -+ int curr_cs; -+ u32 s3_strap_override_ctrl; -+ bool big_endian; -+ int num_irqs; -+ struct bcm_qspi_dev_id *dev_ids; -+ struct completion mspi_done; -+}; -+ -+/* Read qspi controller register*/ -+static inline u32 bcm_qspi_read(struct bcm_qspi *qspi, enum base_type type, -+ unsigned int offset) -+{ -+ return bcm_qspi_readl(qspi->big_endian, qspi->base[type] + offset); -+} -+ -+/* Write qspi controller register*/ -+static inline void bcm_qspi_write(struct bcm_qspi *qspi, enum base_type type, -+ unsigned int offset, unsigned int data) -+{ -+ bcm_qspi_writel(qspi->big_endian, data, qspi->base[type] + offset); -+} -+ -+static void bcm_qspi_chip_select(struct bcm_qspi *qspi, int cs) -+{ -+ u32 data = 0; -+ -+ if (qspi->curr_cs == cs) -+ return; -+ if (qspi->base[CHIP_SELECT]) { -+ data = bcm_qspi_read(qspi, CHIP_SELECT, 0); -+ data = (data & ~0xff) | (1 << cs); -+ bcm_qspi_write(qspi, CHIP_SELECT, 0, data); -+ usleep_range(10, 20); -+ } -+ qspi->curr_cs = cs; -+} -+ -+/* MSPI helpers */ -+static void bcm_qspi_hw_set_parms(struct bcm_qspi *qspi, -+ const struct bcm_qspi_parms *xp) -+{ -+ u32 spcr, spbr = 0; -+ -+ if (xp->speed_hz) -+ spbr = qspi->base_clk / (2 * xp->speed_hz); -+ -+ spcr = clamp_val(spbr, QSPI_SPBR_MIN, QSPI_SPBR_MAX); -+ bcm_qspi_write(qspi, MSPI, MSPI_SPCR0_LSB, spcr); -+ -+ spcr = MSPI_MASTER_BIT; -+ /* for 16 bit the data should be zero */ -+ if (xp->bits_per_word != 16) -+ spcr |= xp->bits_per_word << 2; -+ spcr |= xp->mode & 3; -+ bcm_qspi_write(qspi, MSPI, MSPI_SPCR0_MSB, spcr); -+ -+ qspi->last_parms = *xp; -+} -+ -+static void bcm_qspi_update_parms(struct bcm_qspi *qspi, -+ struct spi_device *spi, -+ struct spi_transfer *trans) -+{ -+ struct bcm_qspi_parms xp; -+ -+ xp.speed_hz = trans->speed_hz; -+ xp.bits_per_word = trans->bits_per_word; -+ xp.mode = spi->mode; -+ -+ bcm_qspi_hw_set_parms(qspi, &xp); -+} -+ -+static int bcm_qspi_setup(struct spi_device *spi) -+{ -+ struct bcm_qspi_parms *xp; -+ -+ if (spi->bits_per_word > 16) -+ return -EINVAL; -+ -+ xp = spi_get_ctldata(spi); -+ if (!xp) { -+ xp = kzalloc(sizeof(*xp), GFP_KERNEL); -+ if (!xp) -+ return -ENOMEM; -+ spi_set_ctldata(spi, xp); -+ } -+ xp->speed_hz = spi->max_speed_hz; -+ xp->mode = spi->mode; -+ -+ if (spi->bits_per_word) -+ xp->bits_per_word = spi->bits_per_word; -+ else -+ xp->bits_per_word = 8; -+ -+ return 0; -+} -+ -+static int update_qspi_trans_byte_count(struct bcm_qspi *qspi, -+ struct qspi_trans *qt, int flags) -+{ -+ int ret = TRANS_STATUS_BREAK_NONE; -+ -+ /* count the last transferred bytes */ -+ if (qt->trans->bits_per_word <= 8) -+ qt->byte++; -+ else -+ qt->byte += 2; -+ -+ if (qt->byte >= qt->trans->len) { -+ /* we're at the end of the spi_transfer */ -+ -+ /* in TX mode, need to pause for a delay or CS change */ -+ if (qt->trans->delay_usecs && -+ (flags & TRANS_STATUS_BREAK_DELAY)) -+ ret |= TRANS_STATUS_BREAK_DELAY; -+ if (qt->trans->cs_change && -+ (flags & TRANS_STATUS_BREAK_CS_CHANGE)) -+ ret |= TRANS_STATUS_BREAK_CS_CHANGE; -+ if (ret) -+ goto done; -+ -+ dev_dbg(&qspi->pdev->dev, "advance msg exit\n"); -+ if (spi_transfer_is_last(qspi->master, qt->trans)) -+ ret = TRANS_STATUS_BREAK_EOM; -+ else -+ ret = TRANS_STATUS_BREAK_NO_BYTES; -+ -+ qt->trans = NULL; -+ } -+ -+done: -+ dev_dbg(&qspi->pdev->dev, "trans %p len %d byte %d ret %x\n", -+ qt->trans, qt->trans ? qt->trans->len : 0, qt->byte, ret); -+ return ret; -+} -+ -+static inline u8 read_rxram_slot_u8(struct bcm_qspi *qspi, int slot) -+{ -+ u32 slot_offset = MSPI_RXRAM + (slot << 3) + 0x4; -+ -+ /* mask out reserved bits */ -+ return bcm_qspi_read(qspi, MSPI, slot_offset) & 0xff; -+} -+ -+static inline u16 read_rxram_slot_u16(struct bcm_qspi *qspi, int slot) -+{ -+ u32 reg_offset = MSPI_RXRAM; -+ u32 lsb_offset = reg_offset + (slot << 3) + 0x4; -+ u32 msb_offset = reg_offset + (slot << 3); -+ -+ return (bcm_qspi_read(qspi, MSPI, lsb_offset) & 0xff) | -+ ((bcm_qspi_read(qspi, MSPI, msb_offset) & 0xff) << 8); -+} -+ -+static void read_from_hw(struct bcm_qspi *qspi, int slots) -+{ -+ struct qspi_trans tp; -+ int slot; -+ -+ if (slots > MSPI_NUM_CDRAM) { -+ /* should never happen */ -+ dev_err(&qspi->pdev->dev, "%s: too many slots!\n", __func__); -+ return; -+ } -+ -+ tp = qspi->trans_pos; -+ -+ for (slot = 0; slot < slots; slot++) { -+ if (tp.trans->bits_per_word <= 8) { -+ u8 *buf = tp.trans->rx_buf; -+ -+ if (buf) -+ buf[tp.byte] = read_rxram_slot_u8(qspi, slot); -+ dev_dbg(&qspi->pdev->dev, "RD %02x\n", -+ buf ? buf[tp.byte] : 0xff); -+ } else { -+ u16 *buf = tp.trans->rx_buf; -+ -+ if (buf) -+ buf[tp.byte / 2] = read_rxram_slot_u16(qspi, -+ slot); -+ dev_dbg(&qspi->pdev->dev, "RD %04x\n", -+ buf ? buf[tp.byte] : 0xffff); -+ } -+ -+ update_qspi_trans_byte_count(qspi, &tp, -+ TRANS_STATUS_BREAK_NONE); -+ } -+ -+ qspi->trans_pos = tp; -+} -+ -+static inline void write_txram_slot_u8(struct bcm_qspi *qspi, int slot, -+ u8 val) -+{ -+ u32 reg_offset = MSPI_TXRAM + (slot << 3); -+ -+ /* mask out reserved bits */ -+ bcm_qspi_write(qspi, MSPI, reg_offset, val); -+} -+ -+static inline void write_txram_slot_u16(struct bcm_qspi *qspi, int slot, -+ u16 val) -+{ -+ u32 reg_offset = MSPI_TXRAM; -+ u32 msb_offset = reg_offset + (slot << 3); -+ u32 lsb_offset = reg_offset + (slot << 3) + 0x4; -+ -+ bcm_qspi_write(qspi, MSPI, msb_offset, (val >> 8)); -+ bcm_qspi_write(qspi, MSPI, lsb_offset, (val & 0xff)); -+} -+ -+static inline u32 read_cdram_slot(struct bcm_qspi *qspi, int slot) -+{ -+ return bcm_qspi_read(qspi, MSPI, MSPI_CDRAM + (slot << 2)); -+} -+ -+static inline void write_cdram_slot(struct bcm_qspi *qspi, int slot, u32 val) -+{ -+ bcm_qspi_write(qspi, MSPI, (MSPI_CDRAM + (slot << 2)), val); -+} -+ -+/* Return number of slots written */ -+static int write_to_hw(struct bcm_qspi *qspi, struct spi_device *spi) -+{ -+ struct qspi_trans tp; -+ int slot = 0, tstatus = 0; -+ u32 mspi_cdram = 0; -+ -+ tp = qspi->trans_pos; -+ bcm_qspi_update_parms(qspi, spi, tp.trans); -+ -+ /* Run until end of transfer or reached the max data */ -+ while (!tstatus && slot < MSPI_NUM_CDRAM) { -+ if (tp.trans->bits_per_word <= 8) { -+ const u8 *buf = tp.trans->tx_buf; -+ u8 val = buf ? buf[tp.byte] : 0xff; -+ -+ write_txram_slot_u8(qspi, slot, val); -+ dev_dbg(&qspi->pdev->dev, "WR %02x\n", val); -+ } else { -+ const u16 *buf = tp.trans->tx_buf; -+ u16 val = buf ? buf[tp.byte / 2] : 0xffff; -+ -+ write_txram_slot_u16(qspi, slot, val); -+ dev_dbg(&qspi->pdev->dev, "WR %04x\n", val); -+ } -+ mspi_cdram = MSPI_CDRAM_CONT_BIT; -+ mspi_cdram |= (~(1 << spi->chip_select) & -+ MSPI_CDRAM_PCS); -+ mspi_cdram |= ((tp.trans->bits_per_word <= 8) ? 0 : -+ MSPI_CDRAM_BITSE_BIT); -+ -+ write_cdram_slot(qspi, slot, mspi_cdram); -+ -+ tstatus = update_qspi_trans_byte_count(qspi, &tp, -+ TRANS_STATUS_BREAK_TX); -+ slot++; -+ } -+ -+ if (!slot) { -+ dev_err(&qspi->pdev->dev, "%s: no data to send?", __func__); -+ goto done; -+ } -+ -+ dev_dbg(&qspi->pdev->dev, "submitting %d slots\n", slot); -+ bcm_qspi_write(qspi, MSPI, MSPI_NEWQP, 0); -+ bcm_qspi_write(qspi, MSPI, MSPI_ENDQP, slot - 1); -+ -+ if (tstatus & TRANS_STATUS_BREAK_DESELECT) { -+ mspi_cdram = read_cdram_slot(qspi, slot - 1) & -+ ~MSPI_CDRAM_CONT_BIT; -+ write_cdram_slot(qspi, slot - 1, mspi_cdram); -+ } -+ -+ /* Must flush previous writes before starting MSPI operation */ -+ mb(); -+ /* Set cont | spe | spifie */ -+ bcm_qspi_write(qspi, MSPI, MSPI_SPCR2, 0xe0); -+ -+done: -+ return slot; -+} -+ -+static int bcm_qspi_transfer_one(struct spi_master *master, -+ struct spi_device *spi, -+ struct spi_transfer *trans) -+{ -+ struct bcm_qspi *qspi = spi_master_get_devdata(master); -+ int slots; -+ unsigned long timeo = msecs_to_jiffies(100); -+ -+ bcm_qspi_chip_select(qspi, spi->chip_select); -+ qspi->trans_pos.trans = trans; -+ qspi->trans_pos.byte = 0; -+ -+ while (qspi->trans_pos.byte < trans->len) { -+ reinit_completion(&qspi->mspi_done); -+ -+ slots = write_to_hw(qspi, spi); -+ if (!wait_for_completion_timeout(&qspi->mspi_done, timeo)) { -+ dev_err(&qspi->pdev->dev, "timeout waiting for MSPI\n"); -+ return -ETIMEDOUT; -+ } -+ -+ read_from_hw(qspi, slots); -+ } -+ -+ return 0; -+} -+ -+static void bcm_qspi_cleanup(struct spi_device *spi) -+{ -+ struct bcm_qspi_parms *xp = spi_get_ctldata(spi); -+ -+ kfree(xp); -+} -+ -+static irqreturn_t bcm_qspi_mspi_l2_isr(int irq, void *dev_id) -+{ -+ struct bcm_qspi_dev_id *qspi_dev_id = dev_id; -+ struct bcm_qspi *qspi = qspi_dev_id->dev; -+ u32 status = bcm_qspi_read(qspi, MSPI, MSPI_MSPI_STATUS); -+ -+ if (status & MSPI_MSPI_STATUS_SPIF) { -+ /* clear interrupt */ -+ status &= ~MSPI_MSPI_STATUS_SPIF; -+ bcm_qspi_write(qspi, MSPI, MSPI_MSPI_STATUS, status); -+ complete(&qspi->mspi_done); -+ return IRQ_HANDLED; -+ } else { -+ return IRQ_NONE; -+ } -+} -+ -+static const struct bcm_qspi_irq qspi_irq_tab[] = { -+ { -+ .irq_name = "mspi_done", -+ .irq_handler = bcm_qspi_mspi_l2_isr, -+ .mask = INTR_MSPI_DONE_MASK, -+ }, -+ { -+ .irq_name = "mspi_halted", -+ .irq_handler = bcm_qspi_mspi_l2_isr, -+ .mask = INTR_MSPI_HALTED_MASK, -+ }, -+}; -+ -+static void bcm_qspi_hw_init(struct bcm_qspi *qspi) -+{ -+ struct bcm_qspi_parms parms; -+ -+ bcm_qspi_write(qspi, MSPI, MSPI_SPCR1_LSB, 0); -+ bcm_qspi_write(qspi, MSPI, MSPI_SPCR1_MSB, 0); -+ bcm_qspi_write(qspi, MSPI, MSPI_NEWQP, 0); -+ bcm_qspi_write(qspi, MSPI, MSPI_ENDQP, 0); -+ bcm_qspi_write(qspi, MSPI, MSPI_SPCR2, 0x20); -+ -+ parms.mode = SPI_MODE_3; -+ parms.bits_per_word = 8; -+ parms.speed_hz = qspi->max_speed_hz; -+ bcm_qspi_hw_set_parms(qspi, &parms); -+} -+ -+static void bcm_qspi_hw_uninit(struct bcm_qspi *qspi) -+{ -+ bcm_qspi_write(qspi, MSPI, MSPI_SPCR2, 0); -+} -+ -+static const struct of_device_id bcm_qspi_of_match[] = { -+ { .compatible = "brcm,spi-bcm-qspi" }, -+ {}, -+}; -+MODULE_DEVICE_TABLE(of, bcm_qspi_of_match); -+ -+int bcm_qspi_probe(struct platform_device *pdev, -+ struct bcm_qspi_soc_intc *soc) -+{ -+ struct device *dev = &pdev->dev; -+ struct bcm_qspi *qspi; -+ struct spi_master *master; -+ struct resource *res; -+ int irq, ret = 0, num_ints = 0; -+ u32 val; -+ const char *name = NULL; -+ int num_irqs = ARRAY_SIZE(qspi_irq_tab); -+ -+ /* We only support device-tree instantiation */ -+ if (!dev->of_node) -+ return -ENODEV; -+ -+ if (!of_match_node(bcm_qspi_of_match, dev->of_node)) -+ return -ENODEV; -+ -+ master = spi_alloc_master(dev, sizeof(struct bcm_qspi)); -+ if (!master) { -+ dev_err(dev, "error allocating spi_master\n"); -+ return -ENOMEM; -+ } -+ -+ qspi = spi_master_get_devdata(master); -+ qspi->pdev = pdev; -+ qspi->trans_pos.trans = NULL; -+ qspi->trans_pos.byte = 0; -+ qspi->master = master; -+ -+ master->bus_num = -1; -+ master->mode_bits = SPI_CPHA | SPI_CPOL | SPI_RX_DUAL | SPI_RX_QUAD; -+ master->setup = bcm_qspi_setup; -+ master->transfer_one = bcm_qspi_transfer_one; -+ master->cleanup = bcm_qspi_cleanup; -+ master->dev.of_node = dev->of_node; -+ master->num_chipselect = NUM_CHIPSELECT; -+ -+ qspi->big_endian = of_device_is_big_endian(dev->of_node); -+ -+ if (!of_property_read_u32(dev->of_node, "num-cs", &val)) -+ master->num_chipselect = val; -+ -+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hif_mspi"); -+ if (!res) -+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, -+ "mspi"); -+ -+ if (res) { -+ qspi->base[MSPI] = devm_ioremap_resource(dev, res); -+ if (IS_ERR(qspi->base[MSPI])) { -+ ret = PTR_ERR(qspi->base[MSPI]); -+ goto qspi_probe_err; -+ } -+ } else { -+ goto qspi_probe_err; -+ } -+ -+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cs_reg"); -+ if (res) { -+ qspi->base[CHIP_SELECT] = devm_ioremap_resource(dev, res); -+ if (IS_ERR(qspi->base[CHIP_SELECT])) { -+ ret = PTR_ERR(qspi->base[CHIP_SELECT]); -+ goto qspi_probe_err; -+ } -+ } -+ -+ qspi->dev_ids = kcalloc(num_irqs, sizeof(struct bcm_qspi_dev_id), -+ GFP_KERNEL); -+ if (IS_ERR(qspi->dev_ids)) { -+ ret = PTR_ERR(qspi->dev_ids); -+ goto qspi_probe_err; -+ } -+ -+ for (val = 0; val < num_irqs; val++) { -+ irq = -1; -+ name = qspi_irq_tab[val].irq_name; -+ irq = platform_get_irq_byname(pdev, name); -+ -+ if (irq >= 0) { -+ ret = devm_request_irq(&pdev->dev, irq, -+ qspi_irq_tab[val].irq_handler, 0, -+ name, -+ &qspi->dev_ids[val]); -+ if (ret < 0) { -+ dev_err(&pdev->dev, "IRQ %s not found\n", name); -+ goto qspi_probe_err; -+ } -+ -+ qspi->dev_ids[val].dev = qspi; -+ qspi->dev_ids[val].irqp = &qspi_irq_tab[val]; -+ num_ints++; -+ dev_dbg(&pdev->dev, "registered IRQ %s %d\n", -+ qspi_irq_tab[val].irq_name, -+ irq); -+ } -+ } -+ -+ if (!num_ints) { -+ dev_err(&pdev->dev, "no IRQs registered, cannot init driver\n"); -+ goto qspi_probe_err; -+ } -+ -+ qspi->clk = devm_clk_get(&pdev->dev, NULL); -+ if (IS_ERR(qspi->clk)) { -+ dev_warn(dev, "unable to get clock\n"); -+ goto qspi_probe_err; -+ } -+ -+ ret = clk_prepare_enable(qspi->clk); -+ if (ret) { -+ dev_err(dev, "failed to prepare clock\n"); -+ goto qspi_probe_err; -+ } -+ -+ qspi->base_clk = clk_get_rate(qspi->clk); -+ qspi->max_speed_hz = qspi->base_clk / (QSPI_SPBR_MIN * 2); -+ -+ bcm_qspi_hw_init(qspi); -+ init_completion(&qspi->mspi_done); -+ qspi->curr_cs = -1; -+ -+ platform_set_drvdata(pdev, qspi); -+ ret = devm_spi_register_master(&pdev->dev, master); -+ if (ret < 0) { -+ dev_err(dev, "can't register master\n"); -+ goto qspi_reg_err; -+ } -+ -+ return 0; -+ -+qspi_reg_err: -+ bcm_qspi_hw_uninit(qspi); -+ clk_disable_unprepare(qspi->clk); -+qspi_probe_err: -+ spi_master_put(master); -+ kfree(qspi->dev_ids); -+ return ret; -+} -+/* probe function to be called by SoC specific platform driver probe */ -+EXPORT_SYMBOL_GPL(bcm_qspi_probe); -+ -+int bcm_qspi_remove(struct platform_device *pdev) -+{ -+ struct bcm_qspi *qspi = platform_get_drvdata(pdev); -+ -+ platform_set_drvdata(pdev, NULL); -+ bcm_qspi_hw_uninit(qspi); -+ clk_disable_unprepare(qspi->clk); -+ kfree(qspi->dev_ids); -+ spi_unregister_master(qspi->master); -+ -+ return 0; -+} -+/* function to be called by SoC specific platform driver remove() */ -+EXPORT_SYMBOL_GPL(bcm_qspi_remove); -+ -+#ifdef CONFIG_PM_SLEEP -+static int bcm_qspi_suspend(struct device *dev) -+{ -+ struct bcm_qspi *qspi = dev_get_drvdata(dev); -+ -+ spi_master_suspend(qspi->master); -+ clk_disable(qspi->clk); -+ bcm_qspi_hw_uninit(qspi); -+ -+ return 0; -+}; -+ -+static int bcm_qspi_resume(struct device *dev) -+{ -+ struct bcm_qspi *qspi = dev_get_drvdata(dev); -+ int ret = 0; -+ -+ bcm_qspi_hw_init(qspi); -+ bcm_qspi_chip_select(qspi, qspi->curr_cs); -+ ret = clk_enable(qspi->clk); -+ if (!ret) -+ spi_master_resume(qspi->master); -+ -+ return ret; -+} -+#endif /* CONFIG_PM_SLEEP */ -+ -+const struct dev_pm_ops bcm_qspi_pm_ops = { -+ .suspend = bcm_qspi_suspend, -+ .resume = bcm_qspi_resume, -+}; -+/* pm_ops to be called by SoC specific platform driver */ -+EXPORT_SYMBOL_GPL(bcm_qspi_pm_ops); -+ -+MODULE_AUTHOR("Kamal Dasu"); -+MODULE_DESCRIPTION("Broadcom QSPI driver"); -+MODULE_LICENSE("GPL v2"); -+MODULE_ALIAS("platform:" DRIVER_NAME); ---- /dev/null -+++ b/drivers/spi/spi-bcm-qspi.h -@@ -0,0 +1,63 @@ -+/* -+ * Copyright 2016 Broadcom -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License, version 2, as -+ * published by the Free Software Foundation (the "GPL"). -+ * -+ * This program is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License version 2 (GPLv2) for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * version 2 (GPLv2) along with this source code. -+ */ -+ -+#ifndef __SPI_BCM_QSPI_H__ -+#define __SPI_BCM_QSPI_H__ -+ -+#include <linux/types.h> -+#include <linux/io.h> -+ -+/* MSPI Interrupt masks */ -+#define INTR_MSPI_HALTED_MASK BIT(6) -+#define INTR_MSPI_DONE_MASK BIT(5) -+ -+#define MSPI_INTERRUPTS_ALL \ -+ (INTR_MSPI_DONE_MASK | \ -+ INTR_MSPI_HALTED_MASK) -+ -+struct platform_device; -+struct dev_pm_ops; -+ -+struct bcm_qspi_soc_intc; -+ -+/* Read controller register*/ -+static inline u32 bcm_qspi_readl(bool be, void __iomem *addr) -+{ -+ if (be) -+ return ioread32be(addr); -+ else -+ return readl_relaxed(addr); -+} -+ -+/* Write controller register*/ -+static inline void bcm_qspi_writel(bool be, -+ unsigned int data, void __iomem *addr) -+{ -+ if (be) -+ iowrite32be(data, addr); -+ else -+ writel_relaxed(data, addr); -+} -+ -+/* The common driver functions to be called by the SoC platform driver */ -+int bcm_qspi_probe(struct platform_device *pdev, -+ struct bcm_qspi_soc_intc *soc_intc); -+int bcm_qspi_remove(struct platform_device *pdev); -+ -+/* pm_ops used by the SoC platform driver called on PM suspend/resume */ -+extern const struct dev_pm_ops bcm_qspi_pm_ops; -+ -+#endif /* __SPI_BCM_QSPI_H__ */ diff --git a/target/linux/bcm53xx/patches-4.4/083-0002-spi-brcmstb-qspi-Broadcom-settop-platform-driver.patch b/target/linux/bcm53xx/patches-4.4/083-0002-spi-brcmstb-qspi-Broadcom-settop-platform-driver.patch deleted file mode 100644 index 476b11cdc8..0000000000 --- a/target/linux/bcm53xx/patches-4.4/083-0002-spi-brcmstb-qspi-Broadcom-settop-platform-driver.patch +++ /dev/null @@ -1,84 +0,0 @@ -From 44f95d87a6187f5027568bbcdce491713d7de5e5 Mon Sep 17 00:00:00 2001 -From: Kamal Dasu <kdasu.kdev@gmail.com> -Date: Wed, 24 Aug 2016 18:04:24 -0400 -Subject: [PATCH] spi: brcmstb-qspi: Broadcom settop platform driver - -Adding the settop SoC platfrom driver, this driver is compatible -with the settop MSPI+BSPI and MSPI only blocks implemented on the -SoCs. Driver calls the spi-bcm-qspi probe(), remove() and pm_ops. - -Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com> -Signed-off-by: Mark Brown <broonie@kernel.org> ---- - drivers/spi/Makefile | 2 +- - drivers/spi/spi-brcmstb-qspi.c | 53 ++++++++++++++++++++++++++++++++++++++++++ - 2 files changed, 54 insertions(+), 1 deletion(-) - create mode 100644 drivers/spi/spi-brcmstb-qspi.c - ---- a/drivers/spi/Makefile -+++ b/drivers/spi/Makefile -@@ -19,7 +19,7 @@ obj-$(CONFIG_SPI_BCM2835AUX) += spi-bcm - obj-$(CONFIG_SPI_BCM53XX) += spi-bcm53xx.o - obj-$(CONFIG_SPI_BCM63XX) += spi-bcm63xx.o - obj-$(CONFIG_SPI_BCM63XX_HSSPI) += spi-bcm63xx-hsspi.o --obj-$(CONFIG_SPI_BCM_QSPI) += spi-bcm-qspi.o -+obj-$(CONFIG_SPI_BCM_QSPI) += spi-brcmstb-qspi.o spi-bcm-qspi.o - obj-$(CONFIG_SPI_BFIN5XX) += spi-bfin5xx.o - obj-$(CONFIG_SPI_ADI_V3) += spi-adi-v3.o - obj-$(CONFIG_SPI_BFIN_SPORT) += spi-bfin-sport.o ---- /dev/null -+++ b/drivers/spi/spi-brcmstb-qspi.c -@@ -0,0 +1,53 @@ -+/* -+ * Copyright 2016 Broadcom -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License, version 2, as -+ * published by the Free Software Foundation (the "GPL"). -+ * -+ * This program is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License version 2 (GPLv2) for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * version 2 (GPLv2) along with this source code. -+ */ -+ -+#include <linux/device.h> -+#include <linux/module.h> -+#include <linux/platform_device.h> -+#include <linux/of.h> -+#include "spi-bcm-qspi.h" -+ -+static const struct of_device_id brcmstb_qspi_of_match[] = { -+ { .compatible = "brcm,spi-brcmstb-qspi" }, -+ { .compatible = "brcm,spi-brcmstb-mspi" }, -+ {}, -+}; -+MODULE_DEVICE_TABLE(of, brcmstb_qspi_of_match); -+ -+static int brcmstb_qspi_probe(struct platform_device *pdev) -+{ -+ return bcm_qspi_probe(pdev, NULL); -+} -+ -+static int brcmstb_qspi_remove(struct platform_device *pdev) -+{ -+ return bcm_qspi_remove(pdev); -+} -+ -+static struct platform_driver brcmstb_qspi_driver = { -+ .probe = brcmstb_qspi_probe, -+ .remove = brcmstb_qspi_remove, -+ .driver = { -+ .name = "brcmstb_qspi", -+ .pm = &bcm_qspi_pm_ops, -+ .of_match_table = brcmstb_qspi_of_match, -+ } -+}; -+module_platform_driver(brcmstb_qspi_driver); -+ -+MODULE_LICENSE("GPL v2"); -+MODULE_AUTHOR("Kamal Dasu"); -+MODULE_DESCRIPTION("Broadcom SPI driver for settop SoC"); diff --git a/target/linux/bcm53xx/patches-4.4/083-0003-spi-bcm-qspi-Add-BSPI-spi-nor-flash-controller-drive.patch b/target/linux/bcm53xx/patches-4.4/083-0003-spi-bcm-qspi-Add-BSPI-spi-nor-flash-controller-drive.patch deleted file mode 100644 index f5f2ba0112..0000000000 --- a/target/linux/bcm53xx/patches-4.4/083-0003-spi-bcm-qspi-Add-BSPI-spi-nor-flash-controller-drive.patch +++ /dev/null @@ -1,780 +0,0 @@ -From 4e3b2d236fe00f0e0b6c45dcb3cc7d84c2316424 Mon Sep 17 00:00:00 2001 -From: Kamal Dasu <kdasu.kdev@gmail.com> -Date: Wed, 24 Aug 2016 18:04:25 -0400 -Subject: [PATCH] spi: bcm-qspi: Add BSPI spi-nor flash controller driver - -This change implements BSPI driver for Broadcom BRCMSTB, NS2, -NSP SoCs works in combination with the MSPI controller driver -and implements flash read acceleration and implements the -spi_flash_read() method. Both MSPI and BSPI controllers are -needed to access spi-nor flash. - -Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com> -Signed-off-by: Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com> -Signed-off-by: Mark Brown <broonie@kernel.org> ---- - drivers/spi/spi-bcm-qspi.c | 603 ++++++++++++++++++++++++++++++++++++++++++++- - drivers/spi/spi-bcm-qspi.h | 20 ++ - 2 files changed, 620 insertions(+), 3 deletions(-) - ---- a/drivers/spi/spi-bcm-qspi.c -+++ b/drivers/spi/spi-bcm-qspi.c -@@ -38,6 +38,60 @@ - - #define DRIVER_NAME "bcm_qspi" - -+ -+/* BSPI register offsets */ -+#define BSPI_REVISION_ID 0x000 -+#define BSPI_SCRATCH 0x004 -+#define BSPI_MAST_N_BOOT_CTRL 0x008 -+#define BSPI_BUSY_STATUS 0x00c -+#define BSPI_INTR_STATUS 0x010 -+#define BSPI_B0_STATUS 0x014 -+#define BSPI_B0_CTRL 0x018 -+#define BSPI_B1_STATUS 0x01c -+#define BSPI_B1_CTRL 0x020 -+#define BSPI_STRAP_OVERRIDE_CTRL 0x024 -+#define BSPI_FLEX_MODE_ENABLE 0x028 -+#define BSPI_BITS_PER_CYCLE 0x02c -+#define BSPI_BITS_PER_PHASE 0x030 -+#define BSPI_CMD_AND_MODE_BYTE 0x034 -+#define BSPI_BSPI_FLASH_UPPER_ADDR_BYTE 0x038 -+#define BSPI_BSPI_XOR_VALUE 0x03c -+#define BSPI_BSPI_XOR_ENABLE 0x040 -+#define BSPI_BSPI_PIO_MODE_ENABLE 0x044 -+#define BSPI_BSPI_PIO_IODIR 0x048 -+#define BSPI_BSPI_PIO_DATA 0x04c -+ -+/* RAF register offsets */ -+#define BSPI_RAF_START_ADDR 0x100 -+#define BSPI_RAF_NUM_WORDS 0x104 -+#define BSPI_RAF_CTRL 0x108 -+#define BSPI_RAF_FULLNESS 0x10c -+#define BSPI_RAF_WATERMARK 0x110 -+#define BSPI_RAF_STATUS 0x114 -+#define BSPI_RAF_READ_DATA 0x118 -+#define BSPI_RAF_WORD_CNT 0x11c -+#define BSPI_RAF_CURR_ADDR 0x120 -+ -+/* Override mode masks */ -+#define BSPI_STRAP_OVERRIDE_CTRL_OVERRIDE BIT(0) -+#define BSPI_STRAP_OVERRIDE_CTRL_DATA_DUAL BIT(1) -+#define BSPI_STRAP_OVERRIDE_CTRL_ADDR_4BYTE BIT(2) -+#define BSPI_STRAP_OVERRIDE_CTRL_DATA_QUAD BIT(3) -+#define BSPI_STRAP_OVERRIDE_CTRL_ENDAIN_MODE BIT(4) -+ -+#define BSPI_ADDRLEN_3BYTES 3 -+#define BSPI_ADDRLEN_4BYTES 4 -+ -+#define BSPI_RAF_STATUS_FIFO_EMPTY_MASK BIT(1) -+ -+#define BSPI_RAF_CTRL_START_MASK BIT(0) -+#define BSPI_RAF_CTRL_CLEAR_MASK BIT(1) -+ -+#define BSPI_BPP_MODE_SELECT_MASK BIT(8) -+#define BSPI_BPP_ADDR_SELECT_MASK BIT(16) -+ -+#define BSPI_READ_LENGTH 256 -+ - /* MSPI register offsets */ - #define MSPI_SPCR0_LSB 0x000 - #define MSPI_SPCR0_MSB 0x004 -@@ -108,8 +162,16 @@ struct bcm_qspi_parms { - u8 bits_per_word; - }; - -+struct bcm_xfer_mode { -+ bool flex_mode; -+ unsigned int width; -+ unsigned int addrlen; -+ unsigned int hp; -+}; -+ - enum base_type { - MSPI, -+ BSPI, - CHIP_SELECT, - BASEMAX, - }; -@@ -140,13 +202,28 @@ struct bcm_qspi { - struct bcm_qspi_parms last_parms; - struct qspi_trans trans_pos; - int curr_cs; -+ int bspi_maj_rev; -+ int bspi_min_rev; -+ int bspi_enabled; -+ struct spi_flash_read_message *bspi_rf_msg; -+ u32 bspi_rf_msg_idx; -+ u32 bspi_rf_msg_len; -+ u32 bspi_rf_msg_status; -+ struct bcm_xfer_mode xfer_mode; - u32 s3_strap_override_ctrl; -+ bool bspi_mode; - bool big_endian; - int num_irqs; - struct bcm_qspi_dev_id *dev_ids; - struct completion mspi_done; -+ struct completion bspi_done; - }; - -+static inline bool has_bspi(struct bcm_qspi *qspi) -+{ -+ return qspi->bspi_mode; -+} -+ - /* Read qspi controller register*/ - static inline u32 bcm_qspi_read(struct bcm_qspi *qspi, enum base_type type, - unsigned int offset) -@@ -161,6 +238,300 @@ static inline void bcm_qspi_write(struct - bcm_qspi_writel(qspi->big_endian, data, qspi->base[type] + offset); - } - -+/* BSPI helpers */ -+static int bcm_qspi_bspi_busy_poll(struct bcm_qspi *qspi) -+{ -+ int i; -+ -+ /* this should normally finish within 10us */ -+ for (i = 0; i < 1000; i++) { -+ if (!(bcm_qspi_read(qspi, BSPI, BSPI_BUSY_STATUS) & 1)) -+ return 0; -+ udelay(1); -+ } -+ dev_warn(&qspi->pdev->dev, "timeout waiting for !busy_status\n"); -+ return -EIO; -+} -+ -+static inline bool bcm_qspi_bspi_ver_three(struct bcm_qspi *qspi) -+{ -+ if (qspi->bspi_maj_rev < 4) -+ return true; -+ return false; -+} -+ -+static void bcm_qspi_bspi_flush_prefetch_buffers(struct bcm_qspi *qspi) -+{ -+ bcm_qspi_bspi_busy_poll(qspi); -+ /* Force rising edge for the b0/b1 'flush' field */ -+ bcm_qspi_write(qspi, BSPI, BSPI_B0_CTRL, 1); -+ bcm_qspi_write(qspi, BSPI, BSPI_B1_CTRL, 1); -+ bcm_qspi_write(qspi, BSPI, BSPI_B0_CTRL, 0); -+ bcm_qspi_write(qspi, BSPI, BSPI_B1_CTRL, 0); -+} -+ -+static int bcm_qspi_bspi_lr_is_fifo_empty(struct bcm_qspi *qspi) -+{ -+ return (bcm_qspi_read(qspi, BSPI, BSPI_RAF_STATUS) & -+ BSPI_RAF_STATUS_FIFO_EMPTY_MASK); -+} -+ -+static inline u32 bcm_qspi_bspi_lr_read_fifo(struct bcm_qspi *qspi) -+{ -+ u32 data = bcm_qspi_read(qspi, BSPI, BSPI_RAF_READ_DATA); -+ -+ /* BSPI v3 LR is LE only, convert data to host endianness */ -+ if (bcm_qspi_bspi_ver_three(qspi)) -+ data = le32_to_cpu(data); -+ -+ return data; -+} -+ -+static inline void bcm_qspi_bspi_lr_start(struct bcm_qspi *qspi) -+{ -+ bcm_qspi_bspi_busy_poll(qspi); -+ bcm_qspi_write(qspi, BSPI, BSPI_RAF_CTRL, -+ BSPI_RAF_CTRL_START_MASK); -+} -+ -+static inline void bcm_qspi_bspi_lr_clear(struct bcm_qspi *qspi) -+{ -+ bcm_qspi_write(qspi, BSPI, BSPI_RAF_CTRL, -+ BSPI_RAF_CTRL_CLEAR_MASK); -+ bcm_qspi_bspi_flush_prefetch_buffers(qspi); -+} -+ -+static void bcm_qspi_bspi_lr_data_read(struct bcm_qspi *qspi) -+{ -+ u32 *buf = (u32 *)qspi->bspi_rf_msg->buf; -+ u32 data = 0; -+ -+ dev_dbg(&qspi->pdev->dev, "xfer %p rx %p rxlen %d\n", qspi->bspi_rf_msg, -+ qspi->bspi_rf_msg->buf, qspi->bspi_rf_msg_len); -+ while (!bcm_qspi_bspi_lr_is_fifo_empty(qspi)) { -+ data = bcm_qspi_bspi_lr_read_fifo(qspi); -+ if (likely(qspi->bspi_rf_msg_len >= 4) && -+ IS_ALIGNED((uintptr_t)buf, 4)) { -+ buf[qspi->bspi_rf_msg_idx++] = data; -+ qspi->bspi_rf_msg_len -= 4; -+ } else { -+ /* Read out remaining bytes, make sure*/ -+ u8 *cbuf = (u8 *)&buf[qspi->bspi_rf_msg_idx]; -+ -+ data = cpu_to_le32(data); -+ while (qspi->bspi_rf_msg_len) { -+ *cbuf++ = (u8)data; -+ data >>= 8; -+ qspi->bspi_rf_msg_len--; -+ } -+ } -+ } -+} -+ -+static void bcm_qspi_bspi_set_xfer_params(struct bcm_qspi *qspi, u8 cmd_byte, -+ int bpp, int bpc, int flex_mode) -+{ -+ bcm_qspi_write(qspi, BSPI, BSPI_FLEX_MODE_ENABLE, 0); -+ bcm_qspi_write(qspi, BSPI, BSPI_BITS_PER_CYCLE, bpc); -+ bcm_qspi_write(qspi, BSPI, BSPI_BITS_PER_PHASE, bpp); -+ bcm_qspi_write(qspi, BSPI, BSPI_CMD_AND_MODE_BYTE, cmd_byte); -+ bcm_qspi_write(qspi, BSPI, BSPI_FLEX_MODE_ENABLE, flex_mode); -+} -+ -+static int bcm_qspi_bspi_set_flex_mode(struct bcm_qspi *qspi, int width, -+ int addrlen, int hp) -+{ -+ int bpc = 0, bpp = 0; -+ u8 command = SPINOR_OP_READ_FAST; -+ int flex_mode = 1, rv = 0; -+ bool spans_4byte = false; -+ -+ dev_dbg(&qspi->pdev->dev, "set flex mode w %x addrlen %x hp %d\n", -+ width, addrlen, hp); -+ -+ if (addrlen == BSPI_ADDRLEN_4BYTES) { -+ bpp = BSPI_BPP_ADDR_SELECT_MASK; -+ spans_4byte = true; -+ } -+ -+ bpp |= 8; -+ -+ switch (width) { -+ case SPI_NBITS_SINGLE: -+ if (addrlen == BSPI_ADDRLEN_3BYTES) -+ /* default mode, does not need flex_cmd */ -+ flex_mode = 0; -+ else -+ command = SPINOR_OP_READ4_FAST; -+ break; -+ case SPI_NBITS_DUAL: -+ bpc = 0x00000001; -+ if (hp) { -+ bpc |= 0x00010100; /* address and mode are 2-bit */ -+ bpp = BSPI_BPP_MODE_SELECT_MASK; -+ command = OPCODE_DIOR; -+ if (spans_4byte) -+ command = OPCODE_DIOR_4B; -+ } else { -+ command = SPINOR_OP_READ_1_1_2; -+ if (spans_4byte) -+ command = SPINOR_OP_READ4_1_1_2; -+ } -+ break; -+ case SPI_NBITS_QUAD: -+ bpc = 0x00000002; -+ if (hp) { -+ bpc |= 0x00020200; /* address and mode are 4-bit */ -+ bpp = 4; /* dummy cycles */ -+ bpp |= BSPI_BPP_ADDR_SELECT_MASK; -+ command = OPCODE_QIOR; -+ if (spans_4byte) -+ command = OPCODE_QIOR_4B; -+ } else { -+ command = SPINOR_OP_READ_1_1_4; -+ if (spans_4byte) -+ command = SPINOR_OP_READ4_1_1_4; -+ } -+ break; -+ default: -+ rv = -EINVAL; -+ break; -+ } -+ -+ if (rv == 0) -+ bcm_qspi_bspi_set_xfer_params(qspi, command, bpp, bpc, -+ flex_mode); -+ -+ return rv; -+} -+ -+static int bcm_qspi_bspi_set_override(struct bcm_qspi *qspi, int width, -+ int addrlen, int hp) -+{ -+ u32 data = bcm_qspi_read(qspi, BSPI, BSPI_STRAP_OVERRIDE_CTRL); -+ -+ dev_dbg(&qspi->pdev->dev, "set override mode w %x addrlen %x hp %d\n", -+ width, addrlen, hp); -+ -+ switch (width) { -+ case SPI_NBITS_SINGLE: -+ /* clear quad/dual mode */ -+ data &= ~(BSPI_STRAP_OVERRIDE_CTRL_DATA_QUAD | -+ BSPI_STRAP_OVERRIDE_CTRL_DATA_DUAL); -+ break; -+ -+ case SPI_NBITS_QUAD: -+ /* clear dual mode and set quad mode */ -+ data &= ~BSPI_STRAP_OVERRIDE_CTRL_DATA_DUAL; -+ data |= BSPI_STRAP_OVERRIDE_CTRL_DATA_QUAD; -+ break; -+ case SPI_NBITS_DUAL: -+ /* clear quad mode set dual mode */ -+ data &= ~BSPI_STRAP_OVERRIDE_CTRL_DATA_QUAD; -+ data |= BSPI_STRAP_OVERRIDE_CTRL_DATA_DUAL; -+ break; -+ default: -+ return -EINVAL; -+ } -+ -+ if (addrlen == BSPI_ADDRLEN_4BYTES) -+ /* set 4byte mode*/ -+ data |= BSPI_STRAP_OVERRIDE_CTRL_ADDR_4BYTE; -+ else -+ /* clear 4 byte mode */ -+ data &= ~BSPI_STRAP_OVERRIDE_CTRL_ADDR_4BYTE; -+ -+ /* set the override mode */ -+ data |= BSPI_STRAP_OVERRIDE_CTRL_OVERRIDE; -+ bcm_qspi_write(qspi, BSPI, BSPI_STRAP_OVERRIDE_CTRL, data); -+ bcm_qspi_bspi_set_xfer_params(qspi, SPINOR_OP_READ_FAST, 0, 0, 0); -+ -+ return 0; -+} -+ -+static int bcm_qspi_bspi_set_mode(struct bcm_qspi *qspi, -+ int width, int addrlen, int hp) -+{ -+ int error = 0; -+ -+ /* default mode */ -+ qspi->xfer_mode.flex_mode = true; -+ -+ if (!bcm_qspi_bspi_ver_three(qspi)) { -+ u32 val, mask; -+ -+ val = bcm_qspi_read(qspi, BSPI, BSPI_STRAP_OVERRIDE_CTRL); -+ mask = BSPI_STRAP_OVERRIDE_CTRL_OVERRIDE; -+ if (val & mask || qspi->s3_strap_override_ctrl & mask) { -+ qspi->xfer_mode.flex_mode = false; -+ bcm_qspi_write(qspi, BSPI, BSPI_FLEX_MODE_ENABLE, -+ 0); -+ -+ if ((val | qspi->s3_strap_override_ctrl) & -+ BSPI_STRAP_OVERRIDE_CTRL_DATA_DUAL) -+ width = SPI_NBITS_DUAL; -+ else if ((val | qspi->s3_strap_override_ctrl) & -+ BSPI_STRAP_OVERRIDE_CTRL_DATA_QUAD) -+ width = SPI_NBITS_QUAD; -+ -+ error = bcm_qspi_bspi_set_override(qspi, width, addrlen, -+ hp); -+ } -+ } -+ -+ if (qspi->xfer_mode.flex_mode) -+ error = bcm_qspi_bspi_set_flex_mode(qspi, width, addrlen, hp); -+ -+ if (error) { -+ dev_warn(&qspi->pdev->dev, -+ "INVALID COMBINATION: width=%d addrlen=%d hp=%d\n", -+ width, addrlen, hp); -+ } else if (qspi->xfer_mode.width != width || -+ qspi->xfer_mode.addrlen != addrlen || -+ qspi->xfer_mode.hp != hp) { -+ qspi->xfer_mode.width = width; -+ qspi->xfer_mode.addrlen = addrlen; -+ qspi->xfer_mode.hp = hp; -+ dev_dbg(&qspi->pdev->dev, -+ "cs:%d %d-lane output, %d-byte address%s\n", -+ qspi->curr_cs, -+ qspi->xfer_mode.width, -+ qspi->xfer_mode.addrlen, -+ qspi->xfer_mode.hp != -1 ? ", hp mode" : ""); -+ } -+ -+ return error; -+} -+ -+static void bcm_qspi_enable_bspi(struct bcm_qspi *qspi) -+{ -+ if (!has_bspi(qspi) || (qspi->bspi_enabled)) -+ return; -+ -+ qspi->bspi_enabled = 1; -+ if ((bcm_qspi_read(qspi, BSPI, BSPI_MAST_N_BOOT_CTRL) & 1) == 0) -+ return; -+ -+ bcm_qspi_bspi_flush_prefetch_buffers(qspi); -+ udelay(1); -+ bcm_qspi_write(qspi, BSPI, BSPI_MAST_N_BOOT_CTRL, 0); -+ udelay(1); -+} -+ -+static void bcm_qspi_disable_bspi(struct bcm_qspi *qspi) -+{ -+ if (!has_bspi(qspi) || (!qspi->bspi_enabled)) -+ return; -+ -+ qspi->bspi_enabled = 0; -+ if ((bcm_qspi_read(qspi, BSPI, BSPI_MAST_N_BOOT_CTRL) & 1)) -+ return; -+ -+ bcm_qspi_bspi_busy_poll(qspi); -+ bcm_qspi_write(qspi, BSPI, BSPI_MAST_N_BOOT_CTRL, 1); -+ udelay(1); -+} -+ - static void bcm_qspi_chip_select(struct bcm_qspi *qspi, int cs) - { - u32 data = 0; -@@ -298,6 +669,8 @@ static void read_from_hw(struct bcm_qspi - struct qspi_trans tp; - int slot; - -+ bcm_qspi_disable_bspi(qspi); -+ - if (slots > MSPI_NUM_CDRAM) { - /* should never happen */ - dev_err(&qspi->pdev->dev, "%s: too many slots!\n", __func__); -@@ -368,6 +741,7 @@ static int write_to_hw(struct bcm_qspi * - int slot = 0, tstatus = 0; - u32 mspi_cdram = 0; - -+ bcm_qspi_disable_bspi(qspi); - tp = qspi->trans_pos; - bcm_qspi_update_parms(qspi, spi, tp.trans); - -@@ -414,6 +788,9 @@ static int write_to_hw(struct bcm_qspi * - write_cdram_slot(qspi, slot - 1, mspi_cdram); - } - -+ if (has_bspi(qspi)) -+ bcm_qspi_write(qspi, MSPI, MSPI_WRITE_LOCK, 1); -+ - /* Must flush previous writes before starting MSPI operation */ - mb(); - /* Set cont | spe | spifie */ -@@ -423,6 +800,118 @@ done: - return slot; - } - -+static int bcm_qspi_bspi_flash_read(struct spi_device *spi, -+ struct spi_flash_read_message *msg) -+{ -+ struct bcm_qspi *qspi = spi_master_get_devdata(spi->master); -+ u32 addr = 0, len, len_words; -+ int ret = 0; -+ unsigned long timeo = msecs_to_jiffies(100); -+ -+ if (bcm_qspi_bspi_ver_three(qspi)) -+ if (msg->addr_width == BSPI_ADDRLEN_4BYTES) -+ return -EIO; -+ -+ bcm_qspi_chip_select(qspi, spi->chip_select); -+ bcm_qspi_write(qspi, MSPI, MSPI_WRITE_LOCK, 0); -+ -+ /* -+ * when using flex mode mode we need to send -+ * the upper address byte to bspi -+ */ -+ if (bcm_qspi_bspi_ver_three(qspi) == false) { -+ addr = msg->from & 0xff000000; -+ bcm_qspi_write(qspi, BSPI, -+ BSPI_BSPI_FLASH_UPPER_ADDR_BYTE, addr); -+ } -+ -+ if (!qspi->xfer_mode.flex_mode) -+ addr = msg->from; -+ else -+ addr = msg->from & 0x00ffffff; -+ -+ /* set BSPI RAF buffer max read length */ -+ len = msg->len; -+ if (len > BSPI_READ_LENGTH) -+ len = BSPI_READ_LENGTH; -+ -+ if (bcm_qspi_bspi_ver_three(qspi) == true) -+ addr = (addr + 0xc00000) & 0xffffff; -+ -+ reinit_completion(&qspi->bspi_done); -+ bcm_qspi_enable_bspi(qspi); -+ len_words = (len + 3) >> 2; -+ qspi->bspi_rf_msg = msg; -+ qspi->bspi_rf_msg_status = 0; -+ qspi->bspi_rf_msg_idx = 0; -+ qspi->bspi_rf_msg_len = len; -+ dev_dbg(&qspi->pdev->dev, "bspi xfr addr 0x%x len 0x%x", addr, len); -+ -+ bcm_qspi_write(qspi, BSPI, BSPI_RAF_START_ADDR, addr); -+ bcm_qspi_write(qspi, BSPI, BSPI_RAF_NUM_WORDS, len_words); -+ bcm_qspi_write(qspi, BSPI, BSPI_RAF_WATERMARK, 0); -+ -+ /* Must flush previous writes before starting BSPI operation */ -+ mb(); -+ -+ bcm_qspi_bspi_lr_start(qspi); -+ if (!wait_for_completion_timeout(&qspi->bspi_done, timeo)) { -+ dev_err(&qspi->pdev->dev, "timeout waiting for BSPI\n"); -+ ret = -ETIMEDOUT; -+ } else { -+ /* set the return length for the caller */ -+ msg->retlen = len; -+ } -+ -+ return ret; -+} -+ -+static int bcm_qspi_flash_read(struct spi_device *spi, -+ struct spi_flash_read_message *msg) -+{ -+ struct bcm_qspi *qspi = spi_master_get_devdata(spi->master); -+ int ret = 0; -+ bool mspi_read = false; -+ u32 io_width, addrlen, addr, len; -+ u_char *buf; -+ -+ buf = msg->buf; -+ addr = msg->from; -+ len = msg->len; -+ -+ if (bcm_qspi_bspi_ver_three(qspi) == true) { -+ /* -+ * The address coming into this function is a raw flash offset. -+ * But for BSPI <= V3, we need to convert it to a remapped BSPI -+ * address. If it crosses a 4MB boundary, just revert back to -+ * using MSPI. -+ */ -+ addr = (addr + 0xc00000) & 0xffffff; -+ -+ if ((~ADDR_4MB_MASK & addr) ^ -+ (~ADDR_4MB_MASK & (addr + len - 1))) -+ mspi_read = true; -+ } -+ -+ /* non-aligned and very short transfers are handled by MSPI */ -+ if (!IS_ALIGNED((uintptr_t)addr, 4) || !IS_ALIGNED((uintptr_t)buf, 4) || -+ len < 4) -+ mspi_read = true; -+ -+ if (mspi_read) -+ /* this will make the m25p80 read to fallback to mspi read */ -+ return -EAGAIN; -+ -+ io_width = msg->data_nbits ? msg->data_nbits : SPI_NBITS_SINGLE; -+ addrlen = msg->addr_width; -+ ret = bcm_qspi_bspi_set_mode(qspi, io_width, addrlen, -1); -+ -+ if (!ret) -+ ret = bcm_qspi_bspi_flash_read(spi, msg); -+ -+ return ret; -+} -+ - static int bcm_qspi_transfer_one(struct spi_master *master, - struct spi_device *spi, - struct spi_transfer *trans) -@@ -469,13 +958,76 @@ static irqreturn_t bcm_qspi_mspi_l2_isr( - bcm_qspi_write(qspi, MSPI, MSPI_MSPI_STATUS, status); - complete(&qspi->mspi_done); - return IRQ_HANDLED; -- } else { -- return IRQ_NONE; - } -+ -+ return IRQ_NONE; -+} -+ -+static irqreturn_t bcm_qspi_bspi_lr_l2_isr(int irq, void *dev_id) -+{ -+ struct bcm_qspi_dev_id *qspi_dev_id = dev_id; -+ struct bcm_qspi *qspi = qspi_dev_id->dev; -+ u32 status; -+ -+ if (qspi->bspi_enabled && qspi->bspi_rf_msg) { -+ bcm_qspi_bspi_lr_data_read(qspi); -+ if (qspi->bspi_rf_msg_len == 0) { -+ qspi->bspi_rf_msg = NULL; -+ if (qspi->bspi_rf_msg_status) -+ bcm_qspi_bspi_lr_clear(qspi); -+ else -+ bcm_qspi_bspi_flush_prefetch_buffers(qspi); -+ } -+ } -+ -+ status = (qspi_dev_id->irqp->mask & INTR_BSPI_LR_SESSION_DONE_MASK); -+ if (qspi->bspi_enabled && status && qspi->bspi_rf_msg_len == 0) -+ complete(&qspi->bspi_done); -+ -+ return IRQ_HANDLED; -+} -+ -+static irqreturn_t bcm_qspi_bspi_lr_err_l2_isr(int irq, void *dev_id) -+{ -+ struct bcm_qspi_dev_id *qspi_dev_id = dev_id; -+ struct bcm_qspi *qspi = qspi_dev_id->dev; -+ -+ dev_err(&qspi->pdev->dev, "BSPI INT error\n"); -+ qspi->bspi_rf_msg_status = -EIO; -+ complete(&qspi->bspi_done); -+ return IRQ_HANDLED; - } - - static const struct bcm_qspi_irq qspi_irq_tab[] = { - { -+ .irq_name = "spi_lr_fullness_reached", -+ .irq_handler = bcm_qspi_bspi_lr_l2_isr, -+ .mask = INTR_BSPI_LR_FULLNESS_REACHED_MASK, -+ }, -+ { -+ .irq_name = "spi_lr_session_aborted", -+ .irq_handler = bcm_qspi_bspi_lr_err_l2_isr, -+ .mask = INTR_BSPI_LR_SESSION_ABORTED_MASK, -+ }, -+ { -+ .irq_name = "spi_lr_impatient", -+ .irq_handler = bcm_qspi_bspi_lr_err_l2_isr, -+ .mask = INTR_BSPI_LR_IMPATIENT_MASK, -+ }, -+ { -+ .irq_name = "spi_lr_session_done", -+ .irq_handler = bcm_qspi_bspi_lr_l2_isr, -+ .mask = INTR_BSPI_LR_SESSION_DONE_MASK, -+ }, -+#ifdef QSPI_INT_DEBUG -+ /* this interrupt is for debug purposes only, dont request irq */ -+ { -+ .irq_name = "spi_lr_overread", -+ .irq_handler = bcm_qspi_bspi_lr_err_l2_isr, -+ .mask = INTR_BSPI_LR_OVERREAD_MASK, -+ }, -+#endif -+ { - .irq_name = "mspi_done", - .irq_handler = bcm_qspi_mspi_l2_isr, - .mask = INTR_MSPI_DONE_MASK, -@@ -487,6 +1039,24 @@ static const struct bcm_qspi_irq qspi_ir - }, - }; - -+static void bcm_qspi_bspi_init(struct bcm_qspi *qspi) -+{ -+ u32 val = 0; -+ -+ val = bcm_qspi_read(qspi, BSPI, BSPI_REVISION_ID); -+ qspi->bspi_maj_rev = (val >> 8) & 0xff; -+ qspi->bspi_min_rev = val & 0xff; -+ if (!(bcm_qspi_bspi_ver_three(qspi))) { -+ /* Force mapping of BSPI address -> flash offset */ -+ bcm_qspi_write(qspi, BSPI, BSPI_BSPI_XOR_VALUE, 0); -+ bcm_qspi_write(qspi, BSPI, BSPI_BSPI_XOR_ENABLE, 1); -+ } -+ qspi->bspi_enabled = 1; -+ bcm_qspi_disable_bspi(qspi); -+ bcm_qspi_write(qspi, BSPI, BSPI_B0_CTRL, 0); -+ bcm_qspi_write(qspi, BSPI, BSPI_B1_CTRL, 0); -+} -+ - static void bcm_qspi_hw_init(struct bcm_qspi *qspi) - { - struct bcm_qspi_parms parms; -@@ -501,11 +1071,17 @@ static void bcm_qspi_hw_init(struct bcm_ - parms.bits_per_word = 8; - parms.speed_hz = qspi->max_speed_hz; - bcm_qspi_hw_set_parms(qspi, &parms); -+ -+ if (has_bspi(qspi)) -+ bcm_qspi_bspi_init(qspi); - } - - static void bcm_qspi_hw_uninit(struct bcm_qspi *qspi) - { - bcm_qspi_write(qspi, MSPI, MSPI_SPCR2, 0); -+ if (has_bspi(qspi)) -+ bcm_qspi_write(qspi, MSPI, MSPI_WRITE_LOCK, 0); -+ - } - - static const struct of_device_id bcm_qspi_of_match[] = { -@@ -515,7 +1091,7 @@ static const struct of_device_id bcm_qsp - MODULE_DEVICE_TABLE(of, bcm_qspi_of_match); - - int bcm_qspi_probe(struct platform_device *pdev, -- struct bcm_qspi_soc_intc *soc) -+ struct bcm_qspi_soc_intc *soc_intc) - { - struct device *dev = &pdev->dev; - struct bcm_qspi *qspi; -@@ -549,6 +1125,7 @@ int bcm_qspi_probe(struct platform_devic - master->mode_bits = SPI_CPHA | SPI_CPOL | SPI_RX_DUAL | SPI_RX_QUAD; - master->setup = bcm_qspi_setup; - master->transfer_one = bcm_qspi_transfer_one; -+ master->spi_flash_read = bcm_qspi_flash_read; - master->cleanup = bcm_qspi_cleanup; - master->dev.of_node = dev->of_node; - master->num_chipselect = NUM_CHIPSELECT; -@@ -573,6 +1150,20 @@ int bcm_qspi_probe(struct platform_devic - goto qspi_probe_err; - } - -+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "bspi"); -+ if (res) { -+ qspi->base[BSPI] = devm_ioremap_resource(dev, res); -+ if (IS_ERR(qspi->base[BSPI])) { -+ ret = PTR_ERR(qspi->base[BSPI]); -+ goto qspi_probe_err; -+ } -+ qspi->bspi_mode = true; -+ } else { -+ qspi->bspi_mode = false; -+ } -+ -+ dev_info(dev, "using %smspi mode\n", qspi->bspi_mode ? "bspi-" : ""); -+ - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cs_reg"); - if (res) { - qspi->base[CHIP_SELECT] = devm_ioremap_resource(dev, res); -@@ -635,9 +1226,15 @@ int bcm_qspi_probe(struct platform_devic - - bcm_qspi_hw_init(qspi); - init_completion(&qspi->mspi_done); -+ init_completion(&qspi->bspi_done); - qspi->curr_cs = -1; - - platform_set_drvdata(pdev, qspi); -+ -+ qspi->xfer_mode.width = -1; -+ qspi->xfer_mode.addrlen = -1; -+ qspi->xfer_mode.hp = -1; -+ - ret = devm_spi_register_master(&pdev->dev, master); - if (ret < 0) { - dev_err(dev, "can't register master\n"); ---- a/drivers/spi/spi-bcm-qspi.h -+++ b/drivers/spi/spi-bcm-qspi.h -@@ -20,6 +20,26 @@ - #include <linux/types.h> - #include <linux/io.h> - -+/* BSPI interrupt masks */ -+#define INTR_BSPI_LR_OVERREAD_MASK BIT(4) -+#define INTR_BSPI_LR_SESSION_DONE_MASK BIT(3) -+#define INTR_BSPI_LR_IMPATIENT_MASK BIT(2) -+#define INTR_BSPI_LR_SESSION_ABORTED_MASK BIT(1) -+#define INTR_BSPI_LR_FULLNESS_REACHED_MASK BIT(0) -+ -+#define BSPI_LR_INTERRUPTS_DATA \ -+ (INTR_BSPI_LR_SESSION_DONE_MASK | \ -+ INTR_BSPI_LR_FULLNESS_REACHED_MASK) -+ -+#define BSPI_LR_INTERRUPTS_ERROR \ -+ (INTR_BSPI_LR_OVERREAD_MASK | \ -+ INTR_BSPI_LR_IMPATIENT_MASK | \ -+ INTR_BSPI_LR_SESSION_ABORTED_MASK) -+ -+#define BSPI_LR_INTERRUPTS_ALL \ -+ (BSPI_LR_INTERRUPTS_ERROR | \ -+ BSPI_LR_INTERRUPTS_DATA) -+ - /* MSPI Interrupt masks */ - #define INTR_MSPI_HALTED_MASK BIT(6) - #define INTR_MSPI_DONE_MASK BIT(5) diff --git a/target/linux/bcm53xx/patches-4.4/083-0004-spi-bcm-qspi-don-t-include-linux-mtd-cfi.h.patch b/target/linux/bcm53xx/patches-4.4/083-0004-spi-bcm-qspi-don-t-include-linux-mtd-cfi.h.patch deleted file mode 100644 index f90c02bba0..0000000000 --- a/target/linux/bcm53xx/patches-4.4/083-0004-spi-bcm-qspi-don-t-include-linux-mtd-cfi.h.patch +++ /dev/null @@ -1,27 +0,0 @@ -From c0a75d072a501effd66d3392ada8d3f4283b87ef Mon Sep 17 00:00:00 2001 -From: Arnd Bergmann <arnd@arndb.de> -Date: Thu, 15 Sep 2016 17:40:15 +0200 -Subject: [PATCH] spi: bcm-qspi: don't include linux/mtd/cfi.h - -The header isn't actually needed here, but including it leads -to a build warning when CONFIG_MTD is disabled: - -include/linux/mtd/cfi.h:76:2: #warning No CONFIG_MTD_CFI_Ix selected. No NOR chip support can work. [-Werror=cpp] - -Fixes: fa236a7ef240 (spi: bcm-qspi: Add Broadcom MSPI driver) -Signed-off-by: Arnd Bergmann <arnd@arndb.de> -Signed-off-by: Mark Brown <broonie@kernel.org> ---- - drivers/spi/spi-bcm-qspi.c | 1 - - 1 file changed, 1 deletion(-) - ---- a/drivers/spi/spi-bcm-qspi.c -+++ b/drivers/spi/spi-bcm-qspi.c -@@ -25,7 +25,6 @@ - #include <linux/ioport.h> - #include <linux/kernel.h> - #include <linux/module.h> --#include <linux/mtd/cfi.h> - #include <linux/mtd/spi-nor.h> - #include <linux/of.h> - #include <linux/of_irq.h> diff --git a/target/linux/bcm53xx/patches-4.4/083-0005-spi-bcm-qspi-fix-suspend-resume-ifdef.patch b/target/linux/bcm53xx/patches-4.4/083-0005-spi-bcm-qspi-fix-suspend-resume-ifdef.patch deleted file mode 100644 index aad22d2ee8..0000000000 --- a/target/linux/bcm53xx/patches-4.4/083-0005-spi-bcm-qspi-fix-suspend-resume-ifdef.patch +++ /dev/null @@ -1,63 +0,0 @@ -From a0319f8b12c0fb9800da61f4cba9bd6fd80e37a4 Mon Sep 17 00:00:00 2001 -From: Arnd Bergmann <arnd@arndb.de> -Date: Thu, 15 Sep 2016 17:46:53 +0200 -Subject: [PATCH] spi: bcm-qspi: fix suspend/resume #ifdef - -The two power management functions are define inside of an #ifdef -but referenced unconditionally, which is obviously broken when -CONFIG_PM_SLEEP is not set: - -drivers/spi/spi-bcm-qspi.c:1300:13: error: 'bcm_qspi_suspend' undeclared here (not in a function) -drivers/spi/spi-bcm-qspi.c:1301:13: error: 'bcm_qspi_resume' undeclared here (not in a function) - -This replaces the #ifdef with a __maybe_unused annotation that lets -the compiler figure out whether to drop the functions itself, -and uses SIMPLE_DEV_PM_OPS() to refer to the functions. - -This will also fill the freeze/thaw/poweroff/restore callback -pointers in addition to suspend/resume, but as far as I can tell, -this is what we want. - -Signed-off-by: Arnd Bergmann <arnd@arndb.de> -Fixes: fa236a7ef240 ("spi: bcm-qspi: Add Broadcom MSPI driver") -Signed-off-by: Mark Brown <broonie@kernel.org> ---- - drivers/spi/spi-bcm-qspi.c | 12 ++++-------- - 1 file changed, 4 insertions(+), 8 deletions(-) - ---- a/drivers/spi/spi-bcm-qspi.c -+++ b/drivers/spi/spi-bcm-qspi.c -@@ -1268,8 +1268,7 @@ int bcm_qspi_remove(struct platform_devi - /* function to be called by SoC specific platform driver remove() */ - EXPORT_SYMBOL_GPL(bcm_qspi_remove); - --#ifdef CONFIG_PM_SLEEP --static int bcm_qspi_suspend(struct device *dev) -+static int __maybe_unused bcm_qspi_suspend(struct device *dev) - { - struct bcm_qspi *qspi = dev_get_drvdata(dev); - -@@ -1280,7 +1279,7 @@ static int bcm_qspi_suspend(struct devic - return 0; - }; - --static int bcm_qspi_resume(struct device *dev) -+static int __maybe_unused bcm_qspi_resume(struct device *dev) - { - struct bcm_qspi *qspi = dev_get_drvdata(dev); - int ret = 0; -@@ -1293,12 +1292,9 @@ static int bcm_qspi_resume(struct device - - return ret; - } --#endif /* CONFIG_PM_SLEEP */ - --const struct dev_pm_ops bcm_qspi_pm_ops = { -- .suspend = bcm_qspi_suspend, -- .resume = bcm_qspi_resume, --}; -+SIMPLE_DEV_PM_OPS(bcm_qspi_pm_ops, bcm_qspi_suspend, bcm_qspi_resume); -+ - /* pm_ops to be called by SoC specific platform driver */ - EXPORT_SYMBOL_GPL(bcm_qspi_pm_ops); - diff --git a/target/linux/bcm53xx/patches-4.4/083-0006-spi-bcm-qspi-Fix-return-value-check-in-bcm_qspi_prob.patch b/target/linux/bcm53xx/patches-4.4/083-0006-spi-bcm-qspi-Fix-return-value-check-in-bcm_qspi_prob.patch deleted file mode 100644 index d71b2f4599..0000000000 --- a/target/linux/bcm53xx/patches-4.4/083-0006-spi-bcm-qspi-Fix-return-value-check-in-bcm_qspi_prob.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 3bf3eb2b95aaf18eff3080444b24673cda8ff9a2 Mon Sep 17 00:00:00 2001 -From: Wei Yongjun <weiyongjun1@huawei.com> -Date: Fri, 16 Sep 2016 13:45:17 +0000 -Subject: [PATCH] spi: bcm-qspi: Fix return value check in bcm_qspi_probe() - -In case of error, the function kcalloc() returns NULL pointer -not ERR_PTR(). The IS_ERR() test in the return value check -should be replaced with NULL test. - -Fixes: fa236a7ef240 ("spi: bcm-qspi: Add Broadcom MSPI driver") -Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> -Signed-off-by: Mark Brown <broonie@kernel.org> ---- - drivers/spi/spi-bcm-qspi.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - ---- a/drivers/spi/spi-bcm-qspi.c -+++ b/drivers/spi/spi-bcm-qspi.c -@@ -1174,8 +1174,8 @@ int bcm_qspi_probe(struct platform_devic - - qspi->dev_ids = kcalloc(num_irqs, sizeof(struct bcm_qspi_dev_id), - GFP_KERNEL); -- if (IS_ERR(qspi->dev_ids)) { -- ret = PTR_ERR(qspi->dev_ids); -+ if (!qspi->dev_ids) { -+ ret = -ENOMEM; - goto qspi_probe_err; - } - diff --git a/target/linux/bcm53xx/patches-4.4/083-0007-spi-bcm-qspi-Fix-error-return-code-in-bcm_qspi_probe.patch b/target/linux/bcm53xx/patches-4.4/083-0007-spi-bcm-qspi-Fix-error-return-code-in-bcm_qspi_probe.patch deleted file mode 100644 index a15deb5749..0000000000 --- a/target/linux/bcm53xx/patches-4.4/083-0007-spi-bcm-qspi-Fix-error-return-code-in-bcm_qspi_probe.patch +++ /dev/null @@ -1,32 +0,0 @@ -From 71b8f350a4f03730f3024bfa7dc2414904a21bcb Mon Sep 17 00:00:00 2001 -From: Wei Yongjun <weiyongjun1@huawei.com> -Date: Fri, 16 Sep 2016 14:00:19 +0000 -Subject: [PATCH] spi: bcm-qspi: Fix error return code in bcm_qspi_probe() - -Fix to return a negative error code from the error handling -case instead of 0, as done elsewhere in this function. - -Fixes: fa236a7ef240 ("spi: bcm-qspi: Add Broadcom MSPI driver") -Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> -Signed-off-by: Mark Brown <broonie@kernel.org> ---- - drivers/spi/spi-bcm-qspi.c | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/drivers/spi/spi-bcm-qspi.c -+++ b/drivers/spi/spi-bcm-qspi.c -@@ -1205,12 +1205,14 @@ int bcm_qspi_probe(struct platform_devic - - if (!num_ints) { - dev_err(&pdev->dev, "no IRQs registered, cannot init driver\n"); -+ ret = -EINVAL; - goto qspi_probe_err; - } - - qspi->clk = devm_clk_get(&pdev->dev, NULL); - if (IS_ERR(qspi->clk)) { - dev_warn(dev, "unable to get clock\n"); -+ ret = PTR_ERR(qspi->clk); - goto qspi_probe_err; - } - diff --git a/target/linux/bcm53xx/patches-4.4/083-0008-spi-iproc-qspi-Add-Broadcom-iProc-SoCs-support.patch b/target/linux/bcm53xx/patches-4.4/083-0008-spi-iproc-qspi-Add-Broadcom-iProc-SoCs-support.patch deleted file mode 100644 index 836d629c15..0000000000 --- a/target/linux/bcm53xx/patches-4.4/083-0008-spi-iproc-qspi-Add-Broadcom-iProc-SoCs-support.patch +++ /dev/null @@ -1,452 +0,0 @@ -From cc20a38612dbc87dc7396affc9758e3bfbe92340 Mon Sep 17 00:00:00 2001 -From: Kamal Dasu <kdasu.kdev@gmail.com> -Date: Wed, 24 Aug 2016 18:04:29 -0400 -Subject: [PATCH] spi: iproc-qspi: Add Broadcom iProc SoCs support - -This spi driver uses the common spi-bcm-qspi driver and implements iProc -SoCs specific interrupt controller. The common driver now calls the SoC -handlers when present. Adding support for both muxed l1 and unmuxed interrupt -sources. - -Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com> -Signed-off-by: Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com> -Signed-off-by: Mark Brown <broonie@kernel.org> ---- - drivers/spi/Makefile | 2 +- - drivers/spi/spi-bcm-qspi.c | 97 ++++++++++++++++++++++++- - drivers/spi/spi-bcm-qspi.h | 34 ++++++++- - drivers/spi/spi-iproc-qspi.c | 163 +++++++++++++++++++++++++++++++++++++++++++ - 4 files changed, 291 insertions(+), 5 deletions(-) - create mode 100644 drivers/spi/spi-iproc-qspi.c - ---- a/drivers/spi/Makefile -+++ b/drivers/spi/Makefile -@@ -19,7 +19,7 @@ obj-$(CONFIG_SPI_BCM2835AUX) += spi-bcm - obj-$(CONFIG_SPI_BCM53XX) += spi-bcm53xx.o - obj-$(CONFIG_SPI_BCM63XX) += spi-bcm63xx.o - obj-$(CONFIG_SPI_BCM63XX_HSSPI) += spi-bcm63xx-hsspi.o --obj-$(CONFIG_SPI_BCM_QSPI) += spi-brcmstb-qspi.o spi-bcm-qspi.o -+obj-$(CONFIG_SPI_BCM_QSPI) += spi-iproc-qspi.o spi-brcmstb-qspi.o spi-bcm-qspi.o - obj-$(CONFIG_SPI_BFIN5XX) += spi-bfin5xx.o - obj-$(CONFIG_SPI_ADI_V3) += spi-adi-v3.o - obj-$(CONFIG_SPI_BFIN_SPORT) += spi-bfin-sport.o ---- a/drivers/spi/spi-bcm-qspi.c -+++ b/drivers/spi/spi-bcm-qspi.c -@@ -175,9 +175,15 @@ enum base_type { - BASEMAX, - }; - -+enum irq_source { -+ SINGLE_L2, -+ MUXED_L1, -+}; -+ - struct bcm_qspi_irq { - const char *irq_name; - const irq_handler_t irq_handler; -+ int irq_source; - u32 mask; - }; - -@@ -198,6 +204,10 @@ struct bcm_qspi { - u32 base_clk; - u32 max_speed_hz; - void __iomem *base[BASEMAX]; -+ -+ /* Some SoCs provide custom interrupt status register(s) */ -+ struct bcm_qspi_soc_intc *soc_intc; -+ - struct bcm_qspi_parms last_parms; - struct qspi_trans trans_pos; - int curr_cs; -@@ -806,6 +816,7 @@ static int bcm_qspi_bspi_flash_read(stru - u32 addr = 0, len, len_words; - int ret = 0; - unsigned long timeo = msecs_to_jiffies(100); -+ struct bcm_qspi_soc_intc *soc_intc = qspi->soc_intc; - - if (bcm_qspi_bspi_ver_three(qspi)) - if (msg->addr_width == BSPI_ADDRLEN_4BYTES) -@@ -850,6 +861,15 @@ static int bcm_qspi_bspi_flash_read(stru - bcm_qspi_write(qspi, BSPI, BSPI_RAF_NUM_WORDS, len_words); - bcm_qspi_write(qspi, BSPI, BSPI_RAF_WATERMARK, 0); - -+ if (qspi->soc_intc) { -+ /* -+ * clear soc MSPI and BSPI interrupts and enable -+ * BSPI interrupts. -+ */ -+ soc_intc->bcm_qspi_int_ack(soc_intc, MSPI_BSPI_DONE); -+ soc_intc->bcm_qspi_int_set(soc_intc, BSPI_DONE, true); -+ } -+ - /* Must flush previous writes before starting BSPI operation */ - mb(); - -@@ -952,9 +972,12 @@ static irqreturn_t bcm_qspi_mspi_l2_isr( - u32 status = bcm_qspi_read(qspi, MSPI, MSPI_MSPI_STATUS); - - if (status & MSPI_MSPI_STATUS_SPIF) { -+ struct bcm_qspi_soc_intc *soc_intc = qspi->soc_intc; - /* clear interrupt */ - status &= ~MSPI_MSPI_STATUS_SPIF; - bcm_qspi_write(qspi, MSPI, MSPI_MSPI_STATUS, status); -+ if (qspi->soc_intc) -+ soc_intc->bcm_qspi_int_ack(soc_intc, MSPI_DONE); - complete(&qspi->mspi_done); - return IRQ_HANDLED; - } -@@ -966,20 +989,33 @@ static irqreturn_t bcm_qspi_bspi_lr_l2_i - { - struct bcm_qspi_dev_id *qspi_dev_id = dev_id; - struct bcm_qspi *qspi = qspi_dev_id->dev; -- u32 status; -+ struct bcm_qspi_soc_intc *soc_intc = qspi->soc_intc; -+ u32 status = qspi_dev_id->irqp->mask; - - if (qspi->bspi_enabled && qspi->bspi_rf_msg) { - bcm_qspi_bspi_lr_data_read(qspi); - if (qspi->bspi_rf_msg_len == 0) { - qspi->bspi_rf_msg = NULL; -+ if (qspi->soc_intc) { -+ /* disable soc BSPI interrupt */ -+ soc_intc->bcm_qspi_int_set(soc_intc, BSPI_DONE, -+ false); -+ /* indicate done */ -+ status = INTR_BSPI_LR_SESSION_DONE_MASK; -+ } -+ - if (qspi->bspi_rf_msg_status) - bcm_qspi_bspi_lr_clear(qspi); - else - bcm_qspi_bspi_flush_prefetch_buffers(qspi); - } -+ -+ if (qspi->soc_intc) -+ /* clear soc BSPI interrupt */ -+ soc_intc->bcm_qspi_int_ack(soc_intc, BSPI_DONE); - } - -- status = (qspi_dev_id->irqp->mask & INTR_BSPI_LR_SESSION_DONE_MASK); -+ status &= INTR_BSPI_LR_SESSION_DONE_MASK; - if (qspi->bspi_enabled && status && qspi->bspi_rf_msg_len == 0) - complete(&qspi->bspi_done); - -@@ -990,13 +1026,39 @@ static irqreturn_t bcm_qspi_bspi_lr_err_ - { - struct bcm_qspi_dev_id *qspi_dev_id = dev_id; - struct bcm_qspi *qspi = qspi_dev_id->dev; -+ struct bcm_qspi_soc_intc *soc_intc = qspi->soc_intc; - - dev_err(&qspi->pdev->dev, "BSPI INT error\n"); - qspi->bspi_rf_msg_status = -EIO; -+ if (qspi->soc_intc) -+ /* clear soc interrupt */ -+ soc_intc->bcm_qspi_int_ack(soc_intc, BSPI_ERR); -+ - complete(&qspi->bspi_done); - return IRQ_HANDLED; - } - -+static irqreturn_t bcm_qspi_l1_isr(int irq, void *dev_id) -+{ -+ struct bcm_qspi_dev_id *qspi_dev_id = dev_id; -+ struct bcm_qspi *qspi = qspi_dev_id->dev; -+ struct bcm_qspi_soc_intc *soc_intc = qspi->soc_intc; -+ irqreturn_t ret = IRQ_NONE; -+ -+ if (soc_intc) { -+ u32 status = soc_intc->bcm_qspi_get_int_status(soc_intc); -+ -+ if (status & MSPI_DONE) -+ ret = bcm_qspi_mspi_l2_isr(irq, dev_id); -+ else if (status & BSPI_DONE) -+ ret = bcm_qspi_bspi_lr_l2_isr(irq, dev_id); -+ else if (status & BSPI_ERR) -+ ret = bcm_qspi_bspi_lr_err_l2_isr(irq, dev_id); -+ } -+ -+ return ret; -+} -+ - static const struct bcm_qspi_irq qspi_irq_tab[] = { - { - .irq_name = "spi_lr_fullness_reached", -@@ -1036,6 +1098,13 @@ static const struct bcm_qspi_irq qspi_ir - .irq_handler = bcm_qspi_mspi_l2_isr, - .mask = INTR_MSPI_HALTED_MASK, - }, -+ { -+ /* single muxed L1 interrupt source */ -+ .irq_name = "spi_l1_intr", -+ .irq_handler = bcm_qspi_l1_isr, -+ .irq_source = MUXED_L1, -+ .mask = QSPI_INTERRUPTS_ALL, -+ }, - }; - - static void bcm_qspi_bspi_init(struct bcm_qspi *qspi) -@@ -1182,7 +1251,13 @@ int bcm_qspi_probe(struct platform_devic - for (val = 0; val < num_irqs; val++) { - irq = -1; - name = qspi_irq_tab[val].irq_name; -- irq = platform_get_irq_byname(pdev, name); -+ if (qspi_irq_tab[val].irq_source == SINGLE_L2) { -+ /* get the l2 interrupts */ -+ irq = platform_get_irq_byname(pdev, name); -+ } else if (!num_ints && soc_intc) { -+ /* all mspi, bspi intrs muxed to one L1 intr */ -+ irq = platform_get_irq(pdev, 0); -+ } - - if (irq >= 0) { - ret = devm_request_irq(&pdev->dev, irq, -@@ -1209,6 +1284,17 @@ int bcm_qspi_probe(struct platform_devic - goto qspi_probe_err; - } - -+ /* -+ * Some SoCs integrate spi controller (e.g., its interrupt bits) -+ * in specific ways -+ */ -+ if (soc_intc) { -+ qspi->soc_intc = soc_intc; -+ soc_intc->bcm_qspi_int_set(soc_intc, MSPI_DONE, true); -+ } else { -+ qspi->soc_intc = NULL; -+ } -+ - qspi->clk = devm_clk_get(&pdev->dev, NULL); - if (IS_ERR(qspi->clk)) { - dev_warn(dev, "unable to get clock\n"); -@@ -1288,6 +1374,11 @@ static int __maybe_unused bcm_qspi_resum - - bcm_qspi_hw_init(qspi); - bcm_qspi_chip_select(qspi, qspi->curr_cs); -+ if (qspi->soc_intc) -+ /* enable MSPI interrupt */ -+ qspi->soc_intc->bcm_qspi_int_set(qspi->soc_intc, MSPI_DONE, -+ true); -+ - ret = clk_enable(qspi->clk); - if (!ret) - spi_master_resume(qspi->master); ---- a/drivers/spi/spi-bcm-qspi.h -+++ b/drivers/spi/spi-bcm-qspi.h -@@ -48,10 +48,26 @@ - (INTR_MSPI_DONE_MASK | \ - INTR_MSPI_HALTED_MASK) - -+#define QSPI_INTERRUPTS_ALL \ -+ (MSPI_INTERRUPTS_ALL | \ -+ BSPI_LR_INTERRUPTS_ALL) -+ - struct platform_device; - struct dev_pm_ops; - --struct bcm_qspi_soc_intc; -+enum { -+ MSPI_DONE = 0x1, -+ BSPI_DONE = 0x2, -+ BSPI_ERR = 0x4, -+ MSPI_BSPI_DONE = 0x7 -+}; -+ -+struct bcm_qspi_soc_intc { -+ void (*bcm_qspi_int_ack)(struct bcm_qspi_soc_intc *soc_intc, int type); -+ void (*bcm_qspi_int_set)(struct bcm_qspi_soc_intc *soc_intc, int type, -+ bool en); -+ u32 (*bcm_qspi_get_int_status)(struct bcm_qspi_soc_intc *soc_intc); -+}; - - /* Read controller register*/ - static inline u32 bcm_qspi_readl(bool be, void __iomem *addr) -@@ -72,6 +88,22 @@ static inline void bcm_qspi_writel(bool - writel_relaxed(data, addr); - } - -+static inline u32 get_qspi_mask(int type) -+{ -+ switch (type) { -+ case MSPI_DONE: -+ return INTR_MSPI_DONE_MASK; -+ case BSPI_DONE: -+ return BSPI_LR_INTERRUPTS_ALL; -+ case MSPI_BSPI_DONE: -+ return QSPI_INTERRUPTS_ALL; -+ case BSPI_ERR: -+ return BSPI_LR_INTERRUPTS_ERROR; -+ } -+ -+ return 0; -+} -+ - /* The common driver functions to be called by the SoC platform driver */ - int bcm_qspi_probe(struct platform_device *pdev, - struct bcm_qspi_soc_intc *soc_intc); ---- /dev/null -+++ b/drivers/spi/spi-iproc-qspi.c -@@ -0,0 +1,163 @@ -+/* -+ * Copyright 2016 Broadcom Limited -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#include <linux/device.h> -+#include <linux/io.h> -+#include <linux/ioport.h> -+#include <linux/module.h> -+#include <linux/of.h> -+#include <linux/of_address.h> -+#include <linux/platform_device.h> -+#include <linux/slab.h> -+ -+#include "spi-bcm-qspi.h" -+ -+#define INTR_BASE_BIT_SHIFT 0x02 -+#define INTR_COUNT 0x07 -+ -+struct bcm_iproc_intc { -+ struct bcm_qspi_soc_intc soc_intc; -+ struct platform_device *pdev; -+ void __iomem *int_reg; -+ void __iomem *int_status_reg; -+ spinlock_t soclock; -+ bool big_endian; -+}; -+ -+static u32 bcm_iproc_qspi_get_l2_int_status(struct bcm_qspi_soc_intc *soc_intc) -+{ -+ struct bcm_iproc_intc *priv = -+ container_of(soc_intc, struct bcm_iproc_intc, soc_intc); -+ void __iomem *mmio = priv->int_status_reg; -+ int i; -+ u32 val = 0, sts = 0; -+ -+ for (i = 0; i < INTR_COUNT; i++) { -+ if (bcm_qspi_readl(priv->big_endian, mmio + (i * 4))) -+ val |= 1UL << i; -+ } -+ -+ if (val & INTR_MSPI_DONE_MASK) -+ sts |= MSPI_DONE; -+ -+ if (val & BSPI_LR_INTERRUPTS_ALL) -+ sts |= BSPI_DONE; -+ -+ if (val & BSPI_LR_INTERRUPTS_ERROR) -+ sts |= BSPI_ERR; -+ -+ return sts; -+} -+ -+static void bcm_iproc_qspi_int_ack(struct bcm_qspi_soc_intc *soc_intc, int type) -+{ -+ struct bcm_iproc_intc *priv = -+ container_of(soc_intc, struct bcm_iproc_intc, soc_intc); -+ void __iomem *mmio = priv->int_status_reg; -+ u32 mask = get_qspi_mask(type); -+ int i; -+ -+ for (i = 0; i < INTR_COUNT; i++) { -+ if (mask & (1UL << i)) -+ bcm_qspi_writel(priv->big_endian, 1, mmio + (i * 4)); -+ } -+} -+ -+static void bcm_iproc_qspi_int_set(struct bcm_qspi_soc_intc *soc_intc, int type, -+ bool en) -+{ -+ struct bcm_iproc_intc *priv = -+ container_of(soc_intc, struct bcm_iproc_intc, soc_intc); -+ void __iomem *mmio = priv->int_reg; -+ u32 mask = get_qspi_mask(type); -+ u32 val; -+ unsigned long flags; -+ -+ spin_lock_irqsave(&priv->soclock, flags); -+ -+ val = bcm_qspi_readl(priv->big_endian, mmio); -+ -+ if (en) -+ val = val | (mask << INTR_BASE_BIT_SHIFT); -+ else -+ val = val & ~(mask << INTR_BASE_BIT_SHIFT); -+ -+ bcm_qspi_writel(priv->big_endian, val, mmio); -+ -+ spin_unlock_irqrestore(&priv->soclock, flags); -+} -+ -+static int bcm_iproc_probe(struct platform_device *pdev) -+{ -+ struct device *dev = &pdev->dev; -+ struct bcm_iproc_intc *priv; -+ struct bcm_qspi_soc_intc *soc_intc; -+ struct resource *res; -+ -+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); -+ if (!priv) -+ return -ENOMEM; -+ soc_intc = &priv->soc_intc; -+ priv->pdev = pdev; -+ -+ spin_lock_init(&priv->soclock); -+ -+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "intr_regs"); -+ priv->int_reg = devm_ioremap_resource(dev, res); -+ if (IS_ERR(priv->int_reg)) -+ return PTR_ERR(priv->int_reg); -+ -+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, -+ "intr_status_reg"); -+ priv->int_status_reg = devm_ioremap_resource(dev, res); -+ if (IS_ERR(priv->int_status_reg)) -+ return PTR_ERR(priv->int_status_reg); -+ -+ priv->big_endian = of_device_is_big_endian(dev->of_node); -+ -+ bcm_iproc_qspi_int_ack(soc_intc, MSPI_BSPI_DONE); -+ bcm_iproc_qspi_int_set(soc_intc, MSPI_BSPI_DONE, false); -+ -+ soc_intc->bcm_qspi_int_ack = bcm_iproc_qspi_int_ack; -+ soc_intc->bcm_qspi_int_set = bcm_iproc_qspi_int_set; -+ soc_intc->bcm_qspi_get_int_status = bcm_iproc_qspi_get_l2_int_status; -+ -+ return bcm_qspi_probe(pdev, soc_intc); -+} -+ -+static int bcm_iproc_remove(struct platform_device *pdev) -+{ -+ return bcm_qspi_remove(pdev); -+} -+ -+static const struct of_device_id bcm_iproc_of_match[] = { -+ { .compatible = "brcm,spi-nsp-qspi" }, -+ { .compatible = "brcm,spi-ns2-qspi" }, -+ {}, -+}; -+MODULE_DEVICE_TABLE(of, bcm_iproc_of_match); -+ -+static struct platform_driver bcm_iproc_driver = { -+ .probe = bcm_iproc_probe, -+ .remove = bcm_iproc_remove, -+ .driver = { -+ .name = "bcm_iproc", -+ .pm = &bcm_qspi_pm_ops, -+ .of_match_table = bcm_iproc_of_match, -+ } -+}; -+module_platform_driver(bcm_iproc_driver); -+ -+MODULE_LICENSE("GPL v2"); -+MODULE_AUTHOR("Kamal Dasu"); -+MODULE_DESCRIPTION("SPI flash driver for Broadcom iProc SoCs"); diff --git a/target/linux/bcm53xx/patches-4.4/084-0001-spi-bcm53xx-set-of_node-to-let-DT-specify-device-s.patch b/target/linux/bcm53xx/patches-4.4/084-0001-spi-bcm53xx-set-of_node-to-let-DT-specify-device-s.patch deleted file mode 100644 index 39ebf7286b..0000000000 --- a/target/linux/bcm53xx/patches-4.4/084-0001-spi-bcm53xx-set-of_node-to-let-DT-specify-device-s.patch +++ /dev/null @@ -1,52 +0,0 @@ -From 78d759daceaf0a7058f37c4142bdca9948b6d987 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Thu, 29 Dec 2016 17:27:55 +0100 -Subject: [PATCH] spi: bcm53xx: set of_node to let DT specify device(s) -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Setting of_node of master's dev seems to be a common way of letting it -work nicely with DT. This allows specifying device there instead of -hardcoding one in the driver code. - -This was successfully tested with commit 1b47b98acce2 ("ARM: BCM5301X: -Add DT entry for SPI controller and NOR flash") - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Mark Brown <broonie@kernel.org> ---- - drivers/spi/spi-bcm53xx.c | 8 +------- - 1 file changed, 1 insertion(+), 7 deletions(-) - ---- a/drivers/spi/spi-bcm53xx.c -+++ b/drivers/spi/spi-bcm53xx.c -@@ -275,10 +275,6 @@ static int bcm53xxspi_flash_read(struct - * BCMA - **************************************************/ - --static struct spi_board_info bcm53xx_info = { -- .modalias = "bcm53xxspiflash", --}; -- - static const struct bcma_device_id bcm53xxspi_bcma_tbl[] = { - BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_NS_QSPI, BCMA_ANY_REV, BCMA_ANY_CLASS), - {}, -@@ -311,6 +307,7 @@ static int bcm53xxspi_bcma_probe(struct - b53spi->bspi = true; - bcm53xxspi_disable_bspi(b53spi); - -+ master->dev.of_node = dev->of_node; - master->transfer_one = bcm53xxspi_transfer_one; - if (b53spi->mmio_base) - master->spi_flash_read = bcm53xxspi_flash_read; -@@ -324,9 +321,6 @@ static int bcm53xxspi_bcma_probe(struct - return err; - } - -- /* Broadcom SoCs (at least with the CC rev 42) use SPI for flash only */ -- spi_new_device(master, &bcm53xx_info); -- - return 0; - } - diff --git a/target/linux/bcm53xx/patches-4.4/084-0002-spi-bcm53xx-re-license-code-to-the-GPL-v2.patch b/target/linux/bcm53xx/patches-4.4/084-0002-spi-bcm53xx-re-license-code-to-the-GPL-v2.patch deleted file mode 100644 index 37fb6df2b9..0000000000 --- a/target/linux/bcm53xx/patches-4.4/084-0002-spi-bcm53xx-re-license-code-to-the-GPL-v2.patch +++ /dev/null @@ -1,50 +0,0 @@ -From e360e72e715f228e426edf0fc99ffa34027ab0ad Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Thu, 29 Dec 2016 20:13:13 +0100 -Subject: [PATCH] spi: bcm53xx: (re)license code to the GPL v2 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -My intention was to release this code under GPL v2 license. For some -reason my initial commit 0fc6a323e191 ("spi: bcm53xx: driver for SPI -controller on Broadcom bcma SoC") totally missed licensing info. -MODULE_LICENSE was later added by Axel specifying "GNU Public License -v2 or later". - -This patch clarifies situation by adding a proper header (with Copyright -line) and adjusting MODULE_LICENSE. It should be acked by every driver -contributor. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Acked-by: Nicholas Mc Guire <hofrat@osadl.org> -Reviewed-by: Jingoo Han <jingoohan1@gmail.com> -Acked-by: Jingoo Han <jingoohan1@gmail.com> -Acked-by: Joe Perches <joe@perches.com> -Acked-by: Axel Lin <axel.lin@ingics.com> -Acked-by: Vaishali Thakkar <vaishali.thakkar@oracle.com> -Signed-off-by: Mark Brown <broonie@kernel.org> ---- - drivers/spi/spi-bcm53xx.c | 10 +++++++++- - 1 file changed, 9 insertions(+), 1 deletion(-) - ---- a/drivers/spi/spi-bcm53xx.c -+++ b/drivers/spi/spi-bcm53xx.c -@@ -1,3 +1,11 @@ -+/* -+ * Copyright (C) 2014-2016 Rafał Miłecki <rafal@milecki.pl> -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ - #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt - - #include <linux/kernel.h> -@@ -355,4 +363,4 @@ module_exit(bcm53xxspi_module_exit); - - MODULE_DESCRIPTION("Broadcom BCM53xx SPI Controller driver"); - MODULE_AUTHOR("Rafał Miłecki <zajec5@gmail.com>"); --MODULE_LICENSE("GPL"); -+MODULE_LICENSE("GPL v2"); diff --git a/target/linux/bcm53xx/patches-4.4/084-0003-spi-bcm53xx-simplify-reading-SPI-data.patch b/target/linux/bcm53xx/patches-4.4/084-0003-spi-bcm53xx-simplify-reading-SPI-data.patch deleted file mode 100644 index ee377c491f..0000000000 --- a/target/linux/bcm53xx/patches-4.4/084-0003-spi-bcm53xx-simplify-reading-SPI-data.patch +++ /dev/null @@ -1,107 +0,0 @@ -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Fri, 29 Dec 2017 14:44:09 +0100 -Subject: [PATCH] spi: bcm53xx: simplify reading SPI data -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This commit makes transfer function use spi_transfer_is_last to -determine if currently processed transfer is the last one. Thanks to -that we finally set hardware registers properly and it makes controller -behave the way it's expected to. - -This allows simplifying read function which can now simply start reading -from the slot 0 instead of the last saved offset. It has been -successfully tested using spi_write_then_read. - -Moreover this change fixes handling messages with two writing transfers. -It's important for SPI flash devices as their drivers commonly use one -transfer for a command and another one for data. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> ---- - drivers/spi/spi-bcm53xx.c | 26 ++++++++++---------------- - 1 file changed, 10 insertions(+), 16 deletions(-) - ---- a/drivers/spi/spi-bcm53xx.c -+++ b/drivers/spi/spi-bcm53xx.c -@@ -27,8 +27,6 @@ struct bcm53xxspi { - struct bcma_device *core; - struct spi_master *master; - void __iomem *mmio_base; -- -- size_t read_offset; - bool bspi; /* Boot SPI mode with memory mapping */ - }; - -@@ -172,8 +170,6 @@ static void bcm53xxspi_buf_write(struct - - if (!cont) - bcm53xxspi_write(b53spi, B53SPI_MSPI_WRITE_LOCK, 0); -- -- b53spi->read_offset = len; - } - - static void bcm53xxspi_buf_read(struct bcm53xxspi *b53spi, u8 *r_buf, -@@ -182,10 +178,10 @@ static void bcm53xxspi_buf_read(struct b - u32 tmp; - int i; - -- for (i = 0; i < b53spi->read_offset + len; i++) { -+ for (i = 0; i < len; i++) { - tmp = B53SPI_CDRAM_CONT | B53SPI_CDRAM_PCS_DISABLE_ALL | - B53SPI_CDRAM_PCS_DSCK; -- if (!cont && i == b53spi->read_offset + len - 1) -+ if (!cont && i == len - 1) - tmp &= ~B53SPI_CDRAM_CONT; - tmp &= ~0x1; - /* Command Register File */ -@@ -194,8 +190,7 @@ static void bcm53xxspi_buf_read(struct b - - /* Set queue pointers */ - bcm53xxspi_write(b53spi, B53SPI_MSPI_NEWQP, 0); -- bcm53xxspi_write(b53spi, B53SPI_MSPI_ENDQP, -- b53spi->read_offset + len - 1); -+ bcm53xxspi_write(b53spi, B53SPI_MSPI_ENDQP, len - 1); - - if (cont) - bcm53xxspi_write(b53spi, B53SPI_MSPI_WRITE_LOCK, 1); -@@ -214,13 +209,11 @@ static void bcm53xxspi_buf_read(struct b - bcm53xxspi_write(b53spi, B53SPI_MSPI_WRITE_LOCK, 0); - - for (i = 0; i < len; ++i) { -- int offset = b53spi->read_offset + i; -+ u16 reg = B53SPI_MSPI_RXRAM + 4 * (1 + i * 2); - - /* Data stored in the transmit register file LSB */ -- r_buf[i] = (u8)bcm53xxspi_read(b53spi, B53SPI_MSPI_RXRAM + 4 * (1 + offset * 2)); -+ r_buf[i] = (u8)bcm53xxspi_read(b53spi, reg); - } -- -- b53spi->read_offset = 0; - } - - static int bcm53xxspi_transfer_one(struct spi_master *master, -@@ -238,7 +231,8 @@ static int bcm53xxspi_transfer_one(struc - left = t->len; - while (left) { - size_t to_write = min_t(size_t, 16, left); -- bool cont = left - to_write > 0; -+ bool cont = !spi_transfer_is_last(master, t) || -+ left - to_write > 0; - - bcm53xxspi_buf_write(b53spi, buf, to_write, cont); - left -= to_write; -@@ -250,9 +244,9 @@ static int bcm53xxspi_transfer_one(struc - buf = (u8 *)t->rx_buf; - left = t->len; - while (left) { -- size_t to_read = min_t(size_t, 16 - b53spi->read_offset, -- left); -- bool cont = left - to_read > 0; -+ size_t to_read = min_t(size_t, 16, left); -+ bool cont = !spi_transfer_is_last(master, t) || -+ left - to_read > 0; - - bcm53xxspi_buf_read(b53spi, buf, to_read, cont); - left -= to_read; diff --git a/target/linux/bcm53xx/patches-4.4/085-PCI-iproc-Hide-CONFIG_PCIE_IPROC.patch b/target/linux/bcm53xx/patches-4.4/085-PCI-iproc-Hide-CONFIG_PCIE_IPROC.patch deleted file mode 100644 index 1d06d98a7c..0000000000 --- a/target/linux/bcm53xx/patches-4.4/085-PCI-iproc-Hide-CONFIG_PCIE_IPROC.patch +++ /dev/null @@ -1,42 +0,0 @@ -From c1b98e41b356a1807d7083d958790da2027c0d9d Mon Sep 17 00:00:00 2001 -From: Arnd Bergmann <arnd@arndb.de> -Date: Tue, 24 Nov 2015 15:28:48 -0600 -Subject: [PATCH] PCI: iproc: Hide CONFIG_PCIE_IPROC - -PCIE_IPROC_BCMA does not require CONFIG_OF in Kconfig, but -CONFIG_PCIE_IPROC does, so we can get a warning when building for an ARM -platform without DT support: - - warning: (PCIE_IPROC_PLATFORM && PCIE_IPROC_BCMA) selects PCIE_IPROC which has unmet direct dependencies (PCI && OF && (ARM || ARM64)) - -It turns out that CONFIG_PCIE_IPROC never needs to be enabled by a user -anyway, we can simply rely on it being selected implictly through either -PCIE_IPROC_PLATFORM or PCIE_IPROC_BCMA. - -Fixes: 4785ffbdc9b5 ("PCI: iproc: Add BCMA PCIe driver") -Signed-off-by: Arnd Bergmann <arnd@arndb.de> -Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> -Acked-by: Hauke Mehrtens <hauke@hauke-m.de> ---- - drivers/pci/host/Kconfig | 8 +++----- - 1 file changed, 3 insertions(+), 5 deletions(-) - ---- a/drivers/pci/host/Kconfig -+++ b/drivers/pci/host/Kconfig -@@ -119,13 +119,11 @@ config PCI_VERSATILE - depends on ARCH_VERSATILE - - config PCIE_IPROC -- tristate "Broadcom iProc PCIe controller" -- depends on OF && (ARM || ARM64) -- default n -+ tristate - help - This enables the iProc PCIe core controller support for Broadcom's -- iProc family of SoCs. An appropriate bus interface driver also needs -- to be enabled -+ iProc family of SoCs. An appropriate bus interface driver needs -+ to be enabled to select this. - - config PCIE_IPROC_PLATFORM - tristate "Broadcom iProc PCIe platform bus driver" diff --git a/target/linux/bcm53xx/patches-4.4/086-PCI-iproc-Do-not-use-0x-in-front-of-pap.patch b/target/linux/bcm53xx/patches-4.4/086-PCI-iproc-Do-not-use-0x-in-front-of-pap.patch deleted file mode 100644 index 5736af80e7..0000000000 --- a/target/linux/bcm53xx/patches-4.4/086-PCI-iproc-Do-not-use-0x-in-front-of-pap.patch +++ /dev/null @@ -1,27 +0,0 @@ -From 57303e92f48a0e307fd86977ec9be5aa6a7ea681 Mon Sep 17 00:00:00 2001 -From: "Dmitry V. Krivenok" <krivenok.dmitry@gmail.com> -Date: Mon, 30 Nov 2015 23:45:49 +0300 -Subject: [PATCH] PCI: iproc: Do not use 0x in front of %pap - -The "%pap" format adds a "0x" prefix, so using "0x%pap" results in output -of "0x0x...". Drop the "0x" prefix in the format string. - -[bhelgaas: changelog] -Signed-off-by: Dmitry V. Krivenok <krivenok.dmitry@gmail.com> -Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> -Acked-by: Ray Jui <rjui@broadcom.com> ---- - drivers/pci/host/pcie-iproc.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/pci/host/pcie-iproc.c -+++ b/drivers/pci/host/pcie-iproc.c -@@ -245,7 +245,7 @@ static int iproc_pcie_setup_ob(struct ip - - if (size > max_size) { - dev_err(pcie->dev, -- "res size 0x%pap exceeds max supported size 0x%llx\n", -+ "res size %pap exceeds max supported size 0x%llx\n", - &size, max_size); - return -EINVAL; - } diff --git a/target/linux/bcm53xx/patches-4.4/087-0001-PCI-iproc-Update-iProc-PCIe-device-tree-binding.patch b/target/linux/bcm53xx/patches-4.4/087-0001-PCI-iproc-Update-iProc-PCIe-device-tree-binding.patch deleted file mode 100644 index b5e5675c6e..0000000000 --- a/target/linux/bcm53xx/patches-4.4/087-0001-PCI-iproc-Update-iProc-PCIe-device-tree-binding.patch +++ /dev/null @@ -1,30 +0,0 @@ -From e8b8318de645c04f8600cb5af6f6773a1878ee9d Mon Sep 17 00:00:00 2001 -From: Ray Jui <rjui@broadcom.com> -Date: Fri, 4 Dec 2015 09:34:58 -0800 -Subject: [PATCH 1/5] PCI: iproc: Update iProc PCIe device tree binding - -Add a new compatible string "brcm,iproc-pcie-paxc", for PAXC-based iProc -PCIe root complex. A PAXC-based PCIe root complex is connected to emulated -endpoint devices internal to the ASIC. - -Signed-off-by: Ray Jui <rjui@broadcom.com> -Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> -Reviewed-by: Scott Branden <sbranden@broadcom.com> ---- - Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt | 5 ++++- - 1 file changed, 4 insertions(+), 1 deletion(-) - ---- a/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt -+++ b/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt -@@ -1,7 +1,10 @@ - * Broadcom iProc PCIe controller with the platform bus interface - - Required properties: --- compatible: Must be "brcm,iproc-pcie" -+- compatible: Must be "brcm,iproc-pcie" for PAXB, or "brcm,iproc-pcie-paxc" -+ for PAXC. PAXB-based root complex is used for external endpoint devices. -+ PAXC-based root complex is connected to emulated endpoint devices -+ internal to the ASIC - - reg: base address and length of the PCIe controller I/O register space - - #interrupt-cells: set to <1> - - interrupt-map-mask and interrupt-map, standard PCI properties to define the diff --git a/target/linux/bcm53xx/patches-4.4/087-0002-PCI-iproc-Add-PAXC-interface-support.patch b/target/linux/bcm53xx/patches-4.4/087-0002-PCI-iproc-Add-PAXC-interface-support.patch deleted file mode 100644 index b011328761..0000000000 --- a/target/linux/bcm53xx/patches-4.4/087-0002-PCI-iproc-Add-PAXC-interface-support.patch +++ /dev/null @@ -1,429 +0,0 @@ -From 943ebae781f519ecfecbfa1b997f15f59116e41d Mon Sep 17 00:00:00 2001 -From: Ray Jui <rjui@broadcom.com> -Date: Fri, 4 Dec 2015 09:34:59 -0800 -Subject: [PATCH 2/5] PCI: iproc: Add PAXC interface support - -Traditionally, all iProc PCIe root complexes use PAXB-based wrapper, with -an integrated on-chip Serdes to support external endpoint devices. On -newer iProc platforms, a PAXC-based wrapper is introduced, for connection -with internally emulated PCIe endpoint devices in the ASIC. - -Add support for PAXC-based iProc PCIe root complex in the iProc PCIe core -driver. This change factors out common logic between PAXB and PAXC, and -uses tables to store register offsets that are different between PAXB and -PAXC. This allows the driver to be scaled to support subsequent PAXC -revisions in the future. - -Signed-off-by: Ray Jui <rjui@broadcom.com> -Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> -Reviewed-by: Scott Branden <sbranden@broadcom.com> ---- - drivers/pci/host/pcie-iproc-platform.c | 24 +++- - drivers/pci/host/pcie-iproc.c | 202 +++++++++++++++++++++++++++------ - drivers/pci/host/pcie-iproc.h | 19 ++++ - 3 files changed, 205 insertions(+), 40 deletions(-) - ---- a/drivers/pci/host/pcie-iproc-platform.c -+++ b/drivers/pci/host/pcie-iproc-platform.c -@@ -26,8 +26,21 @@ - - #include "pcie-iproc.h" - -+static const struct of_device_id iproc_pcie_of_match_table[] = { -+ { -+ .compatible = "brcm,iproc-pcie", -+ .data = (int *)IPROC_PCIE_PAXB, -+ }, { -+ .compatible = "brcm,iproc-pcie-paxc", -+ .data = (int *)IPROC_PCIE_PAXC, -+ }, -+ { /* sentinel */ } -+}; -+MODULE_DEVICE_TABLE(of, iproc_pcie_of_match_table); -+ - static int iproc_pcie_pltfm_probe(struct platform_device *pdev) - { -+ const struct of_device_id *of_id; - struct iproc_pcie *pcie; - struct device_node *np = pdev->dev.of_node; - struct resource reg; -@@ -35,11 +48,16 @@ static int iproc_pcie_pltfm_probe(struct - LIST_HEAD(res); - int ret; - -+ of_id = of_match_device(iproc_pcie_of_match_table, &pdev->dev); -+ if (!of_id) -+ return -EINVAL; -+ - pcie = devm_kzalloc(&pdev->dev, sizeof(struct iproc_pcie), GFP_KERNEL); - if (!pcie) - return -ENOMEM; - - pcie->dev = &pdev->dev; -+ pcie->type = (enum iproc_pcie_type)of_id->data; - platform_set_drvdata(pdev, pcie); - - ret = of_address_to_resource(np, 0, ®); -@@ -114,12 +132,6 @@ static int iproc_pcie_pltfm_remove(struc - return iproc_pcie_remove(pcie); - } - --static const struct of_device_id iproc_pcie_of_match_table[] = { -- { .compatible = "brcm,iproc-pcie", }, -- { /* sentinel */ } --}; --MODULE_DEVICE_TABLE(of, iproc_pcie_of_match_table); -- - static struct platform_driver iproc_pcie_pltfm_driver = { - .driver = { - .name = "iproc-pcie", ---- a/drivers/pci/host/pcie-iproc.c -+++ b/drivers/pci/host/pcie-iproc.c -@@ -30,20 +30,16 @@ - - #include "pcie-iproc.h" - --#define CLK_CONTROL_OFFSET 0x000 - #define EP_PERST_SOURCE_SELECT_SHIFT 2 - #define EP_PERST_SOURCE_SELECT BIT(EP_PERST_SOURCE_SELECT_SHIFT) - #define EP_MODE_SURVIVE_PERST_SHIFT 1 - #define EP_MODE_SURVIVE_PERST BIT(EP_MODE_SURVIVE_PERST_SHIFT) - #define RC_PCIE_RST_OUTPUT_SHIFT 0 - #define RC_PCIE_RST_OUTPUT BIT(RC_PCIE_RST_OUTPUT_SHIFT) -+#define PAXC_RESET_MASK 0x7f - --#define CFG_IND_ADDR_OFFSET 0x120 - #define CFG_IND_ADDR_MASK 0x00001ffc - --#define CFG_IND_DATA_OFFSET 0x124 -- --#define CFG_ADDR_OFFSET 0x1f8 - #define CFG_ADDR_BUS_NUM_SHIFT 20 - #define CFG_ADDR_BUS_NUM_MASK 0x0ff00000 - #define CFG_ADDR_DEV_NUM_SHIFT 15 -@@ -55,12 +51,8 @@ - #define CFG_ADDR_CFG_TYPE_SHIFT 0 - #define CFG_ADDR_CFG_TYPE_MASK 0x00000003 - --#define CFG_DATA_OFFSET 0x1fc -- --#define SYS_RC_INTX_EN 0x330 - #define SYS_RC_INTX_MASK 0xf - --#define PCIE_LINK_STATUS_OFFSET 0xf0c - #define PCIE_PHYLINKUP_SHIFT 3 - #define PCIE_PHYLINKUP BIT(PCIE_PHYLINKUP_SHIFT) - #define PCIE_DL_ACTIVE_SHIFT 2 -@@ -71,12 +63,54 @@ - #define OARR_SIZE_CFG_SHIFT 1 - #define OARR_SIZE_CFG BIT(OARR_SIZE_CFG_SHIFT) - --#define OARR_LO(window) (0xd20 + (window) * 8) --#define OARR_HI(window) (0xd24 + (window) * 8) --#define OMAP_LO(window) (0xd40 + (window) * 8) --#define OMAP_HI(window) (0xd44 + (window) * 8) -- - #define MAX_NUM_OB_WINDOWS 2 -+#define MAX_NUM_PAXC_PF 4 -+ -+#define IPROC_PCIE_REG_INVALID 0xffff -+ -+enum iproc_pcie_reg { -+ IPROC_PCIE_CLK_CTRL = 0, -+ IPROC_PCIE_CFG_IND_ADDR, -+ IPROC_PCIE_CFG_IND_DATA, -+ IPROC_PCIE_CFG_ADDR, -+ IPROC_PCIE_CFG_DATA, -+ IPROC_PCIE_INTX_EN, -+ IPROC_PCIE_OARR_LO, -+ IPROC_PCIE_OARR_HI, -+ IPROC_PCIE_OMAP_LO, -+ IPROC_PCIE_OMAP_HI, -+ IPROC_PCIE_LINK_STATUS, -+}; -+ -+/* iProc PCIe PAXB registers */ -+static const u16 iproc_pcie_reg_paxb[] = { -+ [IPROC_PCIE_CLK_CTRL] = 0x000, -+ [IPROC_PCIE_CFG_IND_ADDR] = 0x120, -+ [IPROC_PCIE_CFG_IND_DATA] = 0x124, -+ [IPROC_PCIE_CFG_ADDR] = 0x1f8, -+ [IPROC_PCIE_CFG_DATA] = 0x1fc, -+ [IPROC_PCIE_INTX_EN] = 0x330, -+ [IPROC_PCIE_OARR_LO] = 0xd20, -+ [IPROC_PCIE_OARR_HI] = 0xd24, -+ [IPROC_PCIE_OMAP_LO] = 0xd40, -+ [IPROC_PCIE_OMAP_HI] = 0xd44, -+ [IPROC_PCIE_LINK_STATUS] = 0xf0c, -+}; -+ -+/* iProc PCIe PAXC v1 registers */ -+static const u16 iproc_pcie_reg_paxc[] = { -+ [IPROC_PCIE_CLK_CTRL] = 0x000, -+ [IPROC_PCIE_CFG_IND_ADDR] = 0x1f0, -+ [IPROC_PCIE_CFG_IND_DATA] = 0x1f4, -+ [IPROC_PCIE_CFG_ADDR] = 0x1f8, -+ [IPROC_PCIE_CFG_DATA] = 0x1fc, -+ [IPROC_PCIE_INTX_EN] = IPROC_PCIE_REG_INVALID, -+ [IPROC_PCIE_OARR_LO] = IPROC_PCIE_REG_INVALID, -+ [IPROC_PCIE_OARR_HI] = IPROC_PCIE_REG_INVALID, -+ [IPROC_PCIE_OMAP_LO] = IPROC_PCIE_REG_INVALID, -+ [IPROC_PCIE_OMAP_HI] = IPROC_PCIE_REG_INVALID, -+ [IPROC_PCIE_LINK_STATUS] = IPROC_PCIE_REG_INVALID, -+}; - - static inline struct iproc_pcie *iproc_data(struct pci_bus *bus) - { -@@ -91,6 +125,65 @@ static inline struct iproc_pcie *iproc_d - return pcie; - } - -+static inline bool iproc_pcie_reg_is_invalid(u16 reg_offset) -+{ -+ return !!(reg_offset == IPROC_PCIE_REG_INVALID); -+} -+ -+static inline u16 iproc_pcie_reg_offset(struct iproc_pcie *pcie, -+ enum iproc_pcie_reg reg) -+{ -+ return pcie->reg_offsets[reg]; -+} -+ -+static inline u32 iproc_pcie_read_reg(struct iproc_pcie *pcie, -+ enum iproc_pcie_reg reg) -+{ -+ u16 offset = iproc_pcie_reg_offset(pcie, reg); -+ -+ if (iproc_pcie_reg_is_invalid(offset)) -+ return 0; -+ -+ return readl(pcie->base + offset); -+} -+ -+static inline void iproc_pcie_write_reg(struct iproc_pcie *pcie, -+ enum iproc_pcie_reg reg, u32 val) -+{ -+ u16 offset = iproc_pcie_reg_offset(pcie, reg); -+ -+ if (iproc_pcie_reg_is_invalid(offset)) -+ return; -+ -+ writel(val, pcie->base + offset); -+} -+ -+static inline void iproc_pcie_ob_write(struct iproc_pcie *pcie, -+ enum iproc_pcie_reg reg, -+ unsigned window, u32 val) -+{ -+ u16 offset = iproc_pcie_reg_offset(pcie, reg); -+ -+ if (iproc_pcie_reg_is_invalid(offset)) -+ return; -+ -+ writel(val, pcie->base + offset + (window * 8)); -+} -+ -+static inline bool iproc_pcie_device_is_valid(struct iproc_pcie *pcie, -+ unsigned int slot, -+ unsigned int fn) -+{ -+ if (slot > 0) -+ return false; -+ -+ /* PAXC can only support limited number of functions */ -+ if (pcie->type == IPROC_PCIE_PAXC && fn >= MAX_NUM_PAXC_PF) -+ return false; -+ -+ return true; -+} -+ - /** - * Note access to the configuration registers are protected at the higher layer - * by 'pci_lock' in drivers/pci/access.c -@@ -104,28 +197,34 @@ static void __iomem *iproc_pcie_map_cfg_ - unsigned fn = PCI_FUNC(devfn); - unsigned busno = bus->number; - u32 val; -+ u16 offset; -+ -+ if (!iproc_pcie_device_is_valid(pcie, slot, fn)) -+ return NULL; - - /* root complex access */ - if (busno == 0) { -- if (slot >= 1) -+ iproc_pcie_write_reg(pcie, IPROC_PCIE_CFG_IND_ADDR, -+ where & CFG_IND_ADDR_MASK); -+ offset = iproc_pcie_reg_offset(pcie, IPROC_PCIE_CFG_IND_DATA); -+ if (iproc_pcie_reg_is_invalid(offset)) - return NULL; -- writel(where & CFG_IND_ADDR_MASK, -- pcie->base + CFG_IND_ADDR_OFFSET); -- return (pcie->base + CFG_IND_DATA_OFFSET); -+ else -+ return (pcie->base + offset); - } - -- if (fn > 1) -- return NULL; -- - /* EP device access */ - val = (busno << CFG_ADDR_BUS_NUM_SHIFT) | - (slot << CFG_ADDR_DEV_NUM_SHIFT) | - (fn << CFG_ADDR_FUNC_NUM_SHIFT) | - (where & CFG_ADDR_REG_NUM_MASK) | - (1 & CFG_ADDR_CFG_TYPE_MASK); -- writel(val, pcie->base + CFG_ADDR_OFFSET); -- -- return (pcie->base + CFG_DATA_OFFSET); -+ iproc_pcie_write_reg(pcie, IPROC_PCIE_CFG_ADDR, val); -+ offset = iproc_pcie_reg_offset(pcie, IPROC_PCIE_CFG_DATA); -+ if (iproc_pcie_reg_is_invalid(offset)) -+ return NULL; -+ else -+ return (pcie->base + offset); - } - - static struct pci_ops iproc_pcie_ops = { -@@ -138,18 +237,29 @@ static void iproc_pcie_reset(struct ipro - { - u32 val; - -+ if (pcie->type == IPROC_PCIE_PAXC) { -+ val = iproc_pcie_read_reg(pcie, IPROC_PCIE_CLK_CTRL); -+ val &= ~PAXC_RESET_MASK; -+ iproc_pcie_write_reg(pcie, IPROC_PCIE_CLK_CTRL, val); -+ udelay(100); -+ val |= PAXC_RESET_MASK; -+ iproc_pcie_write_reg(pcie, IPROC_PCIE_CLK_CTRL, val); -+ udelay(100); -+ return; -+ } -+ - /* - * Select perst_b signal as reset source. Put the device into reset, - * and then bring it out of reset - */ -- val = readl(pcie->base + CLK_CONTROL_OFFSET); -+ val = iproc_pcie_read_reg(pcie, IPROC_PCIE_CLK_CTRL); - val &= ~EP_PERST_SOURCE_SELECT & ~EP_MODE_SURVIVE_PERST & - ~RC_PCIE_RST_OUTPUT; -- writel(val, pcie->base + CLK_CONTROL_OFFSET); -+ iproc_pcie_write_reg(pcie, IPROC_PCIE_CLK_CTRL, val); - udelay(250); - - val |= RC_PCIE_RST_OUTPUT; -- writel(val, pcie->base + CLK_CONTROL_OFFSET); -+ iproc_pcie_write_reg(pcie, IPROC_PCIE_CLK_CTRL, val); - msleep(100); - } - -@@ -160,7 +270,14 @@ static int iproc_pcie_check_link(struct - u16 pos, link_status; - bool link_is_active = false; - -- val = readl(pcie->base + PCIE_LINK_STATUS_OFFSET); -+ /* -+ * PAXC connects to emulated endpoint devices directly and does not -+ * have a Serdes. Therefore skip the link detection logic here. -+ */ -+ if (pcie->type == IPROC_PCIE_PAXC) -+ return 0; -+ -+ val = iproc_pcie_read_reg(pcie, IPROC_PCIE_LINK_STATUS); - if (!(val & PCIE_PHYLINKUP) || !(val & PCIE_DL_ACTIVE)) { - dev_err(pcie->dev, "PHY or data link is INACTIVE!\n"); - return -ENODEV; -@@ -221,7 +338,7 @@ static int iproc_pcie_check_link(struct - - static void iproc_pcie_enable(struct iproc_pcie *pcie) - { -- writel(SYS_RC_INTX_MASK, pcie->base + SYS_RC_INTX_EN); -+ iproc_pcie_write_reg(pcie, IPROC_PCIE_INTX_EN, SYS_RC_INTX_MASK); - } - - /** -@@ -272,11 +389,15 @@ static int iproc_pcie_setup_ob(struct ip - axi_addr -= ob->axi_offset; - - for (i = 0; i < MAX_NUM_OB_WINDOWS; i++) { -- writel(lower_32_bits(axi_addr) | OARR_VALID | -- (ob->set_oarr_size ? 1 : 0), pcie->base + OARR_LO(i)); -- writel(upper_32_bits(axi_addr), pcie->base + OARR_HI(i)); -- writel(lower_32_bits(pci_addr), pcie->base + OMAP_LO(i)); -- writel(upper_32_bits(pci_addr), pcie->base + OMAP_HI(i)); -+ iproc_pcie_ob_write(pcie, IPROC_PCIE_OARR_LO, i, -+ lower_32_bits(axi_addr) | OARR_VALID | -+ (ob->set_oarr_size ? 1 : 0)); -+ iproc_pcie_ob_write(pcie, IPROC_PCIE_OARR_HI, i, -+ upper_32_bits(axi_addr)); -+ iproc_pcie_ob_write(pcie, IPROC_PCIE_OMAP_LO, i, -+ lower_32_bits(pci_addr)); -+ iproc_pcie_ob_write(pcie, IPROC_PCIE_OMAP_HI, i, -+ upper_32_bits(pci_addr)); - - size -= ob->window_size; - if (size == 0) -@@ -340,6 +461,19 @@ int iproc_pcie_setup(struct iproc_pcie * - goto err_exit_phy; - } - -+ switch (pcie->type) { -+ case IPROC_PCIE_PAXB: -+ pcie->reg_offsets = iproc_pcie_reg_paxb; -+ break; -+ case IPROC_PCIE_PAXC: -+ pcie->reg_offsets = iproc_pcie_reg_paxc; -+ break; -+ default: -+ dev_err(pcie->dev, "incompatible iProc PCIe interface\n"); -+ ret = -EINVAL; -+ goto err_power_off_phy; -+ } -+ - iproc_pcie_reset(pcie); - - if (pcie->need_ob_cfg) { ---- a/drivers/pci/host/pcie-iproc.h -+++ b/drivers/pci/host/pcie-iproc.h -@@ -15,6 +15,20 @@ - #define _PCIE_IPROC_H - - /** -+ * iProc PCIe interface type -+ * -+ * PAXB is the wrapper used in root complex that can be connected to an -+ * external endpoint device. -+ * -+ * PAXC is the wrapper used in root complex dedicated for internal emulated -+ * endpoint devices. -+ */ -+enum iproc_pcie_type { -+ IPROC_PCIE_PAXB = 0, -+ IPROC_PCIE_PAXC, -+}; -+ -+/** - * iProc PCIe outbound mapping - * @set_oarr_size: indicates the OARR size bit needs to be set - * @axi_offset: offset from the AXI address to the internal address used by -@@ -29,7 +43,10 @@ struct iproc_pcie_ob { - - /** - * iProc PCIe device -+ * - * @dev: pointer to device data structure -+ * @type: iProc PCIe interface type -+ * @reg_offsets: register offsets - * @base: PCIe host controller I/O register base - * @sysdata: Per PCI controller data (ARM-specific) - * @root_bus: pointer to root bus -@@ -41,6 +58,8 @@ struct iproc_pcie_ob { - */ - struct iproc_pcie { - struct device *dev; -+ enum iproc_pcie_type type; -+ const u16 *reg_offsets; - void __iomem *base; - #ifdef CONFIG_ARM - struct pci_sys_data sysdata; diff --git a/target/linux/bcm53xx/patches-4.4/087-0003-PCI-iproc-Add-iProc-PCIe-MSI-device-tree-binding.patch b/target/linux/bcm53xx/patches-4.4/087-0003-PCI-iproc-Add-iProc-PCIe-MSI-device-tree-binding.patch deleted file mode 100644 index b02b121cb0..0000000000 --- a/target/linux/bcm53xx/patches-4.4/087-0003-PCI-iproc-Add-iProc-PCIe-MSI-device-tree-binding.patch +++ /dev/null @@ -1,68 +0,0 @@ -From c7bd48195377435ecaf38869b936be8e7abe3489 Mon Sep 17 00:00:00 2001 -From: Ray Jui <rjui@broadcom.com> -Date: Fri, 4 Dec 2015 09:35:00 -0800 -Subject: [PATCH 3/5] PCI: iproc: Add iProc PCIe MSI device tree binding - -Update the iProc PCIe device tree bindings with added binding information -for MSI. - -Signed-off-by: Ray Jui <rjui@broadcom.com> -Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> -Reviewed-by: Anup Patel <anup.patel@broadcom.com> -Reviewed-by: Vikram Prakash <vikramp@broadcom.com> -Reviewed-by: Scott Branden <sbranden@broadcom.com> ---- - .../devicetree/bindings/pci/brcm,iproc-pcie.txt | 35 ++++++++++++++++++++++ - 1 file changed, 35 insertions(+) - ---- a/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt -+++ b/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt -@@ -35,6 +35,28 @@ Optional: - - brcm,pcie-ob-oarr-size: Some iProc SoCs need the OARR size bit to be set to - increase the outbound window size - -+MSI support (optional): -+ -+For older platforms without MSI integrated in the GIC, iProc PCIe core provides -+an event queue based MSI support. The iProc MSI uses host memories to store -+MSI posted writes in the event queues -+ -+- msi-parent: Link to the device node of the MSI controller. On newer iProc -+platforms, the MSI controller may be gicv2m or gicv3-its. On older iProc -+platforms without MSI support in its interrupt controller, one may use the -+event queue based MSI support integrated within the iProc PCIe core. -+ -+When the iProc event queue based MSI is used, one needs to define the -+following properties in the MSI device node: -+- compatible: Must be "brcm,iproc-msi" -+- msi-controller: claims itself as an MSI controller -+- interrupt-parent: Link to its parent interrupt device -+- interrupts: List of interrupt IDs from its parent interrupt device -+ -+Optional properties: -+- brcm,pcie-msi-inten: Needs to be present for some older iProc platforms that -+require the interrupt enable registers to be set explicitly to enable MSI -+ - Example: - pcie0: pcie@18012000 { - compatible = "brcm,iproc-pcie"; -@@ -61,6 +83,19 @@ Example: - brcm,pcie-ob-oarr-size; - brcm,pcie-ob-axi-offset = <0x00000000>; - brcm,pcie-ob-window-size = <256>; -+ -+ msi-parent = <&msi0>; -+ -+ /* iProc event queue based MSI */ -+ msi0: msi@18012000 { -+ compatible = "brcm,iproc-msi"; -+ msi-controller; -+ interrupt-parent = <&gic>; -+ interrupts = <GIC_SPI 96 IRQ_TYPE_NONE>, -+ <GIC_SPI 97 IRQ_TYPE_NONE>, -+ <GIC_SPI 98 IRQ_TYPE_NONE>, -+ <GIC_SPI 99 IRQ_TYPE_NONE>, -+ }; - }; - - pcie1: pcie@18013000 { diff --git a/target/linux/bcm53xx/patches-4.4/087-0004-PCI-iproc-Add-iProc-PCIe-MSI-support.patch b/target/linux/bcm53xx/patches-4.4/087-0004-PCI-iproc-Add-iProc-PCIe-MSI-support.patch deleted file mode 100644 index 19ba57736d..0000000000 --- a/target/linux/bcm53xx/patches-4.4/087-0004-PCI-iproc-Add-iProc-PCIe-MSI-support.patch +++ /dev/null @@ -1,891 +0,0 @@ -From 3bc2b2348835f6edd33c383a2fbcf15fe3dac3b2 Mon Sep 17 00:00:00 2001 -From: Ray Jui <rjui@broadcom.com> -Date: Wed, 6 Jan 2016 18:04:35 -0600 -Subject: [PATCH 4/5] PCI: iproc: Add iProc PCIe MSI support - -Add PCIe MSI support for both PAXB and PAXC interfaces on all iProc-based -platforms. - -The iProc PCIe MSI support deploys an event queue-based implementation. -Each event queue is serviced by a GIC interrupt and can support up to 64 -MSI vectors. Host memory is allocated for the event queues, and each event -queue consists of 64 word-sized entries. MSI data is written to the lower -16-bit of each entry, whereas the upper 16-bit of the entry is reserved for -the controller for internal processing. - -Each event queue is tracked by a head pointer and tail pointer. Head -pointer indicates the next entry in the event queue to be processed by -the driver and is updated by the driver after processing is done. -The controller uses the tail pointer as the next MSI data insertion -point. The controller ensures MSI data is flushed to host memory before -updating the tail pointer and then triggering the interrupt. - -MSI IRQ affinity is supported by evenly distributing the interrupts to each -CPU core. MSI vector is moved from one GIC interrupt to another in order -to steer to the target CPU. - -Therefore, the actual number of supported MSI vectors is: - - M * 64 / N - -where M denotes the number of GIC interrupts (event queues), and N denotes -the number of CPU cores. - -This iProc event queue-based MSI support should not be used with newer -platforms with integrated MSI support in the GIC (e.g., giv2m or -gicv3-its). - -[bhelgaas: fold in Kconfig fixes from Arnd Bergmann <arnd@arndb.de>] -Signed-off-by: Ray Jui <rjui@broadcom.com> -Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> -Reviewed-by: Anup Patel <anup.patel@broadcom.com> -Reviewed-by: Vikram Prakash <vikramp@broadcom.com> -Reviewed-by: Scott Branden <sbranden@broadcom.com> -Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> ---- - drivers/pci/host/Kconfig | 10 + - drivers/pci/host/Makefile | 1 + - drivers/pci/host/pcie-iproc-bcma.c | 1 + - drivers/pci/host/pcie-iproc-msi.c | 675 +++++++++++++++++++++++++++++++++ - drivers/pci/host/pcie-iproc-platform.c | 1 + - drivers/pci/host/pcie-iproc.c | 26 ++ - drivers/pci/host/pcie-iproc.h | 23 +- - 7 files changed, 735 insertions(+), 2 deletions(-) - create mode 100644 drivers/pci/host/pcie-iproc-msi.c - ---- a/drivers/pci/host/Kconfig -+++ b/drivers/pci/host/Kconfig -@@ -146,6 +146,16 @@ config PCIE_IPROC_BCMA - Say Y here if you want to use the Broadcom iProc PCIe controller - through the BCMA bus interface - -+config PCIE_IPROC_MSI -+ bool "Broadcom iProc PCIe MSI support" -+ depends on PCIE_IPROC_PLATFORM || PCIE_IPROC_BCMA -+ depends on PCI_MSI -+ select PCI_MSI_IRQ_DOMAIN -+ default ARCH_BCM_IPROC -+ help -+ Say Y here if you want to enable MSI support for Broadcom's iProc -+ PCIe controller -+ - config PCIE_ALTERA - bool "Altera PCIe controller" - depends on ARM || NIOS2 ---- a/drivers/pci/host/Makefile -+++ b/drivers/pci/host/Makefile -@@ -15,6 +15,7 @@ obj-$(CONFIG_PCI_XGENE_MSI) += pci-xgene - obj-$(CONFIG_PCI_LAYERSCAPE) += pci-layerscape.o - obj-$(CONFIG_PCI_VERSATILE) += pci-versatile.o - obj-$(CONFIG_PCIE_IPROC) += pcie-iproc.o -+obj-$(CONFIG_PCIE_IPROC_MSI) += pcie-iproc-msi.o - obj-$(CONFIG_PCIE_IPROC_PLATFORM) += pcie-iproc-platform.o - obj-$(CONFIG_PCIE_IPROC_BCMA) += pcie-iproc-bcma.o - obj-$(CONFIG_PCIE_ALTERA) += pcie-altera.o ---- a/drivers/pci/host/pcie-iproc-bcma.c -+++ b/drivers/pci/host/pcie-iproc-bcma.c -@@ -55,6 +55,7 @@ static int iproc_pcie_bcma_probe(struct - bcma_set_drvdata(bdev, pcie); - - pcie->base = bdev->io_addr; -+ pcie->base_addr = bdev->addr; - - res_mem.start = bdev->addr_s[0]; - res_mem.end = bdev->addr_s[0] + SZ_128M - 1; ---- /dev/null -+++ b/drivers/pci/host/pcie-iproc-msi.c -@@ -0,0 +1,675 @@ -+/* -+ * Copyright (C) 2015 Broadcom Corporation -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation version 2. -+ * -+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any -+ * kind, whether express or implied; without even the implied warranty -+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#include <linux/interrupt.h> -+#include <linux/irqchip/chained_irq.h> -+#include <linux/irqdomain.h> -+#include <linux/msi.h> -+#include <linux/of_irq.h> -+#include <linux/of_pci.h> -+#include <linux/pci.h> -+ -+#include "pcie-iproc.h" -+ -+#define IPROC_MSI_INTR_EN_SHIFT 11 -+#define IPROC_MSI_INTR_EN BIT(IPROC_MSI_INTR_EN_SHIFT) -+#define IPROC_MSI_INT_N_EVENT_SHIFT 1 -+#define IPROC_MSI_INT_N_EVENT BIT(IPROC_MSI_INT_N_EVENT_SHIFT) -+#define IPROC_MSI_EQ_EN_SHIFT 0 -+#define IPROC_MSI_EQ_EN BIT(IPROC_MSI_EQ_EN_SHIFT) -+ -+#define IPROC_MSI_EQ_MASK 0x3f -+ -+/* Max number of GIC interrupts */ -+#define NR_HW_IRQS 6 -+ -+/* Number of entries in each event queue */ -+#define EQ_LEN 64 -+ -+/* Size of each event queue memory region */ -+#define EQ_MEM_REGION_SIZE SZ_4K -+ -+/* Size of each MSI address region */ -+#define MSI_MEM_REGION_SIZE SZ_4K -+ -+enum iproc_msi_reg { -+ IPROC_MSI_EQ_PAGE = 0, -+ IPROC_MSI_EQ_PAGE_UPPER, -+ IPROC_MSI_PAGE, -+ IPROC_MSI_PAGE_UPPER, -+ IPROC_MSI_CTRL, -+ IPROC_MSI_EQ_HEAD, -+ IPROC_MSI_EQ_TAIL, -+ IPROC_MSI_INTS_EN, -+ IPROC_MSI_REG_SIZE, -+}; -+ -+struct iproc_msi; -+ -+/** -+ * iProc MSI group -+ * -+ * One MSI group is allocated per GIC interrupt, serviced by one iProc MSI -+ * event queue. -+ * -+ * @msi: pointer to iProc MSI data -+ * @gic_irq: GIC interrupt -+ * @eq: Event queue number -+ */ -+struct iproc_msi_grp { -+ struct iproc_msi *msi; -+ int gic_irq; -+ unsigned int eq; -+}; -+ -+/** -+ * iProc event queue based MSI -+ * -+ * Only meant to be used on platforms without MSI support integrated into the -+ * GIC. -+ * -+ * @pcie: pointer to iProc PCIe data -+ * @reg_offsets: MSI register offsets -+ * @grps: MSI groups -+ * @nr_irqs: number of total interrupts connected to GIC -+ * @nr_cpus: number of toal CPUs -+ * @has_inten_reg: indicates the MSI interrupt enable register needs to be -+ * set explicitly (required for some legacy platforms) -+ * @bitmap: MSI vector bitmap -+ * @bitmap_lock: lock to protect access to the MSI bitmap -+ * @nr_msi_vecs: total number of MSI vectors -+ * @inner_domain: inner IRQ domain -+ * @msi_domain: MSI IRQ domain -+ * @nr_eq_region: required number of 4K aligned memory region for MSI event -+ * queues -+ * @nr_msi_region: required number of 4K aligned address region for MSI posted -+ * writes -+ * @eq_cpu: pointer to allocated memory region for MSI event queues -+ * @eq_dma: DMA address of MSI event queues -+ * @msi_addr: MSI address -+ */ -+struct iproc_msi { -+ struct iproc_pcie *pcie; -+ const u16 (*reg_offsets)[IPROC_MSI_REG_SIZE]; -+ struct iproc_msi_grp *grps; -+ int nr_irqs; -+ int nr_cpus; -+ bool has_inten_reg; -+ unsigned long *bitmap; -+ struct mutex bitmap_lock; -+ unsigned int nr_msi_vecs; -+ struct irq_domain *inner_domain; -+ struct irq_domain *msi_domain; -+ unsigned int nr_eq_region; -+ unsigned int nr_msi_region; -+ void *eq_cpu; -+ dma_addr_t eq_dma; -+ phys_addr_t msi_addr; -+}; -+ -+static const u16 iproc_msi_reg_paxb[NR_HW_IRQS][IPROC_MSI_REG_SIZE] = { -+ { 0x200, 0x2c0, 0x204, 0x2c4, 0x210, 0x250, 0x254, 0x208 }, -+ { 0x200, 0x2c0, 0x204, 0x2c4, 0x214, 0x258, 0x25c, 0x208 }, -+ { 0x200, 0x2c0, 0x204, 0x2c4, 0x218, 0x260, 0x264, 0x208 }, -+ { 0x200, 0x2c0, 0x204, 0x2c4, 0x21c, 0x268, 0x26c, 0x208 }, -+ { 0x200, 0x2c0, 0x204, 0x2c4, 0x220, 0x270, 0x274, 0x208 }, -+ { 0x200, 0x2c0, 0x204, 0x2c4, 0x224, 0x278, 0x27c, 0x208 }, -+}; -+ -+static const u16 iproc_msi_reg_paxc[NR_HW_IRQS][IPROC_MSI_REG_SIZE] = { -+ { 0xc00, 0xc04, 0xc08, 0xc0c, 0xc40, 0xc50, 0xc60 }, -+ { 0xc10, 0xc14, 0xc18, 0xc1c, 0xc44, 0xc54, 0xc64 }, -+ { 0xc20, 0xc24, 0xc28, 0xc2c, 0xc48, 0xc58, 0xc68 }, -+ { 0xc30, 0xc34, 0xc38, 0xc3c, 0xc4c, 0xc5c, 0xc6c }, -+}; -+ -+static inline u32 iproc_msi_read_reg(struct iproc_msi *msi, -+ enum iproc_msi_reg reg, -+ unsigned int eq) -+{ -+ struct iproc_pcie *pcie = msi->pcie; -+ -+ return readl_relaxed(pcie->base + msi->reg_offsets[eq][reg]); -+} -+ -+static inline void iproc_msi_write_reg(struct iproc_msi *msi, -+ enum iproc_msi_reg reg, -+ int eq, u32 val) -+{ -+ struct iproc_pcie *pcie = msi->pcie; -+ -+ writel_relaxed(val, pcie->base + msi->reg_offsets[eq][reg]); -+} -+ -+static inline u32 hwirq_to_group(struct iproc_msi *msi, unsigned long hwirq) -+{ -+ return (hwirq % msi->nr_irqs); -+} -+ -+static inline unsigned int iproc_msi_addr_offset(struct iproc_msi *msi, -+ unsigned long hwirq) -+{ -+ if (msi->nr_msi_region > 1) -+ return hwirq_to_group(msi, hwirq) * MSI_MEM_REGION_SIZE; -+ else -+ return hwirq_to_group(msi, hwirq) * sizeof(u32); -+} -+ -+static inline unsigned int iproc_msi_eq_offset(struct iproc_msi *msi, u32 eq) -+{ -+ if (msi->nr_eq_region > 1) -+ return eq * EQ_MEM_REGION_SIZE; -+ else -+ return eq * EQ_LEN * sizeof(u32); -+} -+ -+static struct irq_chip iproc_msi_irq_chip = { -+ .name = "iProc-MSI", -+}; -+ -+static struct msi_domain_info iproc_msi_domain_info = { -+ .flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | -+ MSI_FLAG_PCI_MSIX, -+ .chip = &iproc_msi_irq_chip, -+}; -+ -+/* -+ * In iProc PCIe core, each MSI group is serviced by a GIC interrupt and a -+ * dedicated event queue. Each MSI group can support up to 64 MSI vectors. -+ * -+ * The number of MSI groups varies between different iProc SoCs. The total -+ * number of CPU cores also varies. To support MSI IRQ affinity, we -+ * distribute GIC interrupts across all available CPUs. MSI vector is moved -+ * from one GIC interrupt to another to steer to the target CPU. -+ * -+ * Assuming: -+ * - the number of MSI groups is M -+ * - the number of CPU cores is N -+ * - M is always a multiple of N -+ * -+ * Total number of raw MSI vectors = M * 64 -+ * Total number of supported MSI vectors = (M * 64) / N -+ */ -+static inline int hwirq_to_cpu(struct iproc_msi *msi, unsigned long hwirq) -+{ -+ return (hwirq % msi->nr_cpus); -+} -+ -+static inline unsigned long hwirq_to_canonical_hwirq(struct iproc_msi *msi, -+ unsigned long hwirq) -+{ -+ return (hwirq - hwirq_to_cpu(msi, hwirq)); -+} -+ -+static int iproc_msi_irq_set_affinity(struct irq_data *data, -+ const struct cpumask *mask, bool force) -+{ -+ struct iproc_msi *msi = irq_data_get_irq_chip_data(data); -+ int target_cpu = cpumask_first(mask); -+ int curr_cpu; -+ -+ curr_cpu = hwirq_to_cpu(msi, data->hwirq); -+ if (curr_cpu == target_cpu) -+ return IRQ_SET_MASK_OK_DONE; -+ -+ /* steer MSI to the target CPU */ -+ data->hwirq = hwirq_to_canonical_hwirq(msi, data->hwirq) + target_cpu; -+ -+ return IRQ_SET_MASK_OK; -+} -+ -+static void iproc_msi_irq_compose_msi_msg(struct irq_data *data, -+ struct msi_msg *msg) -+{ -+ struct iproc_msi *msi = irq_data_get_irq_chip_data(data); -+ dma_addr_t addr; -+ -+ addr = msi->msi_addr + iproc_msi_addr_offset(msi, data->hwirq); -+ msg->address_lo = lower_32_bits(addr); -+ msg->address_hi = upper_32_bits(addr); -+ msg->data = data->hwirq; -+} -+ -+static struct irq_chip iproc_msi_bottom_irq_chip = { -+ .name = "MSI", -+ .irq_set_affinity = iproc_msi_irq_set_affinity, -+ .irq_compose_msi_msg = iproc_msi_irq_compose_msi_msg, -+}; -+ -+static int iproc_msi_irq_domain_alloc(struct irq_domain *domain, -+ unsigned int virq, unsigned int nr_irqs, -+ void *args) -+{ -+ struct iproc_msi *msi = domain->host_data; -+ int hwirq; -+ -+ mutex_lock(&msi->bitmap_lock); -+ -+ /* Allocate 'nr_cpus' number of MSI vectors each time */ -+ hwirq = bitmap_find_next_zero_area(msi->bitmap, msi->nr_msi_vecs, 0, -+ msi->nr_cpus, 0); -+ if (hwirq < msi->nr_msi_vecs) { -+ bitmap_set(msi->bitmap, hwirq, msi->nr_cpus); -+ } else { -+ mutex_unlock(&msi->bitmap_lock); -+ return -ENOSPC; -+ } -+ -+ mutex_unlock(&msi->bitmap_lock); -+ -+ irq_domain_set_info(domain, virq, hwirq, &iproc_msi_bottom_irq_chip, -+ domain->host_data, handle_simple_irq, NULL, NULL); -+ -+ return 0; -+} -+ -+static void iproc_msi_irq_domain_free(struct irq_domain *domain, -+ unsigned int virq, unsigned int nr_irqs) -+{ -+ struct irq_data *data = irq_domain_get_irq_data(domain, virq); -+ struct iproc_msi *msi = irq_data_get_irq_chip_data(data); -+ unsigned int hwirq; -+ -+ mutex_lock(&msi->bitmap_lock); -+ -+ hwirq = hwirq_to_canonical_hwirq(msi, data->hwirq); -+ bitmap_clear(msi->bitmap, hwirq, msi->nr_cpus); -+ -+ mutex_unlock(&msi->bitmap_lock); -+ -+ irq_domain_free_irqs_parent(domain, virq, nr_irqs); -+} -+ -+static const struct irq_domain_ops msi_domain_ops = { -+ .alloc = iproc_msi_irq_domain_alloc, -+ .free = iproc_msi_irq_domain_free, -+}; -+ -+static inline u32 decode_msi_hwirq(struct iproc_msi *msi, u32 eq, u32 head) -+{ -+ u32 *msg, hwirq; -+ unsigned int offs; -+ -+ offs = iproc_msi_eq_offset(msi, eq) + head * sizeof(u32); -+ msg = (u32 *)(msi->eq_cpu + offs); -+ hwirq = *msg & IPROC_MSI_EQ_MASK; -+ -+ /* -+ * Since we have multiple hwirq mapped to a single MSI vector, -+ * now we need to derive the hwirq at CPU0. It can then be used to -+ * mapped back to virq. -+ */ -+ return hwirq_to_canonical_hwirq(msi, hwirq); -+} -+ -+static void iproc_msi_handler(struct irq_desc *desc) -+{ -+ struct irq_chip *chip = irq_desc_get_chip(desc); -+ struct iproc_msi_grp *grp; -+ struct iproc_msi *msi; -+ struct iproc_pcie *pcie; -+ u32 eq, head, tail, nr_events; -+ unsigned long hwirq; -+ int virq; -+ -+ chained_irq_enter(chip, desc); -+ -+ grp = irq_desc_get_handler_data(desc); -+ msi = grp->msi; -+ pcie = msi->pcie; -+ eq = grp->eq; -+ -+ /* -+ * iProc MSI event queue is tracked by head and tail pointers. Head -+ * pointer indicates the next entry (MSI data) to be consumed by SW in -+ * the queue and needs to be updated by SW. iProc MSI core uses the -+ * tail pointer as the next data insertion point. -+ * -+ * Entries between head and tail pointers contain valid MSI data. MSI -+ * data is guaranteed to be in the event queue memory before the tail -+ * pointer is updated by the iProc MSI core. -+ */ -+ head = iproc_msi_read_reg(msi, IPROC_MSI_EQ_HEAD, -+ eq) & IPROC_MSI_EQ_MASK; -+ do { -+ tail = iproc_msi_read_reg(msi, IPROC_MSI_EQ_TAIL, -+ eq) & IPROC_MSI_EQ_MASK; -+ -+ /* -+ * Figure out total number of events (MSI data) to be -+ * processed. -+ */ -+ nr_events = (tail < head) ? -+ (EQ_LEN - (head - tail)) : (tail - head); -+ if (!nr_events) -+ break; -+ -+ /* process all outstanding events */ -+ while (nr_events--) { -+ hwirq = decode_msi_hwirq(msi, eq, head); -+ virq = irq_find_mapping(msi->inner_domain, hwirq); -+ generic_handle_irq(virq); -+ -+ head++; -+ head %= EQ_LEN; -+ } -+ -+ /* -+ * Now all outstanding events have been processed. Update the -+ * head pointer. -+ */ -+ iproc_msi_write_reg(msi, IPROC_MSI_EQ_HEAD, eq, head); -+ -+ /* -+ * Now go read the tail pointer again to see if there are new -+ * oustanding events that came in during the above window. -+ */ -+ } while (true); -+ -+ chained_irq_exit(chip, desc); -+} -+ -+static void iproc_msi_enable(struct iproc_msi *msi) -+{ -+ int i, eq; -+ u32 val; -+ -+ /* Program memory region for each event queue */ -+ for (i = 0; i < msi->nr_eq_region; i++) { -+ dma_addr_t addr = msi->eq_dma + (i * EQ_MEM_REGION_SIZE); -+ -+ iproc_msi_write_reg(msi, IPROC_MSI_EQ_PAGE, i, -+ lower_32_bits(addr)); -+ iproc_msi_write_reg(msi, IPROC_MSI_EQ_PAGE_UPPER, i, -+ upper_32_bits(addr)); -+ } -+ -+ /* Program address region for MSI posted writes */ -+ for (i = 0; i < msi->nr_msi_region; i++) { -+ phys_addr_t addr = msi->msi_addr + (i * MSI_MEM_REGION_SIZE); -+ -+ iproc_msi_write_reg(msi, IPROC_MSI_PAGE, i, -+ lower_32_bits(addr)); -+ iproc_msi_write_reg(msi, IPROC_MSI_PAGE_UPPER, i, -+ upper_32_bits(addr)); -+ } -+ -+ for (eq = 0; eq < msi->nr_irqs; eq++) { -+ /* Enable MSI event queue */ -+ val = IPROC_MSI_INTR_EN | IPROC_MSI_INT_N_EVENT | -+ IPROC_MSI_EQ_EN; -+ iproc_msi_write_reg(msi, IPROC_MSI_CTRL, eq, val); -+ -+ /* -+ * Some legacy platforms require the MSI interrupt enable -+ * register to be set explicitly. -+ */ -+ if (msi->has_inten_reg) { -+ val = iproc_msi_read_reg(msi, IPROC_MSI_INTS_EN, eq); -+ val |= BIT(eq); -+ iproc_msi_write_reg(msi, IPROC_MSI_INTS_EN, eq, val); -+ } -+ } -+} -+ -+static void iproc_msi_disable(struct iproc_msi *msi) -+{ -+ u32 eq, val; -+ -+ for (eq = 0; eq < msi->nr_irqs; eq++) { -+ if (msi->has_inten_reg) { -+ val = iproc_msi_read_reg(msi, IPROC_MSI_INTS_EN, eq); -+ val &= ~BIT(eq); -+ iproc_msi_write_reg(msi, IPROC_MSI_INTS_EN, eq, val); -+ } -+ -+ val = iproc_msi_read_reg(msi, IPROC_MSI_CTRL, eq); -+ val &= ~(IPROC_MSI_INTR_EN | IPROC_MSI_INT_N_EVENT | -+ IPROC_MSI_EQ_EN); -+ iproc_msi_write_reg(msi, IPROC_MSI_CTRL, eq, val); -+ } -+} -+ -+static int iproc_msi_alloc_domains(struct device_node *node, -+ struct iproc_msi *msi) -+{ -+ msi->inner_domain = irq_domain_add_linear(NULL, msi->nr_msi_vecs, -+ &msi_domain_ops, msi); -+ if (!msi->inner_domain) -+ return -ENOMEM; -+ -+ msi->msi_domain = pci_msi_create_irq_domain(of_node_to_fwnode(node), -+ &iproc_msi_domain_info, -+ msi->inner_domain); -+ if (!msi->msi_domain) { -+ irq_domain_remove(msi->inner_domain); -+ return -ENOMEM; -+ } -+ -+ return 0; -+} -+ -+static void iproc_msi_free_domains(struct iproc_msi *msi) -+{ -+ if (msi->msi_domain) -+ irq_domain_remove(msi->msi_domain); -+ -+ if (msi->inner_domain) -+ irq_domain_remove(msi->inner_domain); -+} -+ -+static void iproc_msi_irq_free(struct iproc_msi *msi, unsigned int cpu) -+{ -+ int i; -+ -+ for (i = cpu; i < msi->nr_irqs; i += msi->nr_cpus) { -+ irq_set_chained_handler_and_data(msi->grps[i].gic_irq, -+ NULL, NULL); -+ } -+} -+ -+static int iproc_msi_irq_setup(struct iproc_msi *msi, unsigned int cpu) -+{ -+ int i, ret; -+ cpumask_var_t mask; -+ struct iproc_pcie *pcie = msi->pcie; -+ -+ for (i = cpu; i < msi->nr_irqs; i += msi->nr_cpus) { -+ irq_set_chained_handler_and_data(msi->grps[i].gic_irq, -+ iproc_msi_handler, -+ &msi->grps[i]); -+ /* Dedicate GIC interrupt to each CPU core */ -+ if (alloc_cpumask_var(&mask, GFP_KERNEL)) { -+ cpumask_clear(mask); -+ cpumask_set_cpu(cpu, mask); -+ ret = irq_set_affinity(msi->grps[i].gic_irq, mask); -+ if (ret) -+ dev_err(pcie->dev, -+ "failed to set affinity for IRQ%d\n", -+ msi->grps[i].gic_irq); -+ free_cpumask_var(mask); -+ } else { -+ dev_err(pcie->dev, "failed to alloc CPU mask\n"); -+ ret = -EINVAL; -+ } -+ -+ if (ret) { -+ /* Free all configured/unconfigured IRQs */ -+ iproc_msi_irq_free(msi, cpu); -+ return ret; -+ } -+ } -+ -+ return 0; -+} -+ -+int iproc_msi_init(struct iproc_pcie *pcie, struct device_node *node) -+{ -+ struct iproc_msi *msi; -+ int i, ret; -+ unsigned int cpu; -+ -+ if (!of_device_is_compatible(node, "brcm,iproc-msi")) -+ return -ENODEV; -+ -+ if (!of_find_property(node, "msi-controller", NULL)) -+ return -ENODEV; -+ -+ if (pcie->msi) -+ return -EBUSY; -+ -+ msi = devm_kzalloc(pcie->dev, sizeof(*msi), GFP_KERNEL); -+ if (!msi) -+ return -ENOMEM; -+ -+ msi->pcie = pcie; -+ pcie->msi = msi; -+ msi->msi_addr = pcie->base_addr; -+ mutex_init(&msi->bitmap_lock); -+ msi->nr_cpus = num_possible_cpus(); -+ -+ msi->nr_irqs = of_irq_count(node); -+ if (!msi->nr_irqs) { -+ dev_err(pcie->dev, "found no MSI GIC interrupt\n"); -+ return -ENODEV; -+ } -+ -+ if (msi->nr_irqs > NR_HW_IRQS) { -+ dev_warn(pcie->dev, "too many MSI GIC interrupts defined %d\n", -+ msi->nr_irqs); -+ msi->nr_irqs = NR_HW_IRQS; -+ } -+ -+ if (msi->nr_irqs < msi->nr_cpus) { -+ dev_err(pcie->dev, -+ "not enough GIC interrupts for MSI affinity\n"); -+ return -EINVAL; -+ } -+ -+ if (msi->nr_irqs % msi->nr_cpus != 0) { -+ msi->nr_irqs -= msi->nr_irqs % msi->nr_cpus; -+ dev_warn(pcie->dev, "Reducing number of interrupts to %d\n", -+ msi->nr_irqs); -+ } -+ -+ switch (pcie->type) { -+ case IPROC_PCIE_PAXB: -+ msi->reg_offsets = iproc_msi_reg_paxb; -+ msi->nr_eq_region = 1; -+ msi->nr_msi_region = 1; -+ break; -+ case IPROC_PCIE_PAXC: -+ msi->reg_offsets = iproc_msi_reg_paxc; -+ msi->nr_eq_region = msi->nr_irqs; -+ msi->nr_msi_region = msi->nr_irqs; -+ break; -+ default: -+ dev_err(pcie->dev, "incompatible iProc PCIe interface\n"); -+ return -EINVAL; -+ } -+ -+ if (of_find_property(node, "brcm,pcie-msi-inten", NULL)) -+ msi->has_inten_reg = true; -+ -+ msi->nr_msi_vecs = msi->nr_irqs * EQ_LEN; -+ msi->bitmap = devm_kcalloc(pcie->dev, BITS_TO_LONGS(msi->nr_msi_vecs), -+ sizeof(*msi->bitmap), GFP_KERNEL); -+ if (!msi->bitmap) -+ return -ENOMEM; -+ -+ msi->grps = devm_kcalloc(pcie->dev, msi->nr_irqs, sizeof(*msi->grps), -+ GFP_KERNEL); -+ if (!msi->grps) -+ return -ENOMEM; -+ -+ for (i = 0; i < msi->nr_irqs; i++) { -+ unsigned int irq = irq_of_parse_and_map(node, i); -+ -+ if (!irq) { -+ dev_err(pcie->dev, "unable to parse/map interrupt\n"); -+ ret = -ENODEV; -+ goto free_irqs; -+ } -+ msi->grps[i].gic_irq = irq; -+ msi->grps[i].msi = msi; -+ msi->grps[i].eq = i; -+ } -+ -+ /* Reserve memory for event queue and make sure memories are zeroed */ -+ msi->eq_cpu = dma_zalloc_coherent(pcie->dev, -+ msi->nr_eq_region * EQ_MEM_REGION_SIZE, -+ &msi->eq_dma, GFP_KERNEL); -+ if (!msi->eq_cpu) { -+ ret = -ENOMEM; -+ goto free_irqs; -+ } -+ -+ ret = iproc_msi_alloc_domains(node, msi); -+ if (ret) { -+ dev_err(pcie->dev, "failed to create MSI domains\n"); -+ goto free_eq_dma; -+ } -+ -+ for_each_online_cpu(cpu) { -+ ret = iproc_msi_irq_setup(msi, cpu); -+ if (ret) -+ goto free_msi_irq; -+ } -+ -+ iproc_msi_enable(msi); -+ -+ return 0; -+ -+free_msi_irq: -+ for_each_online_cpu(cpu) -+ iproc_msi_irq_free(msi, cpu); -+ iproc_msi_free_domains(msi); -+ -+free_eq_dma: -+ dma_free_coherent(pcie->dev, msi->nr_eq_region * EQ_MEM_REGION_SIZE, -+ msi->eq_cpu, msi->eq_dma); -+ -+free_irqs: -+ for (i = 0; i < msi->nr_irqs; i++) { -+ if (msi->grps[i].gic_irq) -+ irq_dispose_mapping(msi->grps[i].gic_irq); -+ } -+ pcie->msi = NULL; -+ return ret; -+} -+EXPORT_SYMBOL(iproc_msi_init); -+ -+void iproc_msi_exit(struct iproc_pcie *pcie) -+{ -+ struct iproc_msi *msi = pcie->msi; -+ unsigned int i, cpu; -+ -+ if (!msi) -+ return; -+ -+ iproc_msi_disable(msi); -+ -+ for_each_online_cpu(cpu) -+ iproc_msi_irq_free(msi, cpu); -+ -+ iproc_msi_free_domains(msi); -+ -+ dma_free_coherent(pcie->dev, msi->nr_eq_region * EQ_MEM_REGION_SIZE, -+ msi->eq_cpu, msi->eq_dma); -+ -+ for (i = 0; i < msi->nr_irqs; i++) { -+ if (msi->grps[i].gic_irq) -+ irq_dispose_mapping(msi->grps[i].gic_irq); -+ } -+} -+EXPORT_SYMBOL(iproc_msi_exit); ---- a/drivers/pci/host/pcie-iproc-platform.c -+++ b/drivers/pci/host/pcie-iproc-platform.c -@@ -71,6 +71,7 @@ static int iproc_pcie_pltfm_probe(struct - dev_err(pcie->dev, "unable to map controller registers\n"); - return -ENOMEM; - } -+ pcie->base_addr = reg.start; - - if (of_property_read_bool(np, "brcm,pcie-ob")) { - u32 val; ---- a/drivers/pci/host/pcie-iproc.c -+++ b/drivers/pci/host/pcie-iproc.c -@@ -440,6 +440,26 @@ static int iproc_pcie_map_ranges(struct - return 0; - } - -+static int iproc_pcie_msi_enable(struct iproc_pcie *pcie) -+{ -+ struct device_node *msi_node; -+ -+ msi_node = of_parse_phandle(pcie->dev->of_node, "msi-parent", 0); -+ if (!msi_node) -+ return -ENODEV; -+ -+ /* -+ * If another MSI controller is being used, the call below should fail -+ * but that is okay -+ */ -+ return iproc_msi_init(pcie, msi_node); -+} -+ -+static void iproc_pcie_msi_disable(struct iproc_pcie *pcie) -+{ -+ iproc_msi_exit(pcie); -+} -+ - int iproc_pcie_setup(struct iproc_pcie *pcie, struct list_head *res) - { - int ret; -@@ -507,6 +527,10 @@ int iproc_pcie_setup(struct iproc_pcie * - - iproc_pcie_enable(pcie); - -+ if (IS_ENABLED(CONFIG_PCI_MSI)) -+ if (iproc_pcie_msi_enable(pcie)) -+ dev_info(pcie->dev, "not using iProc MSI\n"); -+ - pci_scan_child_bus(bus); - pci_assign_unassigned_bus_resources(bus); - pci_fixup_irqs(pci_common_swizzle, pcie->map_irq); -@@ -531,6 +555,8 @@ int iproc_pcie_remove(struct iproc_pcie - pci_stop_root_bus(pcie->root_bus); - pci_remove_root_bus(pcie->root_bus); - -+ iproc_pcie_msi_disable(pcie); -+ - phy_power_off(pcie->phy); - phy_exit(pcie->phy); - ---- a/drivers/pci/host/pcie-iproc.h -+++ b/drivers/pci/host/pcie-iproc.h -@@ -41,6 +41,8 @@ struct iproc_pcie_ob { - resource_size_t window_size; - }; - -+struct iproc_msi; -+ - /** - * iProc PCIe device - * -@@ -48,19 +50,21 @@ struct iproc_pcie_ob { - * @type: iProc PCIe interface type - * @reg_offsets: register offsets - * @base: PCIe host controller I/O register base -+ * @base_addr: PCIe host controller register base physical address - * @sysdata: Per PCI controller data (ARM-specific) - * @root_bus: pointer to root bus - * @phy: optional PHY device that controls the Serdes -- * @irqs: interrupt IDs - * @map_irq: function callback to map interrupts -- * @need_ob_cfg: indidates SW needs to configure the outbound mapping window -+ * @need_ob_cfg: indicates SW needs to configure the outbound mapping window - * @ob: outbound mapping parameters -+ * @msi: MSI data - */ - struct iproc_pcie { - struct device *dev; - enum iproc_pcie_type type; - const u16 *reg_offsets; - void __iomem *base; -+ phys_addr_t base_addr; - #ifdef CONFIG_ARM - struct pci_sys_data sysdata; - #endif -@@ -69,9 +73,24 @@ struct iproc_pcie { - int (*map_irq)(const struct pci_dev *, u8, u8); - bool need_ob_cfg; - struct iproc_pcie_ob ob; -+ struct iproc_msi *msi; - }; - - int iproc_pcie_setup(struct iproc_pcie *pcie, struct list_head *res); - int iproc_pcie_remove(struct iproc_pcie *pcie); - -+#ifdef CONFIG_PCIE_IPROC_MSI -+int iproc_msi_init(struct iproc_pcie *pcie, struct device_node *node); -+void iproc_msi_exit(struct iproc_pcie *pcie); -+#else -+static inline int iproc_msi_init(struct iproc_pcie *pcie, -+ struct device_node *node) -+{ -+ return -ENODEV; -+} -+static inline void iproc_msi_exit(struct iproc_pcie *pcie) -+{ -+} -+#endif -+ - #endif /* _PCIE_IPROC_H */ diff --git a/target/linux/bcm53xx/patches-4.4/088-PCI-iproc-Allow-multiple-devices-except-on-PAXC.patch b/target/linux/bcm53xx/patches-4.4/088-PCI-iproc-Allow-multiple-devices-except-on-PAXC.patch deleted file mode 100644 index c33861e638..0000000000 --- a/target/linux/bcm53xx/patches-4.4/088-PCI-iproc-Allow-multiple-devices-except-on-PAXC.patch +++ /dev/null @@ -1,83 +0,0 @@ -From 46560388c476c8471fde7712c10f9fad8d0d1875 Mon Sep 17 00:00:00 2001 -From: Ray Jui <rjui@broadcom.com> -Date: Wed, 27 Jan 2016 16:52:24 -0600 -Subject: [PATCH] PCI: iproc: Allow multiple devices except on PAXC - -Commit 943ebae781f5 ("PCI: iproc: Add PAXC interface support") only allowed -device 0, which is a regression on BCMA-based platforms. - -All systems support only one device, a Root Port at 00:00.0, on the root -bus. PAXC-based systems support only the Root Port (00:00.0) and a single -device (with multiple functions) below it, e.g., 01:00.0, 01:00.1, etc. -Non-PAXC systems support arbitrary devices below the Root Port. - -[bhelgaas: changelog, fold in removal of MAX_NUM_PAXC_PF check] -Fixes: 943ebae781f5 ("PCI: iproc: Add PAXC interface support") -Reported-by: Rafal Milecki <zajec5@gmail.com> -Signed-off-by: Ray Jui <rjui@broadcom.com> -Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> ---- - drivers/pci/host/pcie-iproc.c | 29 +++++++++++------------------ - 1 file changed, 11 insertions(+), 18 deletions(-) - ---- a/drivers/pci/host/pcie-iproc.c -+++ b/drivers/pci/host/pcie-iproc.c -@@ -64,7 +64,6 @@ - #define OARR_SIZE_CFG BIT(OARR_SIZE_CFG_SHIFT) - - #define MAX_NUM_OB_WINDOWS 2 --#define MAX_NUM_PAXC_PF 4 - - #define IPROC_PCIE_REG_INVALID 0xffff - -@@ -170,20 +169,6 @@ static inline void iproc_pcie_ob_write(s - writel(val, pcie->base + offset + (window * 8)); - } - --static inline bool iproc_pcie_device_is_valid(struct iproc_pcie *pcie, -- unsigned int slot, -- unsigned int fn) --{ -- if (slot > 0) -- return false; -- -- /* PAXC can only support limited number of functions */ -- if (pcie->type == IPROC_PCIE_PAXC && fn >= MAX_NUM_PAXC_PF) -- return false; -- -- return true; --} -- - /** - * Note access to the configuration registers are protected at the higher layer - * by 'pci_lock' in drivers/pci/access.c -@@ -199,11 +184,11 @@ static void __iomem *iproc_pcie_map_cfg_ - u32 val; - u16 offset; - -- if (!iproc_pcie_device_is_valid(pcie, slot, fn)) -- return NULL; -- - /* root complex access */ - if (busno == 0) { -+ if (slot > 0 || fn > 0) -+ return NULL; -+ - iproc_pcie_write_reg(pcie, IPROC_PCIE_CFG_IND_ADDR, - where & CFG_IND_ADDR_MASK); - offset = iproc_pcie_reg_offset(pcie, IPROC_PCIE_CFG_IND_DATA); -@@ -213,6 +198,14 @@ static void __iomem *iproc_pcie_map_cfg_ - return (pcie->base + offset); - } - -+ /* -+ * PAXC is connected to an internally emulated EP within the SoC. It -+ * allows only one device. -+ */ -+ if (pcie->type == IPROC_PCIE_PAXC) -+ if (slot > 0) -+ return NULL; -+ - /* EP device access */ - val = (busno << CFG_ADDR_BUS_NUM_SHIFT) | - (slot << CFG_ADDR_DEV_NUM_SHIFT) | diff --git a/target/linux/bcm53xx/patches-4.4/089-clk-bcm-Add-driver-for-BCM53573-ILP-clock.patch b/target/linux/bcm53xx/patches-4.4/089-clk-bcm-Add-driver-for-BCM53573-ILP-clock.patch deleted file mode 100644 index b3f8b9107b..0000000000 --- a/target/linux/bcm53xx/patches-4.4/089-clk-bcm-Add-driver-for-BCM53573-ILP-clock.patch +++ /dev/null @@ -1,224 +0,0 @@ -From bd8dd593f7d2211f2273e05741d157b0c8d020ae Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Tue, 13 Sep 2016 09:06:04 +0200 -Subject: [PATCH] clk: bcm: Add driver for BCM53573 ILP clock -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This clock is present on BCM53573 devices (including BCM47189) that use -Cortex-A7. ILP is a part of PMU (Power Management Unit) multi-function -device so we use syscon (and regmap) for it. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Acked-by: Rob Herring <robh@kernel.org> -[sboyd@codeaurora.org: Remove 0 from clk_init_data to silence sparse] -Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> ---- - .../bindings/clock/brcm,bcm53573-ilp.txt | 36 +++++ - drivers/clk/bcm/Makefile | 1 + - drivers/clk/bcm/clk-bcm53573-ilp.c | 148 +++++++++++++++++++++ - 3 files changed, 185 insertions(+) - create mode 100644 Documentation/devicetree/bindings/clock/brcm,bcm53573-ilp.txt - create mode 100644 drivers/clk/bcm/clk-bcm53573-ilp.c - ---- /dev/null -+++ b/Documentation/devicetree/bindings/clock/brcm,bcm53573-ilp.txt -@@ -0,0 +1,36 @@ -+Broadcom BCM53573 ILP clock -+=========================== -+ -+This binding uses the common clock binding: -+ Documentation/devicetree/bindings/clock/clock-bindings.txt -+ -+This binding is used for ILP clock (sometimes referred as "slow clock") -+on Broadcom BCM53573 devices using Cortex-A7 CPU. -+ -+ILP's rate has to be calculated on runtime and it depends on ALP clock -+which has to be referenced. -+ -+This clock is part of PMU (Power Management Unit), a Broadcom's device -+handing power-related aspects. Its node must be sub-node of the PMU -+device. -+ -+Required properties: -+- compatible: "brcm,bcm53573-ilp" -+- clocks: has to reference an ALP clock -+- #clock-cells: should be <0> -+- clock-output-names: from common clock bindings, should contain clock -+ name -+ -+Example: -+ -+pmu@18012000 { -+ compatible = "simple-mfd", "syscon"; -+ reg = <0x18012000 0x00001000>; -+ -+ ilp { -+ compatible = "brcm,bcm53573-ilp"; -+ clocks = <&alp>; -+ #clock-cells = <0>; -+ clock-output-names = "ilp"; -+ }; -+}; ---- a/drivers/clk/bcm/Makefile -+++ b/drivers/clk/bcm/Makefile -@@ -4,6 +4,7 @@ obj-$(CONFIG_CLK_BCM_KONA) += clk-bcm281 - obj-$(CONFIG_CLK_BCM_KONA) += clk-bcm21664.o - obj-$(CONFIG_COMMON_CLK_IPROC) += clk-iproc-armpll.o clk-iproc-pll.o clk-iproc-asiu.o - obj-$(CONFIG_ARCH_BCM2835) += clk-bcm2835.o -+obj-$(CONFIG_ARCH_BCM_53573) += clk-bcm53573-ilp.o - obj-$(CONFIG_COMMON_CLK_IPROC) += clk-ns2.o - obj-$(CONFIG_ARCH_BCM_CYGNUS) += clk-cygnus.o - obj-$(CONFIG_ARCH_BCM_NSP) += clk-nsp.o ---- /dev/null -+++ b/drivers/clk/bcm/clk-bcm53573-ilp.c -@@ -0,0 +1,148 @@ -+/* -+ * Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl> -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include <linux/clk-provider.h> -+#include <linux/err.h> -+#include <linux/io.h> -+#include <linux/mfd/syscon.h> -+#include <linux/of.h> -+#include <linux/of_address.h> -+#include <linux/regmap.h> -+#include <linux/slab.h> -+ -+#define PMU_XTAL_FREQ_RATIO 0x66c -+#define XTAL_ALP_PER_4ILP 0x00001fff -+#define XTAL_CTL_EN 0x80000000 -+#define PMU_SLOW_CLK_PERIOD 0x6dc -+ -+struct bcm53573_ilp { -+ struct clk_hw hw; -+ struct regmap *regmap; -+}; -+ -+static int bcm53573_ilp_enable(struct clk_hw *hw) -+{ -+ struct bcm53573_ilp *ilp = container_of(hw, struct bcm53573_ilp, hw); -+ -+ regmap_write(ilp->regmap, PMU_SLOW_CLK_PERIOD, 0x10199); -+ regmap_write(ilp->regmap, 0x674, 0x10000); -+ -+ return 0; -+} -+ -+static void bcm53573_ilp_disable(struct clk_hw *hw) -+{ -+ struct bcm53573_ilp *ilp = container_of(hw, struct bcm53573_ilp, hw); -+ -+ regmap_write(ilp->regmap, PMU_SLOW_CLK_PERIOD, 0); -+ regmap_write(ilp->regmap, 0x674, 0); -+} -+ -+static unsigned long bcm53573_ilp_recalc_rate(struct clk_hw *hw, -+ unsigned long parent_rate) -+{ -+ struct bcm53573_ilp *ilp = container_of(hw, struct bcm53573_ilp, hw); -+ struct regmap *regmap = ilp->regmap; -+ u32 last_val, cur_val; -+ int sum = 0, num = 0, loop_num = 0; -+ int avg; -+ -+ /* Enable measurement */ -+ regmap_write(regmap, PMU_XTAL_FREQ_RATIO, XTAL_CTL_EN); -+ -+ /* Read initial value */ -+ regmap_read(regmap, PMU_XTAL_FREQ_RATIO, &last_val); -+ last_val &= XTAL_ALP_PER_4ILP; -+ -+ /* -+ * At minimum we should loop for a bit to let hardware do the -+ * measurement. This isn't very accurate however, so for a better -+ * precision lets try getting 20 different values for and use average. -+ */ -+ while (num < 20) { -+ regmap_read(regmap, PMU_XTAL_FREQ_RATIO, &cur_val); -+ cur_val &= XTAL_ALP_PER_4ILP; -+ -+ if (cur_val != last_val) { -+ /* Got different value, use it */ -+ sum += cur_val; -+ num++; -+ loop_num = 0; -+ last_val = cur_val; -+ } else if (++loop_num > 5000) { -+ /* Same value over and over, give up */ -+ sum += cur_val; -+ num++; -+ break; -+ } -+ -+ cpu_relax(); -+ } -+ -+ /* Disable measurement to save power */ -+ regmap_write(regmap, PMU_XTAL_FREQ_RATIO, 0x0); -+ -+ avg = sum / num; -+ -+ return parent_rate * 4 / avg; -+} -+ -+static const struct clk_ops bcm53573_ilp_clk_ops = { -+ .enable = bcm53573_ilp_enable, -+ .disable = bcm53573_ilp_disable, -+ .recalc_rate = bcm53573_ilp_recalc_rate, -+}; -+ -+static void bcm53573_ilp_init(struct device_node *np) -+{ -+ struct bcm53573_ilp *ilp; -+ struct clk_init_data init = { }; -+ const char *parent_name; -+ int err; -+ -+ ilp = kzalloc(sizeof(*ilp), GFP_KERNEL); -+ if (!ilp) -+ return; -+ -+ parent_name = of_clk_get_parent_name(np, 0); -+ if (!parent_name) { -+ err = -ENOENT; -+ goto err_free_ilp; -+ } -+ -+ ilp->regmap = syscon_node_to_regmap(of_get_parent(np)); -+ if (IS_ERR(ilp->regmap)) { -+ err = PTR_ERR(ilp->regmap); -+ goto err_free_ilp; -+ } -+ -+ init.name = np->name; -+ init.ops = &bcm53573_ilp_clk_ops; -+ init.parent_names = &parent_name; -+ init.num_parents = 1; -+ -+ ilp->hw.init = &init; -+ err = clk_hw_register(NULL, &ilp->hw); -+ if (err) -+ goto err_free_ilp; -+ -+ err = of_clk_add_hw_provider(np, of_clk_hw_simple_get, &ilp->hw); -+ if (err) -+ goto err_clk_hw_unregister; -+ -+ return; -+ -+err_clk_hw_unregister: -+ clk_hw_unregister(&ilp->hw); -+err_free_ilp: -+ kfree(ilp); -+ pr_err("Failed to init ILP clock: %d\n", err); -+} -+ -+/* We need it very early for arch code, before device model gets ready */ -+CLK_OF_DECLARE(bcm53573_ilp_clk, "brcm,bcm53573-ilp", bcm53573_ilp_init); diff --git a/target/linux/bcm53xx/patches-4.4/101-use-part-parser.patch b/target/linux/bcm53xx/patches-4.4/101-use-part-parser.patch deleted file mode 100644 index 4ecb8dc693..0000000000 --- a/target/linux/bcm53xx/patches-4.4/101-use-part-parser.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- a/arch/arm/boot/dts/bcm5301x-nand-cs0.dtsi -+++ b/arch/arm/boot/dts/bcm5301x-nand-cs0.dtsi -@@ -13,6 +13,8 @@ - reg = <0>; - #address-cells = <1>; - #size-cells = <1>; -+ -+ linux,part-probe = "ofpart", "bcm47xxpart"; - }; - }; - }; diff --git a/target/linux/bcm53xx/patches-4.4/112-bcm53xx-sprom-add-sprom-driver.patch b/target/linux/bcm53xx/patches-4.4/112-bcm53xx-sprom-add-sprom-driver.patch deleted file mode 100644 index f2d60c2f68..0000000000 --- a/target/linux/bcm53xx/patches-4.4/112-bcm53xx-sprom-add-sprom-driver.patch +++ /dev/null @@ -1,45 +0,0 @@ -From 4e0ab3269a6d260a41a3673157753147f5f71341 Mon Sep 17 00:00:00 2001 -From: Hauke Mehrtens <hauke@hauke-m.de> -Date: Sun, 4 May 2014 13:19:20 +0200 -Subject: [PATCH 03/17] bcm47xx-sprom: add Broadcom sprom parser driver - -This driver needs an nvram driver and fetches the sprom values from the -nvram and provides it to any other driver. The calibration data for the -wifi chip the mac address and some more board description data is -stores in the sprom. - -This is based on a copy of arch/mips/bcm47xx/sprom.c and my plan is to -make the bcm47xx MIPS SoCs also use this driver some time later. - -Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> ---- - .../devicetree/bindings/misc/bcm47xx-sprom.txt | 16 + - drivers/misc/Kconfig | 11 + - drivers/misc/Makefile | 1 + - drivers/misc/bcm47xx-sprom.c | 690 +++++++++++++++++++++ - 4 files changed, 718 insertions(+) - create mode 100644 Documentation/devicetree/bindings/misc/bcm47xx-sprom.txt - create mode 100644 drivers/misc/bcm47xx-sprom.c - ---- a/drivers/firmware/broadcom/Kconfig -+++ b/drivers/firmware/broadcom/Kconfig -@@ -9,3 +9,14 @@ config BCM47XX_NVRAM - This driver provides an easy way to get value of requested parameter. - It simply reads content of NVRAM and parses it. It doesn't control any - hardware part itself. -+ -+config BCM47XX_SPROM -+ bool "Broadcom SPROM driver" -+ depends on BCM47XX_NVRAM -+ help -+ Broadcom devices store configuration data in SPROM. Accessing it is -+ specific to the bus host type, e.g. PCI(e) devices have it mapped in -+ a PCI BAR. -+ In case of SoC devices SPROM content is stored on a flash used by -+ bootloader firmware CFE. This driver provides method to ssb and bcma -+ drivers to read SPROM on SoC. ---- a/drivers/firmware/broadcom/Makefile -+++ b/drivers/firmware/broadcom/Makefile -@@ -1 +1,2 @@ - obj-$(CONFIG_BCM47XX_NVRAM) += bcm47xx_nvram.o -+obj-$(CONFIG_BCM47XX_SPROM) += bcm47xx_sprom.o diff --git a/target/linux/bcm53xx/patches-4.4/140-mtd-brcmnand-set-initial-ECC-params-based-on-info-fr.patch b/target/linux/bcm53xx/patches-4.4/140-mtd-brcmnand-set-initial-ECC-params-based-on-info-fr.patch deleted file mode 100644 index 4eba839d91..0000000000 --- a/target/linux/bcm53xx/patches-4.4/140-mtd-brcmnand-set-initial-ECC-params-based-on-info-fr.patch +++ /dev/null @@ -1,53 +0,0 @@ -From eff78bc2c385f592294278582f38ad5fa4ed2b34 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com> -Date: Wed, 27 Jan 2016 08:47:03 +0100 -Subject: [PATCH] mtd: brcmnand: set initial ECC params based on info from HW -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -So far we were depending on nand_dt_init getting ECC info from DT and -setting it in ECC struct. It is possible to simply read this info from -hardware registers which makes adding support for new hardware way -easier (no more guessing & trying all combinations). -Please note it still gives a precedence to DT which was overwrite -whatever was initially set by the driver. - -Signed-off-by: Rafał Miłecki <zajec5@gmail.com> ---- -It took me hours to figure out how to setup NAND on my D-Link DIR-885L. -This should be very helpful for ppl adding new devices support. ---- - drivers/mtd/nand/brcmnand/brcmnand.c | 14 ++++++++++++++ - 1 file changed, 14 insertions(+) - ---- a/drivers/mtd/nand/brcmnand/brcmnand.c -+++ b/drivers/mtd/nand/brcmnand/brcmnand.c -@@ -645,6 +645,17 @@ static inline u32 brcmnand_ecc_level_mas - return mask << NAND_ACC_CONTROL_ECC_SHIFT; - } - -+static int brcmnand_get_ecc_strength(struct brcmnand_host *host) -+{ -+ struct brcmnand_controller *ctrl = host->ctrl; -+ u32 mask = brcmnand_ecc_level_mask(ctrl); -+ u16 acc_control_offs = brcmnand_cs_offset(ctrl, host->cs, -+ BRCMNAND_CS_ACC_CONTROL); -+ -+ return (nand_readreg(ctrl, acc_control_offs) & mask) >> -+ NAND_ACC_CONTROL_ECC_SHIFT; -+} -+ - static void brcmnand_set_ecc_enabled(struct brcmnand_host *host, int en) - { - struct brcmnand_controller *ctrl = host->ctrl; -@@ -1990,6 +2001,9 @@ static int brcmnand_init_cs(struct brcmn - nand_writereg(ctrl, cfg_offs, - nand_readreg(ctrl, cfg_offs) & ~CFG_BUS_WIDTH); - -+ chip->ecc.strength = brcmnand_get_ecc_strength(host); -+ chip->ecc.size = brcmnand_get_sector_size_1k(host) ? 1024 : 512; -+ - if (nand_scan_ident(mtd, 1, NULL)) - return -ENXIO; - diff --git a/target/linux/bcm53xx/patches-4.4/180-usb-xhci-add-support-for-performing-fake-doorbell.patch b/target/linux/bcm53xx/patches-4.4/180-usb-xhci-add-support-for-performing-fake-doorbell.patch deleted file mode 100644 index f5a7f37a49..0000000000 --- a/target/linux/bcm53xx/patches-4.4/180-usb-xhci-add-support-for-performing-fake-doorbell.patch +++ /dev/null @@ -1,137 +0,0 @@ -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Sat, 1 Oct 2016 22:54:48 +0200 -Subject: [PATCH] usb: xhci: add support for performing fake doorbell - -Broadcom's Northstar XHCI controllers seem to need a special start -procedure to work correctly. There isn't any official documentation of -this, the problem is that controller doesn't detect any connected -devices with default setup. Moreover connecting USB device to controller -that doesn't run properly can cause SoC's watchdog issues. - -A workaround that was successfully tested on multiple devices is to -perform a fake doorbell. This patch adds code for doing this and enables -it on BCM4708 family. ---- - drivers/usb/host/xhci-plat.c | 6 +++++ - drivers/usb/host/xhci.c | 63 +++++++++++++++++++++++++++++++++++++++++--- - drivers/usb/host/xhci.h | 1 + - 3 files changed, 67 insertions(+), 3 deletions(-) - ---- a/drivers/usb/host/xhci-plat.c -+++ b/drivers/usb/host/xhci-plat.c -@@ -38,12 +38,18 @@ static const struct xhci_driver_override - - static void xhci_plat_quirks(struct device *dev, struct xhci_hcd *xhci) - { -+ struct platform_device *pdev = to_platform_device(dev); -+ struct device_node *node = pdev->dev.of_node; -+ - /* - * As of now platform drivers don't provide MSI support so we ensure - * here that the generic code does not try to make a pci_dev from our - * dev struct in order to setup MSI - */ - xhci->quirks |= XHCI_PLAT; -+ -+ if (node && of_machine_is_compatible("brcm,bcm4708")) -+ xhci->quirks |= XHCI_FAKE_DOORBELL; - } - - /* called during probe() after chip reset completes */ ---- a/drivers/usb/host/xhci.c -+++ b/drivers/usb/host/xhci.c -@@ -152,6 +152,49 @@ static int xhci_start(struct xhci_hcd *x - return ret; - } - -+/** -+ * xhci_fake_doorbell - Perform a fake doorbell on a specified slot -+ * -+ * Some controllers require a fake doorbell to start correctly. Without that -+ * they simply don't detect any devices. -+ */ -+static int xhci_fake_doorbell(struct xhci_hcd *xhci, int slot_id) -+{ -+ u32 temp; -+ -+ /* Alloc a virt device for that slot */ -+ if (!xhci_alloc_virt_device(xhci, slot_id, NULL, GFP_NOIO)) { -+ xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n"); -+ return -ENOMEM; -+ } -+ -+ /* Ring fake doorbell for slot_id ep 0 */ -+ xhci_ring_ep_doorbell(xhci, slot_id, 0, 0); -+ usleep_range(1000, 1500); -+ -+ /* Read the status to check if HSE is set or not */ -+ temp = readl(&xhci->op_regs->status); -+ -+ /* Clear HSE if set */ -+ if (temp & STS_FATAL) { -+ xhci_dbg(xhci, "HSE problem detected, status: 0x%08x\n", temp); -+ temp &= ~0x1fff; -+ temp |= STS_FATAL; -+ writel(temp, &xhci->op_regs->status); -+ usleep_range(1000, 1500); -+ readl(&xhci->op_regs->status); -+ } -+ -+ /* Free virt device */ -+ xhci_free_virt_device(xhci, slot_id); -+ -+ /* We're done if controller is already running */ -+ if (readl(&xhci->op_regs->command) & CMD_RUN) -+ return 0; -+ -+ return xhci_start(xhci); -+} -+ - /* - * Reset a halted HC. - * -@@ -568,10 +611,20 @@ int xhci_init(struct usb_hcd *hcd) - - static int xhci_run_finished(struct xhci_hcd *xhci) - { -- if (xhci_start(xhci)) { -- xhci_halt(xhci); -- return -ENODEV; -+ int err; -+ -+ err = xhci_start(xhci); -+ if (err) { -+ err = -ENODEV; -+ goto err_halt; -+ } -+ -+ if (xhci->quirks & XHCI_FAKE_DOORBELL) { -+ err = xhci_fake_doorbell(xhci, 1); -+ if (err) -+ goto err_halt; - } -+ - xhci->shared_hcd->state = HC_STATE_RUNNING; - xhci->cmd_ring_state = CMD_RING_STATE_RUNNING; - -@@ -581,6 +634,10 @@ static int xhci_run_finished(struct xhci - xhci_dbg_trace(xhci, trace_xhci_dbg_init, - "Finished xhci_run for USB3 roothub"); - return 0; -+ -+err_halt: -+ xhci_halt(xhci); -+ return err; - } - - /* ---- a/drivers/usb/host/xhci.h -+++ b/drivers/usb/host/xhci.h -@@ -1635,6 +1635,7 @@ struct xhci_hcd { - #define XHCI_BROKEN_STREAMS (1 << 19) - #define XHCI_PME_STUCK_QUIRK (1 << 20) - #define XHCI_MISSING_CAS (1 << 24) -+#define XHCI_FAKE_DOORBELL (1 << 25) - unsigned int num_active_eps; - unsigned int limit_active_eps; - /* There are two roothubs to keep track of bus suspend info for */ diff --git a/target/linux/bcm53xx/patches-4.4/300-ARM-BCM5301X-Disable-MMU-and-Dcache-during-decompres.patch b/target/linux/bcm53xx/patches-4.4/300-ARM-BCM5301X-Disable-MMU-and-Dcache-during-decompres.patch deleted file mode 100644 index 1c73775b43..0000000000 --- a/target/linux/bcm53xx/patches-4.4/300-ARM-BCM5301X-Disable-MMU-and-Dcache-during-decompres.patch +++ /dev/null @@ -1,101 +0,0 @@ -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Wed, 24 Sep 2014 22:14:07 +0200 -Subject: [PATCH] ARM: BCM5301X: Disable MMU and Dcache during decompression -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Broadcom devices have broken CFE (bootloader) that leaves hardware in an -invalid state. It causes problems with booting Linux. On Northstar -devices kernel was randomly hanging in ~25% of tries during early init. -Hangs used to happen at random places in the start_kernel. On BCM53573 -kernel doesn't even seem to start booting. - -To workaround this problem we need to do following very early: -1) Clear 2 following bits in the SCTLR register: -#define CR_M (1 << 0) /* MMU enable */ -#define CR_C (1 << 2) /* Dcache enable */ -2) Flush the whole D-cache -3) Disable L2 cache - -Unfortunately this patch is not upstreamable as it does above things -unconditionally. We can't check if we are running on Broadcom platform -in any safe way and doing such hacks with ARCH_MULTI_V7 is unacceptable -as it could break other devices support. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> ---- - ---- a/arch/arm/boot/compressed/Makefile -+++ b/arch/arm/boot/compressed/Makefile -@@ -31,6 +31,11 @@ ifeq ($(CONFIG_ARCH_ACORN),y) - OBJS += ll_char_wr.o font.o - endif - -+ifeq ($(CONFIG_ARCH_BCM_5301X),y) -+OBJS += head-bcm_5301x-mpcore.o -+OBJS += cache-v7-min.o -+endif -+ - ifeq ($(CONFIG_ARCH_SA1100),y) - OBJS += head-sa1100.o - endif ---- /dev/null -+++ b/arch/arm/boot/compressed/head-bcm_5301x-mpcore.S -@@ -0,0 +1,37 @@ -+/* -+ * -+ * Platform specific tweaks. This is merged into head.S by the linker. -+ * -+ */ -+ -+#include <linux/linkage.h> -+#include <asm/assembler.h> -+#include <asm/cp15.h> -+ -+ .section ".start", "ax" -+ -+/* -+ * This code section is spliced into the head code by the linker -+ */ -+ -+__plat_uncompress_start: -+ -+ @ Preserve r8/r7 i.e. kernel entry values -+ mov r12, r8 -+ -+ @ Clear MMU enable and Dcache enable bits -+ mrc p15, 0, r0, c1, c0, 0 @ Read SCTLR -+ bic r0, #CR_C|CR_M -+ mcr p15, 0, r0, c1, c0, 0 @ Write SCTLR -+ nop -+ -+ @ Call the cache invalidation routine -+ bl v7_flush_dcache_all -+ nop -+ mov r0,#0 -+ ldr r3, =0x19022000 @ L2 cache controller, control reg -+ str r0, [r3, #0x100] @ Disable L2 cache -+ nop -+ -+ @ Restore -+ mov r8, r12 ---- a/arch/arm/boot/compressed/cache-v7-min.S -+++ b/arch/arm/boot/compressed/cache-v7-min.S -@@ -12,6 +12,7 @@ - - #include <linux/linkage.h> - #include <linux/init.h> -+#include <asm/assembler.h> - - __INIT - -@@ -63,7 +64,7 @@ loop2: - ARM( orr r11, r11, r9, lsl r2 ) @ factor index number into r11 - THUMB( lsl r6, r9, r2 ) - THUMB( orr r11, r11, r6 ) @ factor index number into r11 -- mcr p15, 0, r11, c7, c14, 2 @ clean & invalidate by set/way -+ mcr p15, 0, r11, c7, c6, 2 @ clean & invalidate by set/way - subs r9, r9, #1 @ decrement the index - bge loop2 - subs r4, r4, #1 @ decrement the way diff --git a/target/linux/bcm53xx/patches-4.4/301-ARM-BCM5301X-Add-DT-for-Netgear-R7900.patch b/target/linux/bcm53xx/patches-4.4/301-ARM-BCM5301X-Add-DT-for-Netgear-R7900.patch deleted file mode 100644 index c780e22d6e..0000000000 --- a/target/linux/bcm53xx/patches-4.4/301-ARM-BCM5301X-Add-DT-for-Netgear-R7900.patch +++ /dev/null @@ -1,64 +0,0 @@ -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com> -Subject: [PATCH] ARM: BCM5301X: Add DT for Netgear R7900 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: Rafał Miłecki <zajec5@gmail.com> ---- - ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -81,6 +81,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \ - bcm4709-buffalo-wxr-1900dhp.dtb \ - bcm4709-linksys-ea9200.dtb \ - bcm4709-netgear-r7000.dtb \ -+ bcm4709-netgear-r7900.dtb \ - bcm4709-netgear-r8000.dtb \ - bcm4709-tplink-archer-c9-v1.dtb \ - bcm47094-dlink-dir-885l.dtb \ ---- /dev/null -+++ b/arch/arm/boot/dts/bcm4709-netgear-r7900.dts -@@ -0,0 +1,42 @@ -+/* -+ * Broadcom BCM470X / BCM5301X ARM platform code. -+ * DTS for Netgear R7900 -+ * -+ * Copyright (C) 2016 Rafał Miłecki <zajec5@gmail.com> -+ * -+ * Licensed under the GNU/GPL. See COPYING for details. -+ */ -+ -+/dts-v1/; -+ -+#include "bcm4709.dtsi" -+#include "bcm5301x-nand-cs0-bch8.dtsi" -+ -+/ { -+ compatible = "netgear,r7900", "brcm,bcm4709", "brcm,bcm4708"; -+ model = "Netgear R7900"; -+ -+ chosen { -+ bootargs = "console=ttyS0,115200"; -+ }; -+ -+ memory { -+ reg = <0x00000000 0x08000000 -+ 0x88000000 0x08000000>; -+ }; -+ -+ axi@18000000 { -+ usb3@23000 { -+ reg = <0x00023000 0x1000>; -+ -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ vcc-gpio = <&chipcommon 0 GPIO_ACTIVE_HIGH>; -+ }; -+ }; -+}; -+ -+&uart0 { -+ status = "okay"; -+}; diff --git a/target/linux/bcm53xx/patches-4.4/320-ARM-dts-BCM5301X-Add-serial-to-the-bootargs.patch b/target/linux/bcm53xx/patches-4.4/320-ARM-dts-BCM5301X-Add-serial-to-the-bootargs.patch deleted file mode 100644 index 710d94f6bc..0000000000 --- a/target/linux/bcm53xx/patches-4.4/320-ARM-dts-BCM5301X-Add-serial-to-the-bootargs.patch +++ /dev/null @@ -1,70 +0,0 @@ -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Subject: [PATCH] ARM: dts: BCM5301X: Add serial= to the bootargs -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -It's enough to have proper stdout-path for getting serial working but -for some reason LEDE doesn't offer "Please press Enter to activate this -console." unless ttyS0 is specified. - -This is a workaround to get serial working in LEDE. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> ---- - ---- a/arch/arm/boot/dts/bcm47081-tplink-archer-c5-v2.dts -+++ b/arch/arm/boot/dts/bcm47081-tplink-archer-c5-v2.dts -@@ -13,7 +13,7 @@ - model = "TP-LINK Archer C5 V2"; - - chosen { -- bootargs = "earlycon"; -+ bootargs = "console=ttyS0,115200 earlycon"; - }; - - memory { ---- a/arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts -+++ b/arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts -@@ -14,7 +14,7 @@ - model = "Luxul ABR-4500 V1"; - - chosen { -- bootargs = "earlycon"; -+ bootargs = "console=ttyS0,115200 earlycon"; - }; - - memory { ---- a/arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts -+++ b/arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts -@@ -14,7 +14,7 @@ - model = "Luxul XBR-4500 V1"; - - chosen { -- bootargs = "earlycon"; -+ bootargs = "console=ttyS0,115200 earlycon"; - }; - - memory { ---- a/arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts -+++ b/arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts -@@ -13,7 +13,7 @@ - model = "Luxul XAP-1440 V1"; - - chosen { -- bootargs = "earlycon"; -+ bootargs = "console=ttyS0,115200 earlycon"; - }; - - memory { ---- a/arch/arm/boot/dts/bcm47189-luxul-xap-810.dts -+++ b/arch/arm/boot/dts/bcm47189-luxul-xap-810.dts -@@ -13,7 +13,7 @@ - model = "Luxul XAP-810 V1"; - - chosen { -- bootargs = "earlycon"; -+ bootargs = "console=ttyS0,115200 earlycon"; - }; - - memory { diff --git a/target/linux/bcm53xx/patches-4.4/332-ARM-BCM5301X-Add-power-button-for-Buffalo-WZR-1750DHP.patch b/target/linux/bcm53xx/patches-4.4/332-ARM-BCM5301X-Add-power-button-for-Buffalo-WZR-1750DHP.patch deleted file mode 100644 index 39034997fc..0000000000 --- a/target/linux/bcm53xx/patches-4.4/332-ARM-BCM5301X-Add-power-button-for-Buffalo-WZR-1750DHP.patch +++ /dev/null @@ -1,20 +0,0 @@ -From: Felix Fietkau <nbd@nbd.name> -Subject: [PATCH] ARM: BCM5301X: Add power button for Buffalo WZR-1750DHP - -Signed-off-by: Felix Fietkau <nbd@nbd.name> ---- ---- a/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts -+++ b/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts -@@ -102,6 +102,12 @@ - #address-cells = <1>; - #size-cells = <0>; - -+ power { -+ label = "Power"; -+ linux,code = <KEY_POWER>; -+ gpios = <&chipcommon 1 GPIO_ACTIVE_LOW>; -+ }; -+ - restart { - label = "Reset"; - linux,code = <KEY_RESTART>; diff --git a/target/linux/bcm53xx/patches-4.4/400-mtd-brcmnand-stop-special-treating-ECC-strength-1-as.patch b/target/linux/bcm53xx/patches-4.4/400-mtd-brcmnand-stop-special-treating-ECC-strength-1-as.patch deleted file mode 100644 index 4d855c7fb3..0000000000 --- a/target/linux/bcm53xx/patches-4.4/400-mtd-brcmnand-stop-special-treating-ECC-strength-1-as.patch +++ /dev/null @@ -1,26 +0,0 @@ -From c7af0732a25e5643979d55d304182309cff70ed9 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com> -Date: Mon, 1 Feb 2016 12:44:34 +0100 -Subject: [PATCH] mtd: brcmnand: stop special treating ECC strength 1 (as - Hamming) -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: Rafał Miłecki <zajec5@gmail.com> ---- - drivers/mtd/nand/brcmnand/brcmnand.c | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - ---- a/drivers/mtd/nand/brcmnand/brcmnand.c -+++ b/drivers/mtd/nand/brcmnand/brcmnand.c -@@ -1886,7 +1886,8 @@ static int brcmnand_setup_dev(struct brc - - switch (chip->ecc.size) { - case 512: -- if (chip->ecc.strength == 1) /* Hamming */ -+ /* FIXME: We need to use strength 1 on DIR-885L */ -+ if (0 && chip->ecc.strength == 1) /* Hamming */ - cfg->ecc_level = 15; - else - cfg->ecc_level = chip->ecc.strength; diff --git a/target/linux/bcm53xx/patches-4.4/405-mtd-spi-nor-detect-JEDEC-incompatible-w25q128-using-.patch b/target/linux/bcm53xx/patches-4.4/405-mtd-spi-nor-detect-JEDEC-incompatible-w25q128-using-.patch deleted file mode 100644 index 184d7a2d89..0000000000 --- a/target/linux/bcm53xx/patches-4.4/405-mtd-spi-nor-detect-JEDEC-incompatible-w25q128-using-.patch +++ /dev/null @@ -1,34 +0,0 @@ -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com> -Subject: [PATCH] mtd: spi-nor: detect JEDEC incompatible w25q128 using 0x90 - command -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Some w25q128 chipsets don't support RDID (0x9f) command, they reply with -0xff-s only. To suppose such flashes fallback to the 0x90 command. - -Signed-off-by: Rafał Miłecki <zajec5@gmail.com> ---- - ---- a/drivers/mtd/spi-nor/spi-nor.c -+++ b/drivers/mtd/spi-nor/spi-nor.c -@@ -875,6 +875,18 @@ static const struct flash_info *spi_nor_ - } - dev_err(nor->dev, "unrecognized JEDEC id bytes: %02x, %2x, %2x\n", - id[0], id[1], id[2]); -+ -+ tmp = nor->read_reg(nor, 0x90, id, SPI_NOR_MAX_ID_LEN); -+ if (tmp < 0) { -+ dev_dbg(nor->dev, " error %d reading JEDEC ID\n", tmp); -+ return ERR_PTR(tmp); -+ } -+ dev_info(nor->dev, "using Read Manufacturer / Device ID command (0x%02x) returned %02x %02x\n", -+ 0x90, id[0x03], id[0x04]); -+ if (id[0x03] == 0xef && id[0x04] == 0x17) { -+ return spi_nor_match_id("w25q128"); -+ } -+ - return ERR_PTR(-ENODEV); - } - diff --git a/target/linux/bcm53xx/patches-4.4/500-UBI-Detect-EOF-mark-and-erase-all-remaining-blocks.patch b/target/linux/bcm53xx/patches-4.4/500-UBI-Detect-EOF-mark-and-erase-all-remaining-blocks.patch deleted file mode 100644 index 636e63eb29..0000000000 --- a/target/linux/bcm53xx/patches-4.4/500-UBI-Detect-EOF-mark-and-erase-all-remaining-blocks.patch +++ /dev/null @@ -1,59 +0,0 @@ -From 2a2af518266a29323cf30c3f9ba9ef2ceb1dd84b Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com> -Date: Thu, 16 Oct 2014 20:52:16 +0200 -Subject: [PATCH] UBI: Detect EOF mark and erase all remaining blocks -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: Rafał Miłecki <zajec5@gmail.com> ---- - drivers/mtd/ubi/attach.c | 5 +++++ - drivers/mtd/ubi/io.c | 4 ++++ - drivers/mtd/ubi/ubi.h | 1 + - 3 files changed, 10 insertions(+) - ---- a/drivers/mtd/ubi/attach.c -+++ b/drivers/mtd/ubi/attach.c -@@ -95,6 +95,9 @@ static int self_check_ai(struct ubi_devi - static struct ubi_ec_hdr *ech; - static struct ubi_vid_hdr *vidh; - -+/* Set on finding block with 0xdeadc0de, indicates erasing all blocks behind */ -+bool erase_all_next; -+ - /** - * add_to_list - add physical eraseblock to a list. - * @ai: attaching information -@@ -1425,6 +1428,8 @@ int ubi_attach(struct ubi_device *ubi, i - if (!ai) - return -ENOMEM; - -+ erase_all_next = false; -+ - #ifdef CONFIG_MTD_UBI_FASTMAP - /* On small flash devices we disable fastmap in any case. */ - if ((int)mtd_div_by_eb(ubi->mtd->size, ubi->mtd) <= UBI_FM_MAX_START) { ---- a/drivers/mtd/ubi/io.c -+++ b/drivers/mtd/ubi/io.c -@@ -755,6 +755,10 @@ int ubi_io_read_ec_hdr(struct ubi_device - } - - magic = be32_to_cpu(ec_hdr->magic); -+ if (magic == 0xdeadc0de) -+ erase_all_next = true; -+ if (erase_all_next) -+ return read_err ? UBI_IO_FF_BITFLIPS : UBI_IO_FF; - if (magic != UBI_EC_HDR_MAGIC) { - if (mtd_is_eccerr(read_err)) - return UBI_IO_BAD_HDR_EBADMSG; ---- a/drivers/mtd/ubi/ubi.h -+++ b/drivers/mtd/ubi/ubi.h -@@ -783,6 +783,7 @@ extern struct mutex ubi_devices_mutex; - extern struct blocking_notifier_head ubi_notifiers; - - /* attach.c */ -+extern bool erase_all_next; - int ubi_add_to_av(struct ubi_device *ubi, struct ubi_attach_info *ai, int pnum, - int ec, const struct ubi_vid_hdr *vid_hdr, int bitflips); - struct ubi_ainf_volume *ubi_find_av(const struct ubi_attach_info *ai, diff --git a/target/linux/bcm53xx/patches-4.4/710-b53-add-hacky-CPU-port-fixes-for-devices-not-using-p.patch b/target/linux/bcm53xx/patches-4.4/710-b53-add-hacky-CPU-port-fixes-for-devices-not-using-p.patch deleted file mode 100644 index 91bb4fae11..0000000000 --- a/target/linux/bcm53xx/patches-4.4/710-b53-add-hacky-CPU-port-fixes-for-devices-not-using-p.patch +++ /dev/null @@ -1,52 +0,0 @@ -From 4abdde3ad6bc0b3b157c4bf6ec0bf139d11d07e8 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com> -Date: Wed, 13 May 2015 14:13:28 +0200 -Subject: [PATCH] b53: add hacky CPU port fixes for devices not using port 5 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: Rafał Miłecki <zajec5@gmail.com> ---- - drivers/net/phy/b53/b53_common.c | 6 ++++++ - 1 file changed, 6 insertions(+) - ---- a/drivers/net/phy/b53/b53_common.c -+++ b/drivers/net/phy/b53/b53_common.c -@@ -28,6 +28,7 @@ - #include <linux/of.h> - #include <linux/of_net.h> - #include <linux/platform_data/b53.h> -+#include <linux/of.h> - - #include "b53_regs.h" - #include "b53_priv.h" -@@ -1579,6 +1580,28 @@ static int b53_switch_init(struct b53_de - return ret; - } - -+ /* Set correct CPU port */ -+ if (of_machine_is_compatible("asus,rt-ac87u")) -+ sw_dev->cpu_port = 7; -+ else if (of_machine_is_compatible("netgear,r7900")) -+ sw_dev->cpu_port = 8; -+ else if (of_machine_is_compatible("netgear,r8000")) -+ sw_dev->cpu_port = 8; -+ else if (of_machine_is_compatible("netgear,r8500")) -+ sw_dev->cpu_port = 8; -+ -+ /* Enable extra ports */ -+ if (of_machine_is_compatible("tenda,ac9")) -+ dev->enabled_ports |= BIT(5); -+ -+ /* -+ * Workaround for devices using port 8 (connected to the 3rd iface). -+ * For some reason it doesn't work (no packets on eth2). -+ */ -+ if (of_machine_is_compatible("netgear,r7900") || -+ of_machine_is_compatible("netgear,r8000")) -+ sw_dev->cpu_port = 5; -+ - dev->enabled_ports |= BIT(sw_dev->cpu_port); - sw_dev->ports = fls(dev->enabled_ports); - diff --git a/target/linux/bcm53xx/patches-4.4/901-mtd-bcm47xxpart-add-device-specific-workarounds.patch b/target/linux/bcm53xx/patches-4.4/901-mtd-bcm47xxpart-add-device-specific-workarounds.patch deleted file mode 100644 index 0223ab4776..0000000000 --- a/target/linux/bcm53xx/patches-4.4/901-mtd-bcm47xxpart-add-device-specific-workarounds.patch +++ /dev/null @@ -1,56 +0,0 @@ -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Subject: [PATCH] mtd: bcm47xxpart: add device specific workarounds -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> ---- - ---- a/drivers/mtd/bcm47xxpart.c -+++ b/drivers/mtd/bcm47xxpart.c -@@ -15,6 +15,7 @@ - #include <linux/slab.h> - #include <linux/mtd/mtd.h> - #include <linux/mtd/partitions.h> -+#include <linux/of.h> - - #include <uapi/linux/magic.h> - -@@ -249,6 +250,36 @@ static int bcm47xxpart_parse(struct mtd_ - break; - } - -+ /* -+ * Device specific workarounds (hacks). We should use DT to -+ * define partitions but we need a working TRX firmware splitter -+ * first. -+ */ -+ if (of_machine_is_compatible("asus,rt-ac87u") && offset == 0x7ec0000) { -+ /* -+ * "asus" partition uses JFFS2 which we don't detect and -+ * we don't want to as this could affect other devices. -+ */ -+ bcm47xxpart_add_part(&parts[curr_part++], "asus", offset, MTD_WRITEABLE); -+ continue; -+ } else if (of_machine_is_compatible("tplink,archer-c5-v2") && offset == 0xe40000) { -+ /* -+ * There is a whole set of partitions (not even listed -+ * by original firmware): "default-mac", "pin", -+ * "partition-table", etc. -+ */ -+ bcm47xxpart_add_part(&parts[curr_part++], "tplink", offset, MTD_WRITEABLE); -+ continue; -+ } else if (of_machine_is_compatible("tplink,archer-c9-v1") && offset == 0xe40000) { -+ /* -+ * There is a whole set of partitions (not even listed -+ * by original firmware): "default-mac", "pin", -+ * "partition-table", etc. -+ */ -+ bcm47xxpart_add_part(&parts[curr_part++], "tplink", offset, MTD_WRITEABLE); -+ continue; -+ } -+ - /* Read beginning of the block */ - err = mtd_read(master, offset, BCM47XXPART_BYTES_TO_READ, - &bytes_read, (uint8_t *)buf); diff --git a/target/linux/bcm53xx/patches-4.4/905-BCM53573-minor-hacks.patch b/target/linux/bcm53xx/patches-4.4/905-BCM53573-minor-hacks.patch deleted file mode 100644 index c59048d23f..0000000000 --- a/target/linux/bcm53xx/patches-4.4/905-BCM53573-minor-hacks.patch +++ /dev/null @@ -1,88 +0,0 @@ -From 6f1c62440eb6846cb8045d7a5480ec7bbe47c96f Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Mon, 15 Aug 2016 10:30:41 +0200 -Subject: [PATCH] BCM53573 minor hacks -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> ---- - ---- a/arch/arm/boot/dts/bcm53573.dtsi -+++ b/arch/arm/boot/dts/bcm53573.dtsi -@@ -48,6 +48,15 @@ - }; - }; - -+ timer { -+ compatible = "arm,armv7-timer"; -+ interrupts = <GIC_PPI 13 0>, -+ <GIC_PPI 14 0>, -+ <GIC_PPI 11 0>, -+ <GIC_PPI 10 0>; -+ clocks = <&ilp>; -+ }; -+ - clocks { - #address-cells = <1>; - #size-cells = <1>; ---- a/drivers/bcma/main.c -+++ b/drivers/bcma/main.c -@@ -348,14 +348,6 @@ static int bcma_register_devices(struct - } - #endif - --#ifdef CONFIG_BCMA_SFLASH -- if (bus->drv_cc.sflash.present) { -- err = platform_device_register(&bcma_sflash_dev); -- if (err) -- bcma_err(bus, "Error registering serial flash\n"); -- } --#endif -- - #ifdef CONFIG_BCMA_NFLASH - if (bus->drv_cc.nflash.present) { - err = platform_device_register(&bcma_nflash_dev); -@@ -436,6 +428,14 @@ int bcma_bus_register(struct bcma_bus *b - bcma_register_core(bus, core); - } - -+#ifdef CONFIG_BCMA_SFLASH -+ if (bus->drv_cc.sflash.present) { -+ err = platform_device_register(&bcma_sflash_dev); -+ if (err) -+ bcma_err(bus, "Error registering serial flash\n"); -+ } -+#endif -+ - /* Try to get SPROM */ - err = bcma_sprom_get(bus); - if (err == -ENOENT) { ---- a/drivers/clocksource/arm_arch_timer.c -+++ b/drivers/clocksource/arm_arch_timer.c -@@ -14,6 +14,7 @@ - #include <linux/smp.h> - #include <linux/cpu.h> - #include <linux/cpu_pm.h> -+#include <linux/clk.h> - #include <linux/clockchips.h> - #include <linux/clocksource.h> - #include <linux/interrupt.h> -@@ -376,6 +377,16 @@ arch_timer_detect_rate(void __iomem *cnt - arch_timer_rate = arch_timer_get_cntfrq(); - } - -+ /* Get clk rate through clk driver if present */ -+ if (!arch_timer_rate) { -+ struct clk *clk = of_clk_get(np, 0); -+ -+ if (!IS_ERR(clk)) { -+ if (!clk_prepare_enable(clk)) -+ arch_timer_rate = clk_get_rate(clk); -+ } -+ } -+ - /* Check the timer frequency. */ - if (arch_timer_rate == 0) - pr_warn("Architected timer frequency not available\n"); |