bcm53xx: use backported BCM5301X patches from stblinux soc/next

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>

SVN-Revision: 47807

3 files changed, 109 insertions, 40 deletions

diff --git a/target/linux/bcm53xx/patches-4.4/131-ARM-BCM-Clean-up-SMP-support-for-Broadcom-Kona.patch b/target/linux/bcm53xx/patches-4.4/022-ARM-BCM-Clean-up-SMP-support-for-Broadcom-Kona.patch
index 7a48a13e64..c79cf95fd8 100644
--- a/target/linux/bcm53xx/patches-4.4/131-ARM-BCM-Clean-up-SMP-support-for-Broadcom-Kona.patch
+++ b/target/linux/bcm53xx/patches-4.4/022-ARM-BCM-Clean-up-SMP-support-for-Broadcom-Kona.patch
@@ -1,51 +1,99 @@
-From 8622d6da5d95293d474c156612fd819fdaf542ec Mon Sep 17 00:00:00 2001
+From b5989f783de046577067fe356b1bb76cae07e867 Mon Sep 17 00:00:00 2001
 From: Kapil Hali <kapilh@broadcom.com>
-Date: Wed, 25 Nov 2015 08:58:53 -0500
-Subject: [PATCH 131/134] ARM: BCM: Clean up SMP support for Broadcom Kona
+Date: Sat, 5 Dec 2015 06:53:41 -0500
+Subject: [PATCH] ARM: BCM: Clean up SMP support for Broadcom Kona
 
 These changes cleans up SMP implementaion for Broadcom's
 Kona SoC which are required for handling SMP for iProc
 family of SoCs at a single place for BCM NSP and BCM Kona.
 
 Signed-off-by: Kapil Hali <kapilh@broadcom.com>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
 ---
- arch/arm/boot/dts/bcm11351.dtsi |  2 +-
- arch/arm/boot/dts/bcm21664.dtsi |  2 +-
- arch/arm/mach-bcm/kona_smp.c    | 82 +++++++++++++++++++++++++++--------------
- 3 files changed, 56 insertions(+), 30 deletions(-)
+ .../bindings/arm/bcm/brcm,bcm11351-cpu-method.txt  | 12 ++--
+ arch/arm/boot/dts/bcm11351.dtsi                    |  4 +-
+ arch/arm/boot/dts/bcm21664.dtsi                    |  4 +-
+ arch/arm/mach-bcm/kona_smp.c                       | 82 ++++++++++++++--------
+ 4 files changed, 64 insertions(+), 38 deletions(-)
 
+--- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm11351-cpu-method.txt
++++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm11351-cpu-method.txt
+@@ -1,17 +1,17 @@
+ Broadcom Kona Family CPU Enable Method
+ --------------------------------------
+ This binding defines the enable method used for starting secondary
+-CPUs in the following Broadcom SoCs:
++CPU in the following Broadcom SoCs:
+   BCM11130, BCM11140, BCM11351, BCM28145, BCM28155, BCM21664
+ 
+ The enable method is specified by defining the following required
+-properties in the "cpus" device tree node:
++properties in the corresponding secondary "cpu" device tree node:
+   - enable-method = "brcm,bcm11351-cpu-method";
+   - secondary-boot-reg = <...>;
+ 
+ The secondary-boot-reg property is a u32 value that specifies the
+-physical address of the register used to request the ROM holding pen
+-code release a secondary CPU.  The value written to the register is
++physical address of the register used to request the ROM code
++release a secondary CPU.  The value written to the register is
+ formed by encoding the target CPU id into the low bits of the
+ physical start address it should jump to.
+ 
+@@ -19,8 +19,6 @@ Example:
+ 	cpus {
+ 		#address-cells = <1>;
+ 		#size-cells = <0>;
+-		enable-method = "brcm,bcm11351-cpu-method";
+-		secondary-boot-reg = <0x3500417c>;
+ 
+ 		cpu0: cpu@0 {
+ 			device_type = "cpu";
+@@ -31,6 +29,8 @@ Example:
+ 		cpu1: cpu@1 {
+ 			device_type = "cpu";
+ 			compatible = "arm,cortex-a9";
++			enable-method = "brcm,bcm11351-cpu-method";
++			secondary-boot-reg = <0x3500417c>;
+ 			reg = <1>;
+ 		};
+ 	};
 --- a/arch/arm/boot/dts/bcm11351.dtsi
 +++ b/arch/arm/boot/dts/bcm11351.dtsi
-@@ -31,7 +31,6 @@
+@@ -30,8 +30,6 @@
+ 	cpus {
  		#address-cells = <1>;
  		#size-cells = <0>;
- 		enable-method = "brcm,bcm11351-cpu-method";
+-		enable-method = "brcm,bcm11351-cpu-method";
 -		secondary-boot-reg = <0x3500417c>;
  
  		cpu0: cpu@0 {
  			device_type = "cpu";
-@@ -42,6 +41,7 @@
+@@ -42,6 +40,8 @@
  		cpu1: cpu@1 {
  			device_type = "cpu";
  			compatible = "arm,cortex-a9";
++			enable-method = "brcm,bcm11351-cpu-method";
 +			secondary-boot-reg = <0x3500417c>;
  			reg = <1>;
  		};
  	};
 --- a/arch/arm/boot/dts/bcm21664.dtsi
 +++ b/arch/arm/boot/dts/bcm21664.dtsi
-@@ -31,7 +31,6 @@
+@@ -30,8 +30,6 @@
+        cpus {
  		#address-cells = <1>;
  		#size-cells = <0>;
- 		enable-method = "brcm,bcm11351-cpu-method";
+-		enable-method = "brcm,bcm11351-cpu-method";
 -		secondary-boot-reg = <0x35004178>;
  
  		cpu0: cpu@0 {
  			device_type = "cpu";
-@@ -42,6 +41,7 @@
+@@ -42,6 +40,8 @@
  		cpu1: cpu@1 {
  			device_type = "cpu";
  			compatible = "arm,cortex-a9";
++			enable-method = "brcm,bcm11351-cpu-method";
 +			secondary-boot-reg = <0x35004178>;
  			reg = <1>;
  		};
@@ -169,7 +217,7 @@ Signed-off-by: Kapil Hali <kapilh@broadcom.com>
  {
  	void __iomem *boot_reg;
  	phys_addr_t boot_func;
-@@ -154,15 +179,16 @@ static int bcm_boot_secondary(unsigned i
+@@ -154,15 +179,16 @@ static int bcm_boot_secondary(unsigned int cpu, struct task_struct *idle)
  		return -EINVAL;
  	}
  
@@ -189,7 +237,7 @@ Signed-off-by: Kapil Hali <kapilh@broadcom.com>
  	}
  
  	/*
-@@ -191,12 +217,12 @@ static int bcm_boot_secondary(unsigned i
+@@ -191,12 +217,12 @@ static int bcm_boot_secondary(unsigned int cpu, struct task_struct *idle)
  
  	pr_err("timeout waiting for cpu %u to start\n", cpu_id);
  
diff --git a/target/linux/bcm53xx/patches-4.4/133-ARM-BCM-Add-SMP-support-for-Broadcom-NSP.patch b/target/linux/bcm53xx/patches-4.4/023-ARM-BCM-Add-SMP-support-for-Broadcom-NSP.patch
index 75db188ca2..fb592415e9 100644
--- a/target/linux/bcm53xx/patches-4.4/133-ARM-BCM-Add-SMP-support-for-Broadcom-NSP.patch
+++ b/target/linux/bcm53xx/patches-4.4/023-ARM-BCM-Add-SMP-support-for-Broadcom-NSP.patch
@@ -1,7 +1,7 @@
-From e99fb6d01cddf38cffc11655aba4a96a981d604e Mon Sep 17 00:00:00 2001
+From 55be958cd27439a58c4d9369d6fe2a1f83efdaa6 Mon Sep 17 00:00:00 2001
 From: Kapil Hali <kapilh@broadcom.com>
-Date: Wed, 25 Nov 2015 13:25:55 -0500
-Subject: [PATCH 133/134] ARM: BCM: Add SMP support for Broadcom NSP
+Date: Sat, 5 Dec 2015 06:53:43 -0500
+Subject: [PATCH] ARM: BCM: Add SMP support for Broadcom NSP
 
 Add SMP support for Broadcom's Northstar Plus SoC
 cpu enable method. This changes also consolidates
@@ -14,6 +14,7 @@ Errata 764369 for SMP. This change adds the needed
 configuration option.
 
 Signed-off-by: Kapil Hali <kapilh@broadcom.com>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
 ---
  arch/arm/mach-bcm/Kconfig    |   2 +
  arch/arm/mach-bcm/Makefile   |   8 +-
@@ -23,9 +24,33 @@ Signed-off-by: Kapil Hali <kapilh@broadcom.com>
  delete mode 100644 arch/arm/mach-bcm/kona_smp.c
  create mode 100644 arch/arm/mach-bcm/platsmp.c
 
+--- a/arch/arm/mach-bcm/Kconfig
++++ b/arch/arm/mach-bcm/Kconfig
+@@ -40,6 +40,8 @@ config ARCH_BCM_NSP
+ 	select ARCH_BCM_IPROC
+ 	select ARM_ERRATA_754322
+ 	select ARM_ERRATA_775420
++	select ARM_ERRATA_764369 if SMP
++	select HAVE_SMP
+ 	help
+ 	  Support for Broadcom Northstar Plus SoC.
+ 	  Broadcom Northstar Plus family of SoCs are used for switching control
 --- a/arch/arm/mach-bcm/Makefile
 +++ b/arch/arm/mach-bcm/Makefile
-@@ -23,7 +23,7 @@ obj-$(CONFIG_ARCH_BCM_281XX)	+= board_bc
+@@ -14,7 +14,11 @@
+ obj-$(CONFIG_ARCH_BCM_CYGNUS) +=  bcm_cygnus.o
+ 
+ # Northstar Plus
+-obj-$(CONFIG_ARCH_BCM_NSP) += bcm_nsp.o
++obj-$(CONFIG_ARCH_BCM_NSP)	+= bcm_nsp.o
++
++ifeq ($(CONFIG_ARCH_BCM_NSP),y)
++obj-$(CONFIG_SMP)		+= platsmp.o
++endif
+ 
+ # BCM281XX
+ obj-$(CONFIG_ARCH_BCM_281XX)	+= board_bcm281xx.o
+@@ -23,7 +27,7 @@ obj-$(CONFIG_ARCH_BCM_281XX)	+= board_bcm281xx.o
  obj-$(CONFIG_ARCH_BCM_21664)	+= board_bcm21664.o
  
  # BCM281XX and BCM21664 SMP support
diff --git a/target/linux/bcm53xx/patches-4.4/134-ARM-BCM-Add-SMP-support-for-Broadcom-4708.patch b/target/linux/bcm53xx/patches-4.4/024-ARM-BCM-Add-SMP-support-for-Broadcom-4708.patch
index 3c8aed03b2..e38b0e528f 100644
--- a/target/linux/bcm53xx/patches-4.4/134-ARM-BCM-Add-SMP-support-for-Broadcom-4708.patch
+++ b/target/linux/bcm53xx/patches-4.4/024-ARM-BCM-Add-SMP-support-for-Broadcom-4708.patch
@@ -1,7 +1,7 @@
-From 16e1bf7dde22ee22a331aabf824cc31a6794a4cb Mon Sep 17 00:00:00 2001
+From af0783a87a365e87e5ee0ac0ba7e3075abc5007c Mon Sep 17 00:00:00 2001
 From: Jon Mason <jonmason@broadcom.com>
-Date: Thu, 15 Oct 2015 14:09:10 -0400
-Subject: [PATCH 134/134] ARM: BCM: Add SMP support for Broadcom 4708
+Date: Sat, 5 Dec 2015 06:53:44 -0500
+Subject: [PATCH] ARM: BCM: Add SMP support for Broadcom 4708
 
 Add SMP support for Broadcom's 4708 SoCs.
 
@@ -9,43 +9,39 @@ Signed-off-by: Jon Mason <jonmason@broadcom.com>
 Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
 Tested-by: Hauke Mehrtens <hauke@hauke-m.de>
 Signed-off-by: Kapil Hali <kapilh@broadcom.com>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
 ---
- arch/arm/boot/dts/bcm4708.dtsi | 2 ++
+ arch/arm/boot/dts/bcm4708.dtsi | 3 ++-
  arch/arm/mach-bcm/Kconfig      | 1 +
  arch/arm/mach-bcm/Makefile     | 3 +++
- 3 files changed, 6 insertions(+)
+ 3 files changed, 6 insertions(+), 1 deletion(-)
 
 --- a/arch/arm/boot/dts/bcm4708.dtsi
 +++ b/arch/arm/boot/dts/bcm4708.dtsi
-@@ -15,6 +15,7 @@
- 	cpus {
- 		#address-cells = <1>;
- 		#size-cells = <0>;
-+		enable-method = "brcm,bcm-nsp-smp";
- 
- 		cpu@0 {
- 			device_type = "cpu";
-@@ -27,6 +28,7 @@
+@@ -27,8 +27,9 @@
  			device_type = "cpu";
  			compatible = "arm,cortex-a9";
  			next-level-cache = <&L2>;
++			enable-method = "brcm,bcm-nsp-smp";
 +			secondary-boot-reg = <0xffff0400>;
  			reg = <0x1>;
  		};
  	};
+-
+ };
 --- a/arch/arm/mach-bcm/Kconfig
 +++ b/arch/arm/mach-bcm/Kconfig
-@@ -55,6 +55,7 @@ config ARCH_BCM_5301X
- 	select ARM_ERRATA_754322
- 	select ARM_ERRATA_775420
- 	select ARM_ERRATA_764369 if SMP
+@@ -29,6 +29,7 @@ config ARCH_BCM_IPROC
+ config ARCH_BCM_CYGNUS
+ 	bool "Broadcom Cygnus Support" if ARCH_MULTI_V7
+ 	select ARCH_BCM_IPROC
 +	select HAVE_SMP
- 
  	help
- 	  Support for Broadcom BCM470X and BCM5301X SoCs with ARM CPU cores.
+ 	  Enable support for the Cygnus family,
+ 	  which includes the following variants:
 --- a/arch/arm/mach-bcm/Makefile
 +++ b/arch/arm/mach-bcm/Makefile
-@@ -39,6 +39,9 @@ obj-$(CONFIG_ARCH_BCM2835)	+= board_bcm2
+@@ -43,6 +43,9 @@ obj-$(CONFIG_ARCH_BCM2835)	+= board_bcm2835.o
  
  # BCM5301X
  obj-$(CONFIG_ARCH_BCM_5301X)	+= bcm_5301x.o