diff options
| author | Rafał Miłecki <rafal@milecki.pl> | 2018-07-28 21:35:23 +0200 |
|---|---|---|
| committer | Rafał Miłecki <rafal@milecki.pl> | 2018-07-28 21:36:33 +0200 |
| commit | 5c8b8a3fd4be9702940859c1e1e5c3f1b4f33f50 (patch) | |
| tree | b9d9651d09b1594ddc93f8234388d7d34c253d50 /target/linux/bcm53xx/patches-4.14 | |
| parent | 7a6b2badfa56cfd833d64f113398198f71fd896e (diff) | |
| download | upstream-5c8b8a3fd4be9702940859c1e1e5c3f1b4f33f50.tar.gz upstream-5c8b8a3fd4be9702940859c1e1e5c3f1b4f33f50.tar.bz2 upstream-5c8b8a3fd4be9702940859c1e1e5c3f1b4f33f50.zip | |
bcm53xx: backport DT fix for I2C controller interrupt
Specified interrupt type was incorrect.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Diffstat (limited to 'target/linux/bcm53xx/patches-4.14')
| -rw-r--r-- | target/linux/bcm53xx/patches-4.14/037-v4.18-0008-ARM-dts-BCM5301x-Fix-i2c-controller-interrupt-type.patch | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/target/linux/bcm53xx/patches-4.14/037-v4.18-0008-ARM-dts-BCM5301x-Fix-i2c-controller-interrupt-type.patch b/target/linux/bcm53xx/patches-4.14/037-v4.18-0008-ARM-dts-BCM5301x-Fix-i2c-controller-interrupt-type.patch new file mode 100644 index 0000000000..6f062866cf --- /dev/null +++ b/target/linux/bcm53xx/patches-4.14/037-v4.18-0008-ARM-dts-BCM5301x-Fix-i2c-controller-interrupt-type.patch @@ -0,0 +1,24 @@ +From a0a8338e905734518ab9b10b06e7fd0201228f8b Mon Sep 17 00:00:00 2001 +From: Florian Fainelli <f.fainelli@gmail.com> +Date: Mon, 11 Jun 2018 15:53:40 -0700 +Subject: [PATCH] ARM: dts: BCM5301x: Fix i2c controller interrupt type + +The i2c controller should be using IRQ_TYPE_LEVEL_HIGH, fix that. + +Fixes: bb097e3e0045 ("ARM: dts: BCM5301X: Add I2C support to the DT") +Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> +--- + arch/arm/boot/dts/bcm5301x.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm/boot/dts/bcm5301x.dtsi ++++ b/arch/arm/boot/dts/bcm5301x.dtsi +@@ -365,7 +365,7 @@ + i2c0: i2c@18009000 { + compatible = "brcm,iproc-i2c"; + reg = <0x18009000 0x50>; +- interrupts = <GIC_SPI 121 IRQ_TYPE_NONE>; ++ interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <100000>; |