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author | Rafał Miłecki <rafal@milecki.pl> | 2018-12-27 07:25:40 +0100 |
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committer | Rafał Miłecki <rafal@milecki.pl> | 2018-12-27 07:33:24 +0100 |
commit | 7a7d19abcfc56c5073931e81f481e2e1fdf774c2 (patch) | |
tree | 198c6e997c122fecbe24207db980e9fb7cca937e /target/linux/bcm53xx/patches-4.14/131-ARM-dts-BCM5301X-Describe-Northstar-pins-mux-control.patch | |
parent | a5d6f2eb76a549af9e5e186042ab6bf2371be725 (diff) | |
download | upstream-7a7d19abcfc56c5073931e81f481e2e1fdf774c2.tar.gz upstream-7a7d19abcfc56c5073931e81f481e2e1fdf774c2.tar.bz2 upstream-7a7d19abcfc56c5073931e81f481e2e1fdf774c2.zip |
bcm53xx: backport DTS changes queued for the 4.21
It just replaces some downstream patches & adds relicensing work.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Diffstat (limited to 'target/linux/bcm53xx/patches-4.14/131-ARM-dts-BCM5301X-Describe-Northstar-pins-mux-control.patch')
-rw-r--r-- | target/linux/bcm53xx/patches-4.14/131-ARM-dts-BCM5301X-Describe-Northstar-pins-mux-control.patch | 73 |
1 files changed, 0 insertions, 73 deletions
diff --git a/target/linux/bcm53xx/patches-4.14/131-ARM-dts-BCM5301X-Describe-Northstar-pins-mux-control.patch b/target/linux/bcm53xx/patches-4.14/131-ARM-dts-BCM5301X-Describe-Northstar-pins-mux-control.patch deleted file mode 100644 index 7b2904acbc..0000000000 --- a/target/linux/bcm53xx/patches-4.14/131-ARM-dts-BCM5301X-Describe-Northstar-pins-mux-control.patch +++ /dev/null @@ -1,73 +0,0 @@ -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Fri, 9 Nov 2018 09:53:56 +0100 -Subject: [PATCH] ARM: dts: BCM5301X: Describe Northstar pins mux controller -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This describes hardware & will allow referencing pin functions. The -first usage is UART1 which allows supporting devices using it. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> ---- - ---- a/arch/arm/boot/dts/bcm5301x.dtsi -+++ b/arch/arm/boot/dts/bcm5301x.dtsi -@@ -37,6 +37,8 @@ - reg = <0x0400 0x100>; - interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&iprocslow>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinmux_uart1>; - status = "disabled"; - }; - }; -@@ -391,6 +393,48 @@ - status = "disabled"; - }; - -+ dmu@1800c000 { -+ compatible = "simple-bus"; -+ ranges = <0 0x1800c000 0x1000>; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ cru@100 { -+ compatible = "simple-bus"; -+ reg = <0x100 0x1a4>; -+ ranges; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ pin-controller@1c0 { -+ compatible = "brcm,bcm4708-pinmux"; -+ reg = <0x1c0 0x24>; -+ reg-names = "cru_gpio_control"; -+ -+ spi-pins { -+ groups = "spi_grp"; -+ function = "spi"; -+ }; -+ -+ i2c { -+ groups = "i2c_grp"; -+ function = "i2c"; -+ }; -+ -+ pwm { -+ groups = "pwm0_grp", "pwm1_grp", -+ "pwm2_grp", "pwm3_grp"; -+ function = "pwm"; -+ }; -+ -+ pinmux_uart1: uart1 { -+ groups = "uart1_grp"; -+ function = "uart1"; -+ }; -+ }; -+ }; -+ }; -+ - lcpll0: lcpll0@1800c100 { - #clock-cells = <1>; - compatible = "brcm,nsp-lcpll0"; |