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authorRafał Miłecki <rafal@milecki.pl>2018-07-28 21:46:40 +0200
committerRafał Miłecki <rafal@milecki.pl>2018-07-28 21:48:10 +0200
commita07730472c49c1f7bb56afa3eb8be23e6e87b4f1 (patch)
tree5ca1b196a2c3b84dff14c2988145b90e027b672c /target/linux/bcm53xx/patches-4.14/038-v4.19-0002-ARM-dts-BCM53573-Add-architected-timer.patch
parent8a175ea2198f59795113a3857f6a742a455ad54f (diff)
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bcm53xx: backport BCM5301X/BCM53573 dts commits from 4.19+
This includes Linksys EA9500 support, BCM53573 timer fix and upstream-ready partitions patch that replaces two downstream hacks. Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Diffstat (limited to 'target/linux/bcm53xx/patches-4.14/038-v4.19-0002-ARM-dts-BCM53573-Add-architected-timer.patch')
-rw-r--r--target/linux/bcm53xx/patches-4.14/038-v4.19-0002-ARM-dts-BCM53573-Add-architected-timer.patch34
1 files changed, 34 insertions, 0 deletions
diff --git a/target/linux/bcm53xx/patches-4.14/038-v4.19-0002-ARM-dts-BCM53573-Add-architected-timer.patch b/target/linux/bcm53xx/patches-4.14/038-v4.19-0002-ARM-dts-BCM53573-Add-architected-timer.patch
new file mode 100644
index 0000000000..f1b301ca27
--- /dev/null
+++ b/target/linux/bcm53xx/patches-4.14/038-v4.19-0002-ARM-dts-BCM53573-Add-architected-timer.patch
@@ -0,0 +1,34 @@
+From a21e7548438f3a8f59f9b9f3a8bc973613d3726a Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Thu, 14 Jun 2018 18:41:47 +0200
+Subject: [PATCH] ARM: dts: BCM53573: Add architected timer
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+It's a standard ARM architected timer that was simply missed when
+initially adding this .dtsi file.
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm/boot/dts/bcm53573.dtsi | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+--- a/arch/arm/boot/dts/bcm53573.dtsi
++++ b/arch/arm/boot/dts/bcm53573.dtsi
+@@ -48,6 +48,14 @@
+ };
+ };
+
++ timer {
++ compatible = "arm,armv7-timer";
++ interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
++ <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
++ <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
++ <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
++ };
++
+ clocks {
+ #address-cells = <1>;
+ #size-cells = <1>;