bcm53xx: activate workarounds for erratas

This also deactivates some workaround for erratas only seen in older
CPU cores and L2 cores not used in this SoC.

This partly reverts commit r44947.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>

SVN-Revision: 47686

1 files changed, 31 insertions, 0 deletions

diff --git a/target/linux/bcm53xx/patches-4.1/020-ARM-BCM5310X-activate-erratas-needed-for-SoC.patch b/target/linux/bcm53xx/patches-4.1/020-ARM-BCM5310X-activate-erratas-needed-for-SoC.patch
new file mode 100644
index 0000000000..d1868f3f87
--- /dev/null
+++ b/target/linux/bcm53xx/patches-4.1/020-ARM-BCM5310X-activate-erratas-needed-for-SoC.patch
@@ -0,0 +1,31 @@
+From f4ce7effe2253a325f8ba182903cbdf0d8698593 Mon Sep 17 00:00:00 2001
+From: Hauke Mehrtens <hauke@hauke-m.de>
+Date: Sat, 21 Nov 2015 15:29:47 +0100
+Subject: [PATCH] ARM: BCM5310X: activate erratas needed for SoC
+
+The BCM4708 I have, which is probably the first generation which got
+to the consumer market, is using a ARM Cortex-A9 rev r3p0 and a
+L2C-310 rev r3p2 L2 cache controller. There are 3 workarounds for known
+erratas in the Linux kernel which could be activated and will be in
+this patch. There are currently no workarounds which have to be
+activated for the L2C-310 rev r3p2 in Linux.
+
+Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm/mach-bcm/Kconfig | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/arch/arm/mach-bcm/Kconfig
++++ b/arch/arm/mach-bcm/Kconfig
+@@ -38,6 +38,10 @@ config ARCH_BCM_CYGNUS
+ config ARCH_BCM_5301X
+ 	bool "Broadcom BCM470X / BCM5301X ARM SoC" if ARCH_MULTI_V7
+ 	select ARCH_BCM_IPROC
++	select ARM_ERRATA_754322
++	select ARM_ERRATA_775420
++	select ARM_ERRATA_764369 if SMP
++
+ 	help
+ 	  Support for Broadcom BCM470X and BCM5301X SoCs with ARM CPU cores.
+