bcm4908: use backported switch & PMB DTS patches

Final versions differ slightly from what was used initially.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>

1 files changed, 184 insertions, 0 deletions

diff --git a/target/linux/bcm4908/patches-5.4/031-v5.12-0005-arm64-dts-broadcom-bcm4908-describe-internal-switch.patch b/target/linux/bcm4908/patches-5.4/031-v5.12-0005-arm64-dts-broadcom-bcm4908-describe-internal-switch.patch
new file mode 100644
index 0000000000..c0e27a4e92
--- /dev/null
+++ b/target/linux/bcm4908/patches-5.4/031-v5.12-0005-arm64-dts-broadcom-bcm4908-describe-internal-switch.patch
@@ -0,0 +1,184 @@
+From 961c38974fa5b34d6232d7485120e4392d279ab4 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Wed, 13 Jan 2021 12:14:06 +0100
+Subject: [PATCH] arm64: dts: broadcom: bcm4908: describe internal switch
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+BCM4908 has internal switch with 5 GPHYs. Ports 0 - 3 are always
+connected to the internal PHYs. Remaining ports depend on device setup.
+
+Asus GT-AC5300 has an extra switch with its PHYs accessible using the
+internal MDIO.
+
+CPU port and Ethernet interface remain to be documented.
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ .../bcm4908/bcm4908-asus-gt-ac5300.dts        | 51 +++++++++++
+ .../boot/dts/broadcom/bcm4908/bcm4908.dtsi    | 85 ++++++++++++++++++-
+ 2 files changed, 135 insertions(+), 1 deletion(-)
+
+--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts
++++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts
+@@ -44,6 +44,57 @@
+ 	};
+ };
+ 
++&ports {
++	port@0 {
++		label = "lan2";
++	};
++
++	port@1 {
++		label = "lan1";
++	};
++
++	port@2 {
++		label = "lan6";
++	};
++
++	port@3 {
++		label = "lan5";
++	};
++
++	/* External BCM53134S switch */
++	port@7 {
++		label = "sw";
++		reg = <7>;
++
++		fixed-link {
++			speed = <1000>;
++			full-duplex;
++		};
++	};
++};
++
++&mdio {
++	/* lan8 */
++	phy@0 {
++		reg = <0>;
++	};
++
++	/* lan7 */
++	phy@1 {
++		reg = <1>;
++	};
++
++	/* lan4 */
++	phy@2 {
++		reg = <2>;
++	};
++
++	/* lan3 */
++	phy@3 {
++		reg = <3>;
++	};
++};
++
+ &nandcs {
+ 	nand-ecc-strength = <4>;
+ 	nand-ecc-step-size = <512>;
+--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
++++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
+@@ -108,7 +108,7 @@
+ 		compatible = "simple-bus";
+ 		#address-cells = <1>;
+ 		#size-cells = <1>;
+-		ranges = <0x00 0x00 0x80000000 0x10000>;
++		ranges = <0x00 0x00 0x80000000 0xd0000>;
+ 
+ 		usb@c300 {
+ 			compatible = "generic-ehci";
+@@ -130,6 +130,89 @@
+ 			interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+ 			status = "disabled";
+ 		};
++
++		switch@80000 {
++			compatible = "simple-bus";
++			#size-cells = <1>;
++			#address-cells = <1>;
++			ranges = <0 0x80000 0x50000>;
++
++			switch@0 {
++				compatible = "brcm,bcm4908-switch";
++				reg = <0x0 0x40000>,
++				      <0x40000 0x110>,
++				      <0x40340 0x30>,
++				      <0x40380 0x30>,
++				      <0x40600 0x34>,
++				      <0x40800 0x208>;
++				reg-names = "core", "reg", "intrl2_0",
++					    "intrl2_1", "fcb", "acb";
++				interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
++					     <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
++				brcm,num-gphy = <5>;
++				brcm,num-rgmii-ports = <2>;
++
++				#address-cells = <1>;
++				#size-cells = <0>;
++
++				ports: ports {
++					#address-cells = <1>;
++					#size-cells = <0>;
++
++					port@0 {
++						reg = <0>;
++						phy-mode = "internal";
++						phy-handle = <&phy8>;
++					};
++
++					port@1 {
++						reg = <1>;
++						phy-mode = "internal";
++						phy-handle = <&phy9>;
++					};
++
++					port@2 {
++						reg = <2>;
++						phy-mode = "internal";
++						phy-handle = <&phy10>;
++					};
++
++					port@3 {
++						reg = <3>;
++						phy-mode = "internal";
++						phy-handle = <&phy11>;
++					};
++				};
++			};
++
++			mdio: mdio@405c0 {
++				compatible = "brcm,unimac-mdio";
++				reg = <0x405c0 0x8>;
++				reg-names = "mdio";
++				#size-cells = <1>;
++				#address-cells = <0>;
++
++				phy8: phy@8 {
++					reg = <8>;
++				};
++
++				phy9: phy@9 {
++					reg = <9>;
++				};
++
++				phy10: phy@a {
++					reg = <10>;
++				};
++
++				phy11: phy@b {
++					reg = <11>;
++				};
++
++				phy12: phy@c {
++					reg = <12>;
++				};
++			};
++		};
+ 	};
+ 
+ 	bus@ff800000 {