bcm27xx: import latest patches from the RPi foundation

bcm2708: boot tested on RPi B+ v1.2
bcm2709: boot tested on RPi 3B v1.2 and RPi 4B v1.1 4G
bcm2710: boot tested on RPi 3B v1.2
bcm2711: boot tested on RPi 4B v1.1 4G

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
(cherry-picked from commit f07e572f64)

1 files changed, 286 insertions, 0 deletions

diff --git a/target/linux/bcm27xx/patches-5.4/950-1037-overlays-give-Seeed-Studio-CAN-BUS-FD-HAT-a-v2-postf.patch b/target/linux/bcm27xx/patches-5.4/950-1037-overlays-give-Seeed-Studio-CAN-BUS-FD-HAT-a-v2-postf.patch
new file mode 100644
index 0000000000..185c16c800
--- /dev/null
+++ b/target/linux/bcm27xx/patches-5.4/950-1037-overlays-give-Seeed-Studio-CAN-BUS-FD-HAT-a-v2-postf.patch
@@ -0,0 +1,286 @@
+From 6b458078a50b9332e799e045f91c288a7ff8d8ca Mon Sep 17 00:00:00 2001
+From: Marc Kleine-Budde <mkl@pengutronix.de>
+Date: Sat, 2 Jan 2021 21:08:59 +0100
+Subject: [PATCH] overlays: give Seeed Studio CAN BUS FD HAT a -v2
+ postfix
+
+There are several versions of the Seeed Studio CAN BUS FD HAT. This is the
+second version, based on the mcp2518fd, so give it a -v2 postfix.
+
+Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
+---
+ arch/arm/boot/dts/overlays/Makefile                       | 2 +-
+ arch/arm/boot/dts/overlays/README                         | 8 ++++----
+ ...fd-hat-overlay.dts => seeed-can-fd-hat-v2-overlay.dts} | 0
+ 3 files changed, 5 insertions(+), 5 deletions(-)
+ rename arch/arm/boot/dts/overlays/{seeed-can-fd-hat-overlay.dts => seeed-can-fd-hat-v2-overlay.dts} (100%)
+
+--- a/arch/arm/boot/dts/overlays/Makefile
++++ b/arch/arm/boot/dts/overlays/Makefile
+@@ -159,7 +159,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
+ 	sc16is752-spi1.dtbo \
+ 	sdhost.dtbo \
+ 	sdio.dtbo \
+-	seeed-can-fd-hat.dtbo \
++	seeed-can-fd-hat-v2.dtbo \
+ 	sh1106-spi.dtbo \
+ 	smi.dtbo \
+ 	smi-dev.dtbo \
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -2460,11 +2460,11 @@ Info:   This overlay is now deprecated.
+ Load:   <Deprecated>
+ 
+ 
+-Name:   seeed-can-fd-hat
+-Info:   Overlay for Seeed Studio CAN BUS FD HAT with two CAN FD channels and an
+-        RTC.
++Name:   seeed-can-fd-hat-v2
++Info:   Overlay for Seeed Studio CAN BUS FD HAT with two CAN FD channels
++        (based on the mcp2518fd) and an RTC.
+         https://www.seeedstudio.com/CAN-BUS-FD-HAT-for-Raspberry-Pi-p-4742.html
+-Load:   dtoverlay=seeed-can-fd-hat
++Load:   dtoverlay=seeed-can-fd-hat-v2
+ Params: <None>
+ 
+ 
+--- a/arch/arm/boot/dts/overlays/seeed-can-fd-hat-overlay.dts
++++ /dev/null
+@@ -1,117 +0,0 @@
+-// redo: ovmerge -c mcp251xfd-overlay.dts,spi0-0,interrupt=25 mcp251xfd-overlay.dts,spi0-1,interrupt=24 i2c-rtc-overlay.dts,pcf85063
+-
+-// Device tree overlay for https://www.seeedstudio.com/CAN-BUS-FD-HAT-for-Raspberry-Pi-p-4742.html 
+-
+-/dts-v1/;
+-/plugin/;
+-
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/interrupt-controller/irq.h>
+-#include <dt-bindings/pinctrl/bcm2835.h>
+-
+-/ {
+-	compatible = "brcm,bcm2835";
+-	fragment@0 {
+-		target = <&spidev0>;
+-		__overlay__ {
+-			status = "disabled";
+-		};
+-	};
+-	fragment@1 {
+-		target = <&gpio>;
+-		__overlay__ {
+-			mcp251xfd_pins: mcp251xfd_spi0_0_pins {
+-				brcm,pins = <25>;
+-				brcm,function = <BCM2835_FSEL_GPIO_IN>;
+-			};
+-		};
+-	};
+-	fragment@2 {
+-		target-path = "/clocks";
+-		__overlay__ {
+-			clk_mcp251xfd_osc: mcp251xfd-spi0-0-osc {
+-				#clock-cells = <0>;
+-				compatible = "fixed-clock";
+-				clock-frequency = <40000000>;
+-			};
+-		};
+-	};
+-	fragment@3 {
+-		target = <&spi0>;
+-		__overlay__ {
+-			status = "okay";
+-			#address-cells = <1>;
+-			#size-cells = <0>;
+-			mcp251xfd@0 {
+-				compatible = "microchip,mcp251xfd";
+-				reg = <0>;
+-				pinctrl-names = "default";
+-				pinctrl-0 = <&mcp251xfd_pins>;
+-				spi-max-frequency = <20000000>;
+-				interrupt-parent = <&gpio>;
+-				interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
+-				clocks = <&clk_mcp251xfd_osc>;
+-			};
+-		};
+-	};
+-	fragment@4 {
+-		target = <&spidev1>;
+-		__overlay__ {
+-			status = "disabled";
+-		};
+-	};
+-	fragment@5 {
+-		target = <&gpio>;
+-		__overlay__ {
+-			mcp251xfd_pins_1: mcp251xfd_spi0_1_pins {
+-				brcm,pins = <24>;
+-				brcm,function = <BCM2835_FSEL_GPIO_IN>;
+-			};
+-		};
+-	};
+-	fragment@6 {
+-		target-path = "/clocks";
+-		__overlay__ {
+-			clk_mcp251xfd_osc_1: mcp251xfd-spi0-1-osc {
+-				#clock-cells = <0>;
+-				compatible = "fixed-clock";
+-				clock-frequency = <40000000>;
+-			};
+-		};
+-	};
+-	fragment@7 {
+-		target = <&spi0>;
+-		__overlay__ {
+-			status = "okay";
+-			#address-cells = <1>;
+-			#size-cells = <0>;
+-			mcp251xfd@1 {
+-				compatible = "microchip,mcp251xfd";
+-				reg = <1>;
+-				pinctrl-names = "default";
+-				pinctrl-0 = <&mcp251xfd_pins_1>;
+-				spi-max-frequency = <20000000>;
+-				interrupt-parent = <&gpio>;
+-				interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
+-				clocks = <&clk_mcp251xfd_osc_1>;
+-			};
+-		};
+-	};
+-	fragment@8 {
+-		target = <&i2cbus>;
+-		__overlay__ {
+-			#address-cells = <1>;
+-			#size-cells = <0>;
+-			pcf85063@51 {
+-				compatible = "nxp,pcf85063";
+-				reg = <0x51>;
+-			};
+-		};
+-	};
+-	fragment@9 {
+-		target = <&i2c_arm>;
+-		i2cbus: __overlay__ {
+-			status = "okay";
+-		};
+-	};
+-};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/seeed-can-fd-hat-v2-overlay.dts
+@@ -0,0 +1,117 @@
++// redo: ovmerge -c mcp251xfd-overlay.dts,spi0-0,interrupt=25 mcp251xfd-overlay.dts,spi0-1,interrupt=24 i2c-rtc-overlay.dts,pcf85063
++
++// Device tree overlay for https://www.seeedstudio.com/CAN-BUS-FD-HAT-for-Raspberry-Pi-p-4742.html 
++
++/dts-v1/;
++/plugin/;
++
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/interrupt-controller/irq.h>
++#include <dt-bindings/pinctrl/bcm2835.h>
++
++/ {
++	compatible = "brcm,bcm2835";
++	fragment@0 {
++		target = <&spidev0>;
++		__overlay__ {
++			status = "disabled";
++		};
++	};
++	fragment@1 {
++		target = <&gpio>;
++		__overlay__ {
++			mcp251xfd_pins: mcp251xfd_spi0_0_pins {
++				brcm,pins = <25>;
++				brcm,function = <BCM2835_FSEL_GPIO_IN>;
++			};
++		};
++	};
++	fragment@2 {
++		target-path = "/clocks";
++		__overlay__ {
++			clk_mcp251xfd_osc: mcp251xfd-spi0-0-osc {
++				#clock-cells = <0>;
++				compatible = "fixed-clock";
++				clock-frequency = <40000000>;
++			};
++		};
++	};
++	fragment@3 {
++		target = <&spi0>;
++		__overlay__ {
++			status = "okay";
++			#address-cells = <1>;
++			#size-cells = <0>;
++			mcp251xfd@0 {
++				compatible = "microchip,mcp251xfd";
++				reg = <0>;
++				pinctrl-names = "default";
++				pinctrl-0 = <&mcp251xfd_pins>;
++				spi-max-frequency = <20000000>;
++				interrupt-parent = <&gpio>;
++				interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
++				clocks = <&clk_mcp251xfd_osc>;
++			};
++		};
++	};
++	fragment@4 {
++		target = <&spidev1>;
++		__overlay__ {
++			status = "disabled";
++		};
++	};
++	fragment@5 {
++		target = <&gpio>;
++		__overlay__ {
++			mcp251xfd_pins_1: mcp251xfd_spi0_1_pins {
++				brcm,pins = <24>;
++				brcm,function = <BCM2835_FSEL_GPIO_IN>;
++			};
++		};
++	};
++	fragment@6 {
++		target-path = "/clocks";
++		__overlay__ {
++			clk_mcp251xfd_osc_1: mcp251xfd-spi0-1-osc {
++				#clock-cells = <0>;
++				compatible = "fixed-clock";
++				clock-frequency = <40000000>;
++			};
++		};
++	};
++	fragment@7 {
++		target = <&spi0>;
++		__overlay__ {
++			status = "okay";
++			#address-cells = <1>;
++			#size-cells = <0>;
++			mcp251xfd@1 {
++				compatible = "microchip,mcp251xfd";
++				reg = <1>;
++				pinctrl-names = "default";
++				pinctrl-0 = <&mcp251xfd_pins_1>;
++				spi-max-frequency = <20000000>;
++				interrupt-parent = <&gpio>;
++				interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
++				clocks = <&clk_mcp251xfd_osc_1>;
++			};
++		};
++	};
++	fragment@8 {
++		target = <&i2cbus>;
++		__overlay__ {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			pcf85063@51 {
++				compatible = "nxp,pcf85063";
++				reg = <0x51>;
++			};
++		};
++	};
++	fragment@9 {
++		target = <&i2c_arm>;
++		i2cbus: __overlay__ {
++			status = "okay";
++		};
++	};
++};