bcm27xx: import latest patches from the RPi foundation

bcm2708: boot tested on RPi B+ v1.2
bcm2709: boot tested on RPi 3B v1.2 and RPi 4B v1.1 4G
bcm2710: boot tested on RPi 3B v1.2
bcm2711: boot tested on RPi 4B v1.1 4G

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>

1 files changed, 631 insertions, 0 deletions

diff --git a/target/linux/bcm27xx/patches-5.4/950-0785-ARM-dts-Add-bcm2711-rpi-cm4.dts.patch b/target/linux/bcm27xx/patches-5.4/950-0785-ARM-dts-Add-bcm2711-rpi-cm4.dts.patch
new file mode 100644
index 0000000000..fa6837b4f0
--- /dev/null
+++ b/target/linux/bcm27xx/patches-5.4/950-0785-ARM-dts-Add-bcm2711-rpi-cm4.dts.patch
@@ -0,0 +1,631 @@
+From 104dcc1aff0ae5509ad9875c11e3e0d8c290709d Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.com>
+Date: Tue, 2 Jun 2020 17:19:51 +0100
+Subject: [PATCH] ARM: dts: Add bcm2711-rpi-cm4.dts
+
+Add initial DTS file for Compute Module 4.
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.com>
+---
+ arch/arm/boot/dts/Makefile            |   3 +-
+ arch/arm/boot/dts/bcm2711-rpi-cm4.dts | 586 ++++++++++++++++++++++++++
+ arch/arm/boot/dts/overlays/README     |   6 +
+ 3 files changed, 594 insertions(+), 1 deletion(-)
+ create mode 100644 arch/arm/boot/dts/bcm2711-rpi-cm4.dts
+
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -12,7 +12,8 @@ dtb-$(CONFIG_ARCH_BCM2835) += \
+ 	bcm2710-rpi-3-b.dtb \
+ 	bcm2711-rpi-4-b.dtb \
+ 	bcm2710-rpi-3-b-plus.dtb \
+-	bcm2710-rpi-cm3.dtb
++	bcm2710-rpi-cm3.dtb \
++	bcm2711-rpi-cm4.dtb
+ 
+ dtb-$(CONFIG_ARCH_ALPINE) += \
+ 	alpine-db.dtb
+--- /dev/null
++++ b/arch/arm/boot/dts/bcm2711-rpi-cm4.dts
+@@ -0,0 +1,586 @@
++// SPDX-License-Identifier: GPL-2.0
++/dts-v1/;
++#include "bcm2711.dtsi"
++#include "bcm2835-rpi.dtsi"
++
++/ {
++	compatible = "raspberrypi,4-compute-module", "brcm,bcm2711";
++	model = "Raspberry Pi Compute Module 4";
++
++	chosen {
++		/* 8250 auxiliary UART instead of pl011 */
++		stdout-path = "serial1:115200n8";
++	};
++
++	/* Will be filled by the bootloader */
++	memory@0 {
++		device_type = "memory";
++		reg = <0 0 0>;
++	};
++
++	aliases {
++		ethernet0 = &genet;
++	};
++
++	leds {
++		act {
++			gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
++		};
++
++		pwr {
++			label = "PWR";
++			gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
++		};
++	};
++
++	wifi_pwrseq: wifi-pwrseq {
++		compatible = "mmc-pwrseq-simple";
++		reset-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>;
++	};
++
++	sd_io_1v8_reg: sd_io_1v8_reg {
++		compatible = "regulator-gpio";
++		regulator-name = "vdd-sd-io";
++		regulator-min-microvolt = <1800000>;
++		regulator-max-microvolt = <3300000>;
++		regulator-boot-on;
++		regulator-always-on;
++		regulator-settling-time-us = <5000>;
++		gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>;
++		states = <1800000 0x1
++			  3300000 0x0>;
++		status = "okay";
++	};
++};
++
++&firmware {
++	expgpio: gpio {
++		compatible = "raspberrypi,firmware-gpio";
++		gpio-controller;
++		#gpio-cells = <2>;
++		gpio-line-names = "BT_ON",
++				  "WL_ON",
++				  "PWR_LED_OFF",
++				  "ANT1",
++				  "VDD_SD_IO_SEL",
++				  "CAM_GPIO",
++				  "SD_PWR_ON",
++				  "ANT2";
++		status = "okay";
++
++		ant1: ant1 {
++			gpio-hog;
++			gpios = <3 GPIO_ACTIVE_HIGH>;
++			output-high;
++		};
++
++		ant2: ant2 {
++			gpio-hog;
++			gpios = <7 GPIO_ACTIVE_HIGH>;
++			output-low;
++		};
++	};
++};
++
++&pwm1 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pwm1_0_gpio40 &pwm1_1_gpio41>;
++	status = "okay";
++};
++
++/* SDHCI is used to control the SDIO for wireless */
++&sdhci {
++	#address-cells = <1>;
++	#size-cells = <0>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&emmc_gpio34>;
++	bus-width = <4>;
++	non-removable;
++	mmc-pwrseq = <&wifi_pwrseq>;
++	status = "okay";
++
++	brcmf: wifi@1 {
++		reg = <1>;
++		compatible = "brcm,bcm4329-fmac";
++	};
++};
++
++/* EMMC2 is used to drive the SD card */
++&emmc2 {
++	vqmmc-supply = <&sd_io_1v8_reg>;
++	broken-cd;
++	status = "okay";
++};
++
++&genet {
++	phy-handle = <&phy1>;
++	phy-mode = "rgmii-rxid";
++	status = "okay";
++};
++
++&genet_mdio {
++	phy1: ethernet-phy@1 {
++		/* No PHY interrupt */
++		reg = <0x1>;
++	};
++};
++
++/* uart0 communicates with the BT module */
++&uart0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&uart0_ctsrts_gpio30 &uart0_gpio32>;
++	uart-has-rtscts;
++	status = "okay";
++
++	bluetooth {
++		compatible = "brcm,bcm43438-bt";
++		max-speed = <2000000>;
++		shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>;
++	};
++};
++
++/* uart1 is mapped to the pin header */
++&uart1 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&uart1_gpio14>;
++	status = "okay";
++};
++
++&vchiq {
++	interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
++};
++
++&vc4 {
++	status = "okay";
++};
++
++&pixelvalve0 {
++	status = "okay";
++};
++
++&pixelvalve1 {
++	status = "okay";
++};
++
++&pixelvalve2 {
++	status = "okay";
++};
++
++&pixelvalve3 {
++	status = "okay";
++};
++
++&pixelvalve4 {
++	status = "okay";
++};
++
++&hdmi0 {
++	status = "okay";
++};
++
++&ddc0 {
++	status = "okay";
++};
++
++&hdmi1 {
++	status = "okay";
++};
++
++&ddc1 {
++	status = "okay";
++};
++
++// =============================================
++// Downstream rpi- changes
++
++#include "bcm270x.dtsi"
++
++/ {
++	soc {
++		/delete-node/ pixelvalve@7e807000;
++		/delete-node/ hdmi@7e902000;
++	};
++};
++
++#include "bcm2711-rpi.dtsi"
++#include "bcm283x-rpi-csi1-2lane.dtsi"
++#include "bcm283x-rpi-i2c0mux_0_44.dtsi"
++
++/delete-node/ &emmc2;
++
++/ {
++	chosen {
++		bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1 snd_bcm2835.enable_headphones=1";
++	};
++
++	aliases {
++		serial0 = &uart1;
++		serial1 = &uart0;
++		mmc0 = &emmc2;
++		mmc1 = &mmcnr;
++		mmc2 = &sdhost;
++		/delete-property/ i2c2;
++		i2c3 = &i2c3;
++		i2c4 = &i2c4;
++		i2c5 = &i2c5;
++		i2c6 = &i2c6;
++		/delete-property/ ethernet;
++		/delete-property/ intc;
++		pcie0 = &pcie0;
++		emmc2bus = &emmc2bus;
++	};
++
++	emmc2bus: emmc2bus {
++		compatible = "simple-bus";
++		#address-cells = <2>;
++		#size-cells = <1>;
++
++		ranges = <0x0 0x7e000000  0x0 0xfe000000  0x01800000>;
++		dma-ranges = <0x0 0xc0000000  0x0 0x00000000  0x40000000>;
++
++		emmc2: emmc2@7e340000 {
++			compatible = "brcm,bcm2711-emmc2";
++			status = "okay";
++			interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&clocks BCM2711_CLOCK_EMMC2>;
++			reg = <0x0 0x7e340000 0x100>;
++			vqmmc-supply = <&sd_io_1v8_reg>;
++			broken-cd;
++		};
++	};
++
++	/delete-node/ wifi-pwrseq;
++};
++
++&mmcnr {
++	pinctrl-names = "default";
++	pinctrl-0 = <&sdio_pins>;
++	bus-width = <4>;
++	status = "okay";
++};
++
++&uart0 {
++	pinctrl-0 = <&uart0_pins &bt_pins>;
++	status = "okay";
++
++	/delete-node/ bluetooth;
++};
++
++&uart1 {
++	pinctrl-0 = <&uart1_pins>;
++};
++
++&spi0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
++	cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
++
++	spidev0: spidev@0{
++		compatible = "spidev";
++		reg = <0>;	/* CE0 */
++		#address-cells = <1>;
++		#size-cells = <0>;
++		spi-max-frequency = <125000000>;
++	};
++
++	spidev1: spidev@1{
++		compatible = "spidev";
++		reg = <1>;	/* CE1 */
++		#address-cells = <1>;
++		#size-cells = <0>;
++		spi-max-frequency = <125000000>;
++	};
++};
++
++&gpio {
++	spi0_pins: spi0_pins {
++		brcm,pins = <9 10 11>;
++		brcm,function = <BCM2835_FSEL_ALT0>;
++	};
++
++	spi0_cs_pins: spi0_cs_pins {
++		brcm,pins = <8 7>;
++		brcm,function = <BCM2835_FSEL_GPIO_OUT>;
++	};
++
++	spi3_pins: spi3_pins {
++		brcm,pins = <1 2 3>;
++		brcm,function = <BCM2835_FSEL_ALT3>;
++	};
++
++	spi3_cs_pins: spi3_cs_pins {
++		brcm,pins = <0 24>;
++		brcm,function = <BCM2835_FSEL_GPIO_OUT>;
++	};
++
++	spi4_pins: spi4_pins {
++		brcm,pins = <5 6 7>;
++		brcm,function = <BCM2835_FSEL_ALT3>;
++	};
++
++	spi4_cs_pins: spi4_cs_pins {
++		brcm,pins = <4 25>;
++		brcm,function = <BCM2835_FSEL_GPIO_OUT>;
++	};
++
++	spi5_pins: spi5_pins {
++		brcm,pins = <13 14 15>;
++		brcm,function = <BCM2835_FSEL_ALT3>;
++	};
++
++	spi5_cs_pins: spi5_cs_pins {
++		brcm,pins = <12 26>;
++		brcm,function = <BCM2835_FSEL_GPIO_OUT>;
++	};
++
++	spi6_pins: spi6_pins {
++		brcm,pins = <19 20 21>;
++		brcm,function = <BCM2835_FSEL_ALT3>;
++	};
++
++	spi6_cs_pins: spi6_cs_pins {
++		brcm,pins = <18 27>;
++		brcm,function = <BCM2835_FSEL_GPIO_OUT>;
++	};
++
++	i2c0_pins: i2c0 {
++		brcm,pins = <0 1>;
++		brcm,function = <BCM2835_FSEL_ALT0>;
++		brcm,pull = <BCM2835_PUD_UP>;
++	};
++
++	i2c1_pins: i2c1 {
++		brcm,pins = <2 3>;
++		brcm,function = <BCM2835_FSEL_ALT0>;
++		brcm,pull = <BCM2835_PUD_UP>;
++	};
++
++	i2c3_pins: i2c3 {
++		brcm,pins = <4 5>;
++		brcm,function = <BCM2835_FSEL_ALT5>;
++		brcm,pull = <BCM2835_PUD_UP>;
++	};
++
++	i2c4_pins: i2c4 {
++		brcm,pins = <8 9>;
++		brcm,function = <BCM2835_FSEL_ALT5>;
++		brcm,pull = <BCM2835_PUD_UP>;
++	};
++
++	i2c5_pins: i2c5 {
++		brcm,pins = <12 13>;
++		brcm,function = <BCM2835_FSEL_ALT5>;
++		brcm,pull = <BCM2835_PUD_UP>;
++	};
++
++	i2c6_pins: i2c6 {
++		brcm,pins = <22 23>;
++		brcm,function = <BCM2835_FSEL_ALT5>;
++		brcm,pull = <BCM2835_PUD_UP>;
++	};
++
++	i2s_pins: i2s {
++		brcm,pins = <18 19 20 21>;
++		brcm,function = <BCM2835_FSEL_ALT0>;
++	};
++
++	sdio_pins: sdio_pins {
++		brcm,pins =     <34 35 36 37 38 39>;
++		brcm,function = <BCM2835_FSEL_ALT3>; // alt3 = SD1
++		brcm,pull =     <0 2 2 2 2 2>;
++	};
++
++	bt_pins: bt_pins {
++		brcm,pins = "-"; // non-empty to keep btuart happy, //4 = 0
++				 // to fool pinctrl
++		brcm,function = <0>;
++		brcm,pull = <2>;
++	};
++
++	uart0_pins: uart0_pins {
++		brcm,pins = <32 33>;
++		brcm,function = <BCM2835_FSEL_ALT3>;
++		brcm,pull = <0 2>;
++	};
++
++	uart1_pins: uart1_pins {
++		brcm,pins;
++		brcm,function;
++		brcm,pull;
++	};
++
++	uart2_pins: uart2_pins {
++		brcm,pins = <0 1>;
++		brcm,function = <BCM2835_FSEL_ALT4>;
++		brcm,pull = <0 2>;
++	};
++
++	uart3_pins: uart3_pins {
++		brcm,pins = <4 5>;
++		brcm,function = <BCM2835_FSEL_ALT4>;
++		brcm,pull = <0 2>;
++	};
++
++	uart4_pins: uart4_pins {
++		brcm,pins = <8 9>;
++		brcm,function = <BCM2835_FSEL_ALT4>;
++		brcm,pull = <0 2>;
++	};
++
++	uart5_pins: uart5_pins {
++		brcm,pins = <12 13>;
++		brcm,function = <BCM2835_FSEL_ALT4>;
++		brcm,pull = <0 2>;
++	};
++};
++
++&i2c0if {
++	clock-frequency = <100000>;
++};
++
++&i2c1 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&i2c1_pins>;
++	clock-frequency = <100000>;
++};
++
++&i2s {
++	pinctrl-names = "default";
++	pinctrl-0 = <&i2s_pins>;
++};
++
++/ {
++	__overrides__ {
++		/delete-property/ i2c2_baudrate;
++		/delete-property/ i2c2_iknowwhatimdoing;
++	};
++};
++
++// =============================================
++// Board specific stuff here
++
++/ {
++	sd_vcc_reg: sd_vcc_reg {
++		compatible = "regulator-fixed";
++		regulator-name = "vcc-sd";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		regulator-boot-on;
++		enable-active-high;
++		gpio = <&expgpio 6 GPIO_ACTIVE_HIGH>;
++	};
++};
++
++&sdhost {
++	status = "disabled";
++};
++
++&emmc2 {
++	vmmc-supply = <&sd_vcc_reg>;
++	bus-width = <8>;
++};
++
++&phy1 {
++	led-modes = <0x00 0x08>; /* link/activity link */
++};
++
++&gpio {
++	audio_pins: audio_pins {
++		brcm,pins = <40 41>;
++		brcm,function = <4>;
++	};
++};
++
++&leds {
++	act_led: act {
++		label = "led0";
++		linux,default-trigger = "mmc0";
++		gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
++	};
++
++	pwr_led: pwr {
++		label = "led1";
++		linux,default-trigger = "default-on";
++		gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
++	};
++};
++
++&pwm1 {
++	status = "disabled";
++};
++
++&audio {
++	pinctrl-names = "default";
++	pinctrl-0 = <&audio_pins>;
++};
++
++&vc4 {
++	status = "disabled";
++};
++
++&pixelvalve0 {
++	status = "disabled";
++};
++
++&pixelvalve1 {
++	status = "disabled";
++};
++
++&pixelvalve2 {
++	status = "disabled";
++};
++
++&pixelvalve3 {
++	status = "disabled";
++};
++
++&pixelvalve4 {
++	status = "disabled";
++};
++
++&hdmi0 {
++	status = "disabled";
++};
++
++&ddc0 {
++	status = "disabled";
++};
++
++&hdmi1 {
++	status = "disabled";
++};
++
++&ddc1 {
++	status = "disabled";
++};
++
++/ {
++	__overrides__ {
++		act_led_gpio = <&act_led>,"gpios:4";
++		act_led_activelow = <&act_led>,"gpios:8";
++		act_led_trigger = <&act_led>,"linux,default-trigger";
++
++		pwr_led_gpio = <&pwr_led>,"gpios:4";
++		pwr_led_activelow = <&pwr_led>,"gpios:8";
++		pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
++
++		eth_led0 = <&phy1>,"led-modes:0";
++		eth_led1 = <&phy1>,"led-modes:4";
++
++		ant1 =  <&ant1>,"output-high?=on",
++			<&ant1>, "output-low?=off",
++			<&ant2>, "output-high?=off",
++			<&ant2>, "output-low?=on";
++		ant2 =  <&ant1>,"output-high?=off",
++			<&ant1>, "output-low?=on",
++			<&ant2>, "output-high?=on",
++			<&ant2>, "output-low?=off";
++		noant = <&ant1>,"output-high?=off",
++			<&ant1>, "output-low?=on",
++			<&ant2>, "output-high?=off",
++			<&ant2>, "output-low?=on";
++
++		spi_dma4 = <&spi0>, "dmas:0=", <&dma40>,
++			   <&spi0>, "dmas:8=", <&dma40>;
++	};
++};
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -92,6 +92,12 @@ Name:   <The base DTB>
+ Info:   Configures the base Raspberry Pi hardware
+ Load:   <loaded automatically>
+ Params:
++        ant1                    Select antenna 1 (default). CM4 only.
++
++        ant2                    Select antenna 2. CM4 only.
++
++        noant                   Disable both antennas. CM4 only.
++
+         audio                   Set to "on" to enable the onboard ALSA audio
+                                 interface (default "off")
+