bcm27xx: update to latest patches from RPi foundation

Also removes random module and switches to new bcm2711 thermal driver.
Boot tested on RPi 4B v1.1 4G.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>

1 files changed, 0 insertions, 210 deletions

diff --git a/target/linux/bcm27xx/patches-5.4/950-0599-ARM-dts-bcm2711-Enable-the-display-pipeline.patch b/target/linux/bcm27xx/patches-5.4/950-0599-ARM-dts-bcm2711-Enable-the-display-pipeline.patch
deleted file mode 100644
index aae9b9e00d..0000000000
--- a/target/linux/bcm27xx/patches-5.4/950-0599-ARM-dts-bcm2711-Enable-the-display-pipeline.patch
+++ /dev/null
@@ -1,210 +0,0 @@
-From 661edd663841d94bded4e95acfd0a4947cb079b5 Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime@cerno.tech>
-Date: Wed, 12 Feb 2020 12:26:40 +0100
-Subject: [PATCH] ARM: dts: bcm2711: Enable the display pipeline
-
-Now that all the drivers have been adjusted for it, let's bring in the
-necessary device tree changes.
-
-Signed-off-by: Maxime Ripard <maxime@cerno.tech>
----
- arch/arm/boot/dts/bcm2711-rpi-4-b.dts |  40 ++++++++++
- arch/arm/boot/dts/bcm2711.dtsi        | 110 ++++++++++++++++++++++++++
- 2 files changed, 150 insertions(+)
-
---- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
-+++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
-@@ -138,6 +138,46 @@
- 	interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
- };
- 
-+&vc4 {
-+	status = "okay";
-+};
-+
-+&pixelvalve0 {
-+	status = "okay";
-+};
-+
-+&pixelvalve1 {
-+	status = "okay";
-+};
-+
-+&pixelvalve2 {
-+	status = "okay";
-+};
-+
-+&pixelvalve3 {
-+	status = "okay";
-+};
-+
-+&pixelvalve4 {
-+	status = "okay";
-+};
-+
-+&hdmi0 {
-+	status = "okay";
-+};
-+
-+&ddc0 {
-+	status = "okay";
-+};
-+
-+&hdmi1 {
-+	status = "okay";
-+};
-+
-+&ddc1 {
-+	status = "okay";
-+};
-+
- // =============================================
- // Downstream rpi- changes
- 
---- a/arch/arm/boot/dts/bcm2711.dtsi
-+++ b/arch/arm/boot/dts/bcm2711.dtsi
-@@ -31,6 +31,11 @@
- 		};
- 	};
- 
-+	vc4: gpu {
-+		compatible = "brcm,bcm2711-vc5";
-+		status = "disabled";
-+	};
-+
- 	clk_108MHz: clk-108M {
- 		#clock-cells = <0>;
- 		compatible = "fixed-clock";
-@@ -254,6 +259,27 @@
- 			status = "disabled";
- 		};
- 
-+		pixelvalve0: pixelvalve@7e206000 {
-+			compatible = "brcm,bcm2711-pixelvalve0";
-+			reg = <0x7e206000 0x100>;
-+			interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
-+			status = "disabled";
-+		};
-+
-+		pixelvalve1: pixelvalve@7e207000 {
-+			compatible = "brcm,bcm2711-pixelvalve1";
-+			reg = <0x7e207000 0x100>;
-+			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
-+			status = "disabled";
-+		};
-+
-+		pixelvalve2: pixelvalve@7e20a000 {
-+			compatible = "brcm,bcm2711-pixelvalve2";
-+			reg = <0x7e20a000 0x100>;
-+			interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
-+			status = "disabled";
-+		};
-+
- 		pwm1: pwm@7e20c800 {
- 			compatible = "brcm,bcm2835-pwm";
- 			reg = <0x7e20c800 0x28>;
-@@ -264,6 +290,13 @@
- 			status = "disabled";
- 		};
- 
-+		pixelvalve4: pixelvalve@7e216000 {
-+			compatible = "brcm,bcm2711-pixelvalve4";
-+			reg = <0x7e216000 0x100>;
-+			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
-+			status = "disabled";
-+		};
-+
- 		emmc2: emmc2@7e340000 {
- 			compatible = "brcm,bcm2711-emmc2";
- 			reg = <0x7e340000 0x100>;
-@@ -276,6 +309,13 @@
- 			interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
- 		};
- 
-+		pixelvalve3: pixelvalve@7ec12000 {
-+			compatible = "brcm,bcm2711-pixelvalve3";
-+			reg = <0x7ec12000 0x100>;
-+			interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
-+			status = "disabled";
-+		};
-+
- 		dvp: clock@7ef00000 {
- 			compatible = "brcm,brcm2711-dvp";
- 			reg = <0x7ef00000 0x10>;
-@@ -283,6 +323,76 @@
- 			#clock-cells = <1>;
- 			#reset-cells = <1>;
- 		};
-+
-+		hdmi0: hdmi@7ef00700 {
-+			compatible = "brcm,bcm2711-hdmi0";
-+			reg = <0x7ef00700 0x300>,
-+			      <0x7ef00300 0x200>,
-+			      <0x7ef00f00 0x80>,
-+			      <0x7ef00f80 0x80>,
-+			      <0x7ef01b00 0x200>,
-+			      <0x7ef01f00 0x400>,
-+			      <0x7ef00200 0x80>,
-+			      <0x7ef04300 0x100>,
-+			      <0x7ef20000 0x100>;
-+			reg-names = "hdmi",
-+				    "dvp",
-+				    "phy",
-+				    "rm",
-+				    "packet",
-+				    "metadata",
-+				    "csc",
-+				    "cec",
-+				    "hd";
-+			clocks = <&firmware_clocks 13>;
-+			clock-names = "hdmi";
-+			resets = <&dvp 0>;
-+			ddc = <&ddc0>;
-+			status = "disabled";
-+		};
-+
-+		ddc0: i2c@7ef04500 {
-+			compatible = "brcm,bcm2711-hdmi-i2c";
-+			reg = <0x7ef04500 0x100>, <0x7ef00b00 0x300>;
-+			reg-names = "bsc", "auto-i2c";
-+			clock-frequency = <390000>;
-+			status = "disabled";
-+		};
-+
-+		hdmi1: hdmi@7ef05700 {
-+			compatible = "brcm,bcm2711-hdmi1";
-+			reg = <0x7ef05700 0x300>,
-+			      <0x7ef05300 0x200>,
-+			      <0x7ef05f00 0x80>,
-+			      <0x7ef05f80 0x80>,
-+			      <0x7ef06b00 0x200>,
-+			      <0x7ef06f00 0x400>,
-+			      <0x7ef00280 0x80>,
-+			      <0x7ef09300 0x100>,
-+			      <0x7ef20000 0x100>;
-+			reg-names = "hdmi",
-+				    "dvp",
-+				    "phy",
-+				    "rm",
-+				    "packet",
-+				    "metadata",
-+				    "csc",
-+				    "cec",
-+				    "hd";
-+			ddc = <&ddc1>;
-+			clocks = <&firmware_clocks 13>;
-+			clock-names = "hdmi";
-+			resets = <&dvp 1>;
-+			status = "disabled";
-+		};
-+
-+		ddc1: i2c@7ef09500 {
-+			compatible = "brcm,bcm2711-hdmi-i2c";
-+			reg = <0x7ef09500 0x100>, <0x7ef05b00 0x300>;
-+			reg-names = "bsc", "auto-i2c";
-+			clock-frequency = <390000>;
-+			status = "disabled";
-+		};
- 	};
- 
- 	arm-pmu {