bcm27xx: import latest patches from the RPi foundation

bcm2708: boot tested on RPi B+ v1.2
bcm2709: boot tested on RPi 3B v1.2 and RPi 4B v1.1 4G
bcm2710: boot tested on RPi 3B v1.2
bcm2711: boot tested on RPi 4B v1.1 4G

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
(cherry-picked from commit f07e572f64)

1 files changed, 0 insertions, 104 deletions

diff --git a/target/linux/bcm27xx/patches-5.4/950-0584-drm-vc4-hdmi-Add-PHY-RNG-enable-disable-function.patch b/target/linux/bcm27xx/patches-5.4/950-0584-drm-vc4-hdmi-Add-PHY-RNG-enable-disable-function.patch
deleted file mode 100644
index 0fb6a63bcc..0000000000
--- a/target/linux/bcm27xx/patches-5.4/950-0584-drm-vc4-hdmi-Add-PHY-RNG-enable-disable-function.patch
+++ /dev/null
@@ -1,104 +0,0 @@
-From ddf78df1db8752247e89a68231338a194e5dc52b Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime@cerno.tech>
-Date: Thu, 19 Dec 2019 17:22:24 +0100
-Subject: [PATCH] drm/vc4: hdmi: Add PHY RNG enable / disable function
-
-Let's continue the implementation of hooks for the parts that change in the
-BCM2711 SoC with the PHY RNG setup.
-
-Signed-off-by: Maxime Ripard <maxime@cerno.tech>
----
- drivers/gpu/drm/vc4/vc4_hdmi.c     | 15 +++++++++------
- drivers/gpu/drm/vc4/vc4_hdmi.h     |  8 ++++++++
- drivers/gpu/drm/vc4/vc4_hdmi_phy.c | 15 +++++++++++++++
- 3 files changed, 32 insertions(+), 6 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_hdmi.c
-+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -765,9 +765,9 @@ static int vc4_hdmi_audio_trigger(struct
- 	switch (cmd) {
- 	case SNDRV_PCM_TRIGGER_START:
- 		vc4_hdmi_set_audio_infoframe(encoder);
--		HDMI_WRITE(HDMI_TX_PHY_CTL_0,
--			   HDMI_READ(HDMI_TX_PHY_CTL_0) &
--			   ~VC4_HDMI_TX_PHY_RNG_PWRDN);
-+
-+		if (vc4_hdmi->variant->phy_rng_enable)
-+			vc4_hdmi->variant->phy_rng_enable(vc4_hdmi);
- 
- 		HDMI_WRITE(HDMI_MAI_CTL,
- 			 VC4_SET_FIELD(vc4_hdmi->audio.channels,
-@@ -779,9 +779,10 @@ static int vc4_hdmi_audio_trigger(struct
- 			 VC4_HD_MAI_CTL_DLATE |
- 			 VC4_HD_MAI_CTL_ERRORE |
- 			 VC4_HD_MAI_CTL_ERRORF);
--		HDMI_WRITE(HDMI_TX_PHY_CTL_0,
--			   HDMI_READ(HDMI_TX_PHY_CTL_0) |
--			   VC4_HDMI_TX_PHY_RNG_PWRDN);
-+
-+		if (vc4_hdmi->variant->phy_rng_disable)
-+			vc4_hdmi->variant->phy_rng_disable(vc4_hdmi);
-+
- 		break;
- 	default:
- 		break;
-@@ -1429,6 +1430,8 @@ static const struct vc4_hdmi_variant bcm
- 	.reset			= vc4_hdmi_reset,
- 	.phy_init		= vc4_hdmi_phy_init,
- 	.phy_disable		= vc4_hdmi_phy_disable,
-+	.phy_rng_enable		= vc4_hdmi_phy_rng_enable,
-+	.phy_rng_disable	= vc4_hdmi_phy_rng_disable,
- };
- 
- static const struct of_device_id vc4_hdmi_dt_match[] = {
---- a/drivers/gpu/drm/vc4/vc4_hdmi.h
-+++ b/drivers/gpu/drm/vc4/vc4_hdmi.h
-@@ -47,6 +47,12 @@ struct vc4_hdmi_variant {
- 
- 	/* Callback to disable the PHY */
- 	void (*phy_disable)(struct vc4_hdmi *vc4_hdmi);
-+
-+	/* Callback to enable the RNG in the PHY */
-+	void (*phy_rng_enable)(struct vc4_hdmi *vc4_hdmi);
-+
-+	/* Callback to disable the RNG in the PHY */
-+	void (*phy_rng_disable)(struct vc4_hdmi *vc4_hdmi);
- };
- 
- /* HDMI audio information */
-@@ -107,5 +113,7 @@ encoder_to_vc4_hdmi(struct drm_encoder *
- void vc4_hdmi_phy_init(struct vc4_hdmi *vc4_hdmi,
- 		       struct drm_display_mode *mode);
- void vc4_hdmi_phy_disable(struct vc4_hdmi *vc4_hdmi);
-+void vc4_hdmi_phy_rng_enable(struct vc4_hdmi *vc4_hdmi);
-+void vc4_hdmi_phy_rng_disable(struct vc4_hdmi *vc4_hdmi);
- 
- #endif /* _VC4_HDMI_H_ */
---- a/drivers/gpu/drm/vc4/vc4_hdmi_phy.c
-+++ b/drivers/gpu/drm/vc4/vc4_hdmi_phy.c
-@@ -7,6 +7,7 @@
-  */
- 
- #include "vc4_hdmi.h"
-+#include "vc4_regs.h"
- #include "vc4_hdmi_regs.h"
- 
- void vc4_hdmi_phy_init(struct vc4_hdmi *vc4_hdmi, struct drm_display_mode *mode)
-@@ -23,3 +24,17 @@ void vc4_hdmi_phy_disable(struct vc4_hdm
- {
- 	HDMI_WRITE(HDMI_TX_PHY_RESET_CTL, 0xf << 16);
- }
-+
-+void vc4_hdmi_phy_rng_enable(struct vc4_hdmi *vc4_hdmi)
-+{
-+	HDMI_WRITE(HDMI_TX_PHY_CTL_0,
-+		   HDMI_READ(HDMI_TX_PHY_CTL_0) &
-+		   ~VC4_HDMI_TX_PHY_RNG_PWRDN);
-+}
-+
-+void vc4_hdmi_phy_rng_disable(struct vc4_hdmi *vc4_hdmi)
-+{
-+	HDMI_WRITE(HDMI_TX_PHY_CTL_0,
-+		   HDMI_READ(HDMI_TX_PHY_CTL_0) |
-+		   VC4_HDMI_TX_PHY_RNG_PWRDN);
-+}