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authorÁlvaro Fernández Rojas <noltari@gmail.com>2020-05-27 15:12:04 +0200
committerÁlvaro Fernández Rojas <noltari@gmail.com>2020-05-28 10:36:27 +0200
commit584d4bf1d3c2265a810e1494eb5c8ef0a72ee934 (patch)
tree20b3364aee884d3f65f246c16ee7f8bd4a465ea2 /target/linux/bcm27xx/patches-5.4/950-0549-drm-vc4-plane-Move-planes-creation-to-its-own-functi.patch
parent9e467a764b4e30a04dd0431ea277f6acd26babe0 (diff)
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bcm27xx: update patches from RPi foundation
bcm2708: boot tested on RPi B+ v1.2 bcm2709: boot tested on RPi 3B v1.2 bcm2710: boot tested on RPi 3B v1.2 bcm2711: boot tested on RPi 4B v1.1 4G Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Diffstat (limited to 'target/linux/bcm27xx/patches-5.4/950-0549-drm-vc4-plane-Move-planes-creation-to-its-own-functi.patch')
-rw-r--r--target/linux/bcm27xx/patches-5.4/950-0549-drm-vc4-plane-Move-planes-creation-to-its-own-functi.patch125
1 files changed, 125 insertions, 0 deletions
diff --git a/target/linux/bcm27xx/patches-5.4/950-0549-drm-vc4-plane-Move-planes-creation-to-its-own-functi.patch b/target/linux/bcm27xx/patches-5.4/950-0549-drm-vc4-plane-Move-planes-creation-to-its-own-functi.patch
new file mode 100644
index 0000000000..7c3c470849
--- /dev/null
+++ b/target/linux/bcm27xx/patches-5.4/950-0549-drm-vc4-plane-Move-planes-creation-to-its-own-functi.patch
@@ -0,0 +1,125 @@
+From ac2c812856c3a496354b9f19d0a43458e108844d Mon Sep 17 00:00:00 2001
+From: Maxime Ripard <maxime@cerno.tech>
+Date: Thu, 6 Feb 2020 14:32:57 +0100
+Subject: [PATCH] drm/vc4: plane: Move planes creation to its own
+ function
+
+The planes so far were created as part of the CRTC binding code with
+each planes created associated only to one CRTC. However, the hardware
+in the vc4 doesn't really have such constraint and can be used with any
+CRTC.
+
+In order to rework this, let's first move the overlay and cursor planes
+creation to a function of its own.
+
+Signed-off-by: Maxime Ripard <maxime@cerno.tech>
+---
+ drivers/gpu/drm/vc4/vc4_crtc.c | 33 ++++------------------------
+ drivers/gpu/drm/vc4/vc4_drv.h | 2 ++
+ drivers/gpu/drm/vc4/vc4_plane.c | 38 +++++++++++++++++++++++++++++++++
+ 3 files changed, 44 insertions(+), 29 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_crtc.c
++++ b/drivers/gpu/drm/vc4/vc4_crtc.c
+@@ -1142,7 +1142,7 @@ static int vc4_crtc_bind(struct device *
+ struct drm_device *drm = dev_get_drvdata(master);
+ struct vc4_crtc *vc4_crtc;
+ struct drm_crtc *crtc;
+- struct drm_plane *primary_plane, *cursor_plane, *destroy_plane, *temp;
++ struct drm_plane *primary_plane, *destroy_plane, *temp;
+ const struct of_device_id *match;
+ int ret, i;
+
+@@ -1190,34 +1190,9 @@ static int vc4_crtc_bind(struct device *
+ */
+ drm_crtc_enable_color_mgmt(crtc, 0, true, crtc->gamma_size);
+
+- /* Set up some arbitrary number of planes. We're not limited
+- * by a set number of physical registers, just the space in
+- * the HVS (16k) and how small an plane can be (28 bytes).
+- * However, each plane we set up takes up some memory, and
+- * increases the cost of looping over planes, which atomic
+- * modesetting does quite a bit. As a result, we pick a
+- * modest number of planes to expose, that should hopefully
+- * still cover any sane usecase.
+- */
+- for (i = 0; i < 8; i++) {
+- struct drm_plane *plane =
+- vc4_plane_init(drm, DRM_PLANE_TYPE_OVERLAY);
+-
+- if (IS_ERR(plane))
+- continue;
+-
+- plane->possible_crtcs = drm_crtc_mask(crtc);
+- }
+-
+- /* Set up the legacy cursor after overlay initialization,
+- * since we overlay planes on the CRTC in the order they were
+- * initialized.
+- */
+- cursor_plane = vc4_plane_init(drm, DRM_PLANE_TYPE_CURSOR);
+- if (!IS_ERR(cursor_plane)) {
+- cursor_plane->possible_crtcs = drm_crtc_mask(crtc);
+- crtc->cursor = cursor_plane;
+- }
++ ret = vc4_plane_create_additional_planes(drm, crtc);
++ if (ret)
++ goto err_destroy_planes;
+
+ vc4_crtc_get_cob_allocation(vc4_crtc);
+
+--- a/drivers/gpu/drm/vc4/vc4_drv.h
++++ b/drivers/gpu/drm/vc4/vc4_drv.h
+@@ -855,6 +855,8 @@ int vc4_kms_load(struct drm_device *dev)
+ /* vc4_plane.c */
+ struct drm_plane *vc4_plane_init(struct drm_device *dev,
+ enum drm_plane_type type);
++int vc4_plane_create_additional_planes(struct drm_device *dev,
++ struct drm_crtc *crtc);
+ u32 vc4_plane_write_dlist(struct drm_plane *plane, u32 __iomem *dlist);
+ u32 vc4_plane_dlist_size(const struct drm_plane_state *state);
+ void vc4_plane_async_set_fb(struct drm_plane *plane,
+--- a/drivers/gpu/drm/vc4/vc4_plane.c
++++ b/drivers/gpu/drm/vc4/vc4_plane.c
+@@ -1437,3 +1437,41 @@ struct drm_plane *vc4_plane_init(struct
+
+ return plane;
+ }
++
++int vc4_plane_create_additional_planes(struct drm_device *drm,
++ struct drm_crtc *crtc)
++{
++ struct drm_plane *cursor_plane;
++ unsigned int i;
++
++ /* Set up some arbitrary number of planes. We're not limited
++ * by a set number of physical registers, just the space in
++ * the HVS (16k) and how small an plane can be (28 bytes).
++ * However, each plane we set up takes up some memory, and
++ * increases the cost of looping over planes, which atomic
++ * modesetting does quite a bit. As a result, we pick a
++ * modest number of planes to expose, that should hopefully
++ * still cover any sane usecase.
++ */
++ for (i = 0; i < 8; i++) {
++ struct drm_plane *plane =
++ vc4_plane_init(drm, DRM_PLANE_TYPE_OVERLAY);
++
++ if (IS_ERR(plane))
++ continue;
++
++ plane->possible_crtcs = drm_crtc_mask(crtc);
++ }
++
++ /* Set up the legacy cursor after overlay initialization,
++ * since we overlay planes on the CRTC in the order they were
++ * initialized.
++ */
++ cursor_plane = vc4_plane_init(drm, DRM_PLANE_TYPE_CURSOR);
++ if (!IS_ERR(cursor_plane)) {
++ cursor_plane->possible_crtcs = drm_crtc_mask(crtc);
++ crtc->cursor = cursor_plane;
++ }
++
++ return 0;
++}