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authorÁlvaro Fernández Rojas <noltari@gmail.com>2022-05-16 23:40:32 +0200
committerÁlvaro Fernández Rojas <noltari@gmail.com>2022-05-17 15:11:22 +0200
commit20ea6adbf199097c4f5f591ffee088340630dae4 (patch)
treed6719d95e136611a1c25bbf7789652d6d402779d /target/linux/bcm27xx/patches-5.15/950-0441-drm-vc4-Increase-the-core-clock-based-on-HVS-load.patch
parentbca05bd072180dc38ef740b37ded9572a6db1981 (diff)
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bcm27xx: add support for linux v5.15
Build system: x86_64 Build-tested: bcm2708, bcm2709, bcm2710, bcm2711 Run-tested: bcm2708/RPiB+, bcm2709/RPi3B, bcm2710/RPi3B, bcm2711/RPi4B Signed-off-by: Marty Jones <mj8263788@gmail.com> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Diffstat (limited to 'target/linux/bcm27xx/patches-5.15/950-0441-drm-vc4-Increase-the-core-clock-based-on-HVS-load.patch')
-rw-r--r--target/linux/bcm27xx/patches-5.15/950-0441-drm-vc4-Increase-the-core-clock-based-on-HVS-load.patch57
1 files changed, 57 insertions, 0 deletions
diff --git a/target/linux/bcm27xx/patches-5.15/950-0441-drm-vc4-Increase-the-core-clock-based-on-HVS-load.patch b/target/linux/bcm27xx/patches-5.15/950-0441-drm-vc4-Increase-the-core-clock-based-on-HVS-load.patch
new file mode 100644
index 0000000000..b184172f8d
--- /dev/null
+++ b/target/linux/bcm27xx/patches-5.15/950-0441-drm-vc4-Increase-the-core-clock-based-on-HVS-load.patch
@@ -0,0 +1,57 @@
+From 7971426f2462b02ea1bf12d902ca066e07eeb64b Mon Sep 17 00:00:00 2001
+From: Maxime Ripard <maxime@cerno.tech>
+Date: Wed, 26 May 2021 16:13:02 +0200
+Subject: [PATCH] drm/vc4: Increase the core clock based on HVS load
+
+Depending on a given HVS output (HVS to PixelValves) and input (planes
+attached to a channel) load, the HVS needs for the core clock to be
+raised above its boot time default.
+
+Failing to do so will result in a vblank timeout and a stalled display
+pipeline.
+
+Signed-off-by: Maxime Ripard <maxime@cerno.tech>
+---
+ drivers/gpu/drm/vc4/vc4_drv.h | 1 +
+ drivers/gpu/drm/vc4/vc4_kms.c | 13 +++++++++++++
+ 2 files changed, 14 insertions(+)
+
+--- a/drivers/gpu/drm/vc4/vc4_drv.h
++++ b/drivers/gpu/drm/vc4/vc4_drv.h
+@@ -321,6 +321,7 @@ struct vc4_hvs {
+ u32 __iomem *dlist;
+
+ struct clk *core_clk;
++ struct clk_request *core_req;
+
+ /* Memory manager for CRTCs to allocate space in the display
+ * list. Units are dwords.
+--- a/drivers/gpu/drm/vc4/vc4_kms.c
++++ b/drivers/gpu/drm/vc4/vc4_kms.c
+@@ -391,6 +391,11 @@ static void vc4_atomic_commit_tail(struc
+ new_hvs_state->core_clock_rate);
+
+ core_req = clk_request_start(hvs->core_clk, core_rate);
++ /*
++ * And remove the previous one based on the HVS
++ * requirements if any.
++ */
++ clk_request_done(hvs->core_req);
+ }
+
+ drm_atomic_helper_commit_modeset_disables(dev, state);
+@@ -418,6 +423,14 @@ static void vc4_atomic_commit_tail(struc
+ drm_dbg(dev, "Running the core clock at %lu Hz\n",
+ new_hvs_state->core_clock_rate);
+
++ /*
++ * Request a clock rate based on the current HVS
++ * requirements.
++ */
++ hvs->core_req = clk_request_start(hvs->core_clk,
++ new_hvs_state->core_clock_rate);
++
++ /* And drop the temporary request */
+ clk_request_done(core_req);
+ }
+ }