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author | Álvaro Fernández Rojas <noltari@gmail.com> | 2022-05-16 23:40:32 +0200 |
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committer | Álvaro Fernández Rojas <noltari@gmail.com> | 2022-05-17 15:11:22 +0200 |
commit | 20ea6adbf199097c4f5f591ffee088340630dae4 (patch) | |
tree | d6719d95e136611a1c25bbf7789652d6d402779d /target/linux/bcm27xx/patches-5.15/950-0265-bcm2835-dma-Add-NO_WAIT_RESP-flag.patch | |
parent | bca05bd072180dc38ef740b37ded9572a6db1981 (diff) | |
download | upstream-20ea6adbf199097c4f5f591ffee088340630dae4.tar.gz upstream-20ea6adbf199097c4f5f591ffee088340630dae4.tar.bz2 upstream-20ea6adbf199097c4f5f591ffee088340630dae4.zip |
bcm27xx: add support for linux v5.15
Build system: x86_64
Build-tested: bcm2708, bcm2709, bcm2710, bcm2711
Run-tested: bcm2708/RPiB+, bcm2709/RPi3B, bcm2710/RPi3B, bcm2711/RPi4B
Signed-off-by: Marty Jones <mj8263788@gmail.com>
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Diffstat (limited to 'target/linux/bcm27xx/patches-5.15/950-0265-bcm2835-dma-Add-NO_WAIT_RESP-flag.patch')
-rw-r--r-- | target/linux/bcm27xx/patches-5.15/950-0265-bcm2835-dma-Add-NO_WAIT_RESP-flag.patch | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/target/linux/bcm27xx/patches-5.15/950-0265-bcm2835-dma-Add-NO_WAIT_RESP-flag.patch b/target/linux/bcm27xx/patches-5.15/950-0265-bcm2835-dma-Add-NO_WAIT_RESP-flag.patch new file mode 100644 index 0000000000..8a6551b7ee --- /dev/null +++ b/target/linux/bcm27xx/patches-5.15/950-0265-bcm2835-dma-Add-NO_WAIT_RESP-flag.patch @@ -0,0 +1,54 @@ +From c3cc058594dc78b27132d81378f885e4e4ed51a0 Mon Sep 17 00:00:00 2001 +From: Phil Elwell <phil@raspberrypi.com> +Date: Wed, 1 Jul 2020 20:28:27 +0100 +Subject: [PATCH] bcm2835-dma: Add NO_WAIT_RESP flag + +Use bit 27 of the dreq value (the second cell of the DT DMA descriptor) +to request that the WAIT_RESP bit is not set. + +Signed-off-by: Phil Elwell <phil@raspberrypi.com> +--- + drivers/dma/bcm2835-dma.c | 11 ++++++++--- + 1 file changed, 8 insertions(+), 3 deletions(-) + +--- a/drivers/dma/bcm2835-dma.c ++++ b/drivers/dma/bcm2835-dma.c +@@ -165,6 +165,11 @@ struct bcm2835_desc { + #define BCM2835_DMA_WAIT(x) ((x & 31) << 21) /* add DMA-wait cycles */ + #define BCM2835_DMA_NO_WIDE_BURSTS BIT(26) /* no 2 beat write bursts */ + ++/* A fake bit to request that the driver doesn't set the WAIT_RESP bit. */ ++#define BCM2835_DMA_NO_WAIT_RESP BIT(27) ++#define WAIT_RESP(x) ((x & BCM2835_DMA_NO_WAIT_RESP) ? \ ++ 0 : BCM2835_DMA_WAIT_RESP) ++ + /* debug register bits */ + #define BCM2835_DMA_DEBUG_LAST_NOT_SET_ERR BIT(0) + #define BCM2835_DMA_DEBUG_FIFO_ERR BIT(1) +@@ -843,7 +848,7 @@ static struct dma_async_tx_descriptor *b + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + struct bcm2835_desc *d; + u32 info = BCM2835_DMA_D_INC | BCM2835_DMA_S_INC; +- u32 extra = BCM2835_DMA_INT_EN | BCM2835_DMA_WAIT_RESP; ++ u32 extra = BCM2835_DMA_INT_EN | WAIT_RESP(c->dreq); + size_t max_len = bcm2835_dma_max_frame_length(c); + size_t frames; + +@@ -873,7 +878,7 @@ static struct dma_async_tx_descriptor *b + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + struct bcm2835_desc *d; + dma_addr_t src = 0, dst = 0; +- u32 info = BCM2835_DMA_WAIT_RESP; ++ u32 info = WAIT_RESP(c->dreq); + u32 extra = BCM2835_DMA_INT_EN; + size_t frames; + +@@ -935,7 +940,7 @@ static struct dma_async_tx_descriptor *b + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + struct bcm2835_desc *d; + dma_addr_t src, dst; +- u32 info = BCM2835_DMA_WAIT_RESP; ++ u32 info = WAIT_RESP(c->dreq); + u32 extra = 0; + size_t max_len = bcm2835_dma_max_frame_length(c); + size_t frames; |