bcm27xx: add kernel 5.10 support

Rebased RPi foundation patches on linux 5.10.59, removed applied and reverted
patches, wireless patches and defconfig patches.

bcm2708: boot tested on RPi B+ v1.2
bcm2709: boot tested on RPi 4B v1.1 4G
bcm2711: boot tested on RPi 4B v1.1 4G

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>

1 files changed, 87 insertions, 0 deletions

diff --git a/target/linux/bcm27xx/patches-5.10/950-0685-drm-vc4-hvs-Align-the-HVS-atomic-hooks-to-the-new-AP.patch b/target/linux/bcm27xx/patches-5.10/950-0685-drm-vc4-hvs-Align-the-HVS-atomic-hooks-to-the-new-AP.patch
new file mode 100644
index 0000000000..1caf44cfd0
--- /dev/null
+++ b/target/linux/bcm27xx/patches-5.10/950-0685-drm-vc4-hvs-Align-the-HVS-atomic-hooks-to-the-new-AP.patch
@@ -0,0 +1,87 @@
+From c53200aa7d0670aa21639512880669b94699aaee Mon Sep 17 00:00:00 2001
+From: Maxime Ripard <maxime@cerno.tech>
+Date: Tue, 15 Dec 2020 16:42:35 +0100
+Subject: [PATCH] drm/vc4: hvs: Align the HVS atomic hooks to the new
+ API
+
+Since the CRTC setup in vc4 is split between the PixelValves/TXP and the
+HVS, only the PV/TXP atomic hooks were updated in the previous commits, but
+it makes sense to update the HVS ones too.
+
+Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de>
+Signed-off-by: Maxime Ripard <maxime@cerno.tech>
+Link: https://patchwork.freedesktop.org/patch/msgid/20201215154243.540115-2-maxime@cerno.tech
+---
+ drivers/gpu/drm/vc4/vc4_crtc.c |  2 +-
+ drivers/gpu/drm/vc4/vc4_drv.h  |  5 ++---
+ drivers/gpu/drm/vc4/vc4_hvs.c  | 10 +++++-----
+ drivers/gpu/drm/vc4/vc4_txp.c  |  2 +-
+ 4 files changed, 9 insertions(+), 10 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_crtc.c
++++ b/drivers/gpu/drm/vc4/vc4_crtc.c
+@@ -646,7 +646,7 @@ static int vc4_crtc_atomic_check(struct
+ 	struct drm_connector_state *conn_state;
+ 	int ret, i;
+ 
+-	ret = vc4_hvs_atomic_check(crtc, crtc_state);
++	ret = vc4_hvs_atomic_check(crtc, state);
+ 	if (ret)
+ 		return ret;
+ 
+--- a/drivers/gpu/drm/vc4/vc4_drv.h
++++ b/drivers/gpu/drm/vc4/vc4_drv.h
+@@ -924,11 +924,10 @@ void vc4_irq_reset(struct drm_device *de
+ extern struct platform_driver vc4_hvs_driver;
+ void vc4_hvs_stop_channel(struct drm_device *dev, unsigned int output);
+ int vc4_hvs_get_fifo_from_output(struct drm_device *dev, unsigned int output);
+-int vc4_hvs_atomic_check(struct drm_crtc *crtc, struct drm_crtc_state *state);
++int vc4_hvs_atomic_check(struct drm_crtc *crtc, struct drm_atomic_state *state);
+ void vc4_hvs_atomic_enable(struct drm_crtc *crtc, struct drm_atomic_state *state);
+ void vc4_hvs_atomic_disable(struct drm_crtc *crtc, struct drm_atomic_state *state);
+-void vc4_hvs_atomic_flush(struct drm_crtc *crtc,
+-			  struct drm_atomic_state *state);
++void vc4_hvs_atomic_flush(struct drm_crtc *crtc, struct drm_atomic_state *state);
+ void vc4_hvs_dump_state(struct drm_device *dev);
+ void vc4_hvs_unmask_underrun(struct drm_device *dev, int channel);
+ void vc4_hvs_mask_underrun(struct drm_device *dev, int channel);
+--- a/drivers/gpu/drm/vc4/vc4_hvs.c
++++ b/drivers/gpu/drm/vc4/vc4_hvs.c
+@@ -365,10 +365,10 @@ void vc4_hvs_stop_channel(struct drm_dev
+ 		     SCALER_DISPSTATX_EMPTY);
+ }
+ 
+-int vc4_hvs_atomic_check(struct drm_crtc *crtc,
+-			 struct drm_crtc_state *state)
++int vc4_hvs_atomic_check(struct drm_crtc *crtc, struct drm_atomic_state *state)
+ {
+-	struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(state);
++	struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
++	struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc_state);
+ 	struct drm_device *dev = crtc->dev;
+ 	struct vc4_dev *vc4 = to_vc4_dev(dev);
+ 	struct drm_plane *plane;
+@@ -380,10 +380,10 @@ int vc4_hvs_atomic_check(struct drm_crtc
+ 	/* The pixelvalve can only feed one encoder (and encoders are
+ 	 * 1:1 with connectors.)
+ 	 */
+-	if (hweight32(state->connector_mask) > 1)
++	if (hweight32(crtc_state->connector_mask) > 1)
+ 		return -EINVAL;
+ 
+-	drm_atomic_crtc_state_for_each_plane_state(plane, plane_state, state)
++	drm_atomic_crtc_state_for_each_plane_state(plane, plane_state, crtc_state)
+ 		dlist_count += vc4_plane_dlist_size(plane_state);
+ 
+ 	dlist_count++; /* Account for SCALER_CTL0_END. */
+--- a/drivers/gpu/drm/vc4/vc4_txp.c
++++ b/drivers/gpu/drm/vc4/vc4_txp.c
+@@ -393,7 +393,7 @@ static int vc4_txp_atomic_check(struct d
+ 	struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc_state);
+ 	int ret;
+ 
+-	ret = vc4_hvs_atomic_check(crtc, crtc_state);
++	ret = vc4_hvs_atomic_check(crtc, state);
+ 	if (ret)
+ 		return ret;
+