bcm27xx: add kernel 5.10 support

Rebased RPi foundation patches on linux 5.10.59, removed applied and reverted
patches, wireless patches and defconfig patches.

bcm2708: boot tested on RPi B+ v1.2
bcm2709: boot tested on RPi 4B v1.1 4G
bcm2711: boot tested on RPi 4B v1.1 4G

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>

1 files changed, 79 insertions, 0 deletions

diff --git a/target/linux/bcm27xx/patches-5.10/950-0538-drm-vc4-hdmi-Convert-to-the-new-clock-request-API.patch b/target/linux/bcm27xx/patches-5.10/950-0538-drm-vc4-hdmi-Convert-to-the-new-clock-request-API.patch
new file mode 100644
index 0000000000..227c27f01d
--- /dev/null
+++ b/target/linux/bcm27xx/patches-5.10/950-0538-drm-vc4-hdmi-Convert-to-the-new-clock-request-API.patch
@@ -0,0 +1,79 @@
+From fe77a92b9018f9a2dbab0e2a600e368d55c667b0 Mon Sep 17 00:00:00 2001
+From: Maxime Ripard <maxime@cerno.tech>
+Date: Tue, 13 Apr 2021 11:55:55 +0200
+Subject: [PATCH] drm/vc4: hdmi: Convert to the new clock request API
+
+The new clock request API allows us to increase the rate of the HSM
+clock to match our pixel rate requirements while decreasing it when
+we're done, resulting in a better power-efficiency.
+
+Signed-off-by: Maxime Ripard <maxime@cerno.tech>
+---
+ drivers/gpu/drm/vc4/vc4_hdmi.c | 22 +++++++++++++++-------
+ drivers/gpu/drm/vc4/vc4_hdmi.h |  3 +++
+ 2 files changed, 18 insertions(+), 7 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
++++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
+@@ -545,6 +545,9 @@ static void vc4_hdmi_encoder_post_crtc_p
+ 		   HDMI_READ(HDMI_VID_CTL) & ~VC4_HD_VID_CTL_ENABLE);
+ 
+ 	clk_disable_unprepare(vc4_hdmi->pixel_bvb_clock);
++	clk_request_done(vc4_hdmi->bvb_req);
++	clk_disable_unprepare(vc4_hdmi->hsm_clock);
++	clk_request_done(vc4_hdmi->hsm_req);
+ 	clk_disable_unprepare(vc4_hdmi->pixel_clock);
+ 
+ 	ret = pm_runtime_put(&vc4_hdmi->pdev->dev);
+@@ -849,9 +852,9 @@ static void vc4_hdmi_encoder_pre_crtc_co
+ 	 * pixel clock, but HSM ends up being the limiting factor.
+ 	 */
+ 	hsm_rate = max_t(unsigned long, 120000000, (pixel_rate / 100) * 101);
+-	ret = clk_set_min_rate(vc4_hdmi->hsm_clock, hsm_rate);
+-	if (ret) {
+-		DRM_ERROR("Failed to set HSM clock rate: %d\n", ret);
++	vc4_hdmi->hsm_req = clk_request_start(vc4_hdmi->hsm_clock, hsm_rate);
++	if (IS_ERR(vc4_hdmi->hsm_req)) {
++		DRM_ERROR("Failed to set HSM clock rate: %ld\n", PTR_ERR(vc4_hdmi->hsm_req));
+ 		return;
+ 	}
+ 
+@@ -863,10 +866,12 @@ static void vc4_hdmi_encoder_pre_crtc_co
+ 	 * FIXME: When the pixel freq is 594MHz (4k60), this needs to be setup
+ 	 * at 300MHz.
+ 	 */
+-	ret = clk_set_min_rate(vc4_hdmi->pixel_bvb_clock,
+-			       (hsm_rate > VC4_HSM_MID_CLOCK ? 150000000 : 75000000));
+-	if (ret) {
+-		DRM_ERROR("Failed to set pixel bvb clock rate: %d\n", ret);
++	vc4_hdmi->bvb_req = clk_request_start(vc4_hdmi->pixel_bvb_clock,
++					      (hsm_rate > VC4_HSM_MID_CLOCK ? 150000000 : 75000000));
++	if (IS_ERR(vc4_hdmi->bvb_req)) {
++		DRM_ERROR("Failed to set pixel bvb clock rate: %ld\n", PTR_ERR(vc4_hdmi->bvb_req));
++		clk_request_done(vc4_hdmi->hsm_req);
++		clk_disable_unprepare(vc4_hdmi->hsm_clock);
+ 		clk_disable_unprepare(vc4_hdmi->pixel_clock);
+ 		return;
+ 	}
+@@ -874,6 +879,9 @@ static void vc4_hdmi_encoder_pre_crtc_co
+ 	ret = clk_prepare_enable(vc4_hdmi->pixel_bvb_clock);
+ 	if (ret) {
+ 		DRM_ERROR("Failed to turn on pixel bvb clock: %d\n", ret);
++		clk_request_done(vc4_hdmi->bvb_req);
++		clk_request_done(vc4_hdmi->hsm_req);
++		clk_disable_unprepare(vc4_hdmi->hsm_clock);
+ 		clk_disable_unprepare(vc4_hdmi->pixel_clock);
+ 		return;
+ 	}
+--- a/drivers/gpu/drm/vc4/vc4_hdmi.h
++++ b/drivers/gpu/drm/vc4/vc4_hdmi.h
+@@ -172,6 +172,9 @@ struct vc4_hdmi {
+ 
+ 	struct reset_control *reset;
+ 
++	struct clk_request *bvb_req;
++	struct clk_request *hsm_req;
++
+ 	/* Common debugfs regset */
+ 	struct debugfs_regset32 hdmi_regset;
+ 	struct debugfs_regset32 hd_regset;