kernel: Refresh on 5.10.138

Refresh all patches on top of kernel 5.10.138.

The following patches were applied upstream:
 bcm27xx/patches-5.10/950-0311-drm-vc4-Adopt-the-dma-configuration-from-the-HVS-or-.patch
 bcm27xx/patches-5.10/950-0317-vc4_hdmi-Remove-firmware-logic-for-MAI-threshold-set.patch
 bcm27xx/patches-5.10/950-0346-drm-vc4-A-present-but-empty-dmas-disables-audio.patch
 bcm27xx/patches-5.10/950-0354-drm-vc4-Add-the-2711-HVS-as-a-suitable-DMA-node.patch
 bcm27xx/patches-5.10/950-0413-drm-vc4-hdmi-Don-t-access-the-connector-state-in-res.patch
 bcm27xx/patches-5.10/950-0505-vc4-drm-Avoid-full-hdmi-audio-fifo-writes.patch
 bcm27xx/patches-5.10/950-0512-vc4-drm-vc4_plane-Remove-subpixel-positioning-check.patch
 bcm27xx/patches-5.10/950-0560-drm-vc4-drv-Remove-the-DSI-pointer-in-vc4_drv.patch
 bcm27xx/patches-5.10/950-0561-drm-vc4-dsi-Use-snprintf-for-the-PHY-clocks-instead-.patch
 bcm27xx/patches-5.10/950-0562-drm-vc4-dsi-Introduce-a-variant-structure.patch
 bcm27xx/patches-5.10/950-0565-drm-vc4-Correct-pixel-order-for-DSI0.patch
 bcm27xx/patches-5.10/950-0566-drm-vc4-Register-dsi0-as-the-correct-vc4-encoder-typ.patch
 bcm27xx/patches-5.10/950-0567-drm-vc4-Fix-dsi0-interrupt-support.patch
 bcm27xx/patches-5.10/950-0568-drm-vc4-Add-correct-stop-condition-to-vc4_dsi_encode.patch
 bcm27xx/patches-5.10/950-0647-drm-vc4-Fix-timings-for-interlaced-modes.patch
 bcm27xx/patches-5.10/950-0695-drm-vc4-Fix-margin-calculations-for-the-right-bottom.patch

Upstream sets the pixel clock to 340MHz now, do not set it to 600MHz any more.
 bcm27xx/patches-5.10/950-0576-drm-vc4-hdmi-Raise-the-maximum-clock-rate.patch

Fixes: 89956c653252 ("kernel: bump 5.10 to 5.10.138")
Fixes: 4209c33ae27d ("kernel: bump 5.10 to 5.10.137")
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>

1 files changed, 0 insertions, 47 deletions

diff --git a/target/linux/bcm27xx/patches-5.10/950-0317-vc4_hdmi-Remove-firmware-logic-for-MAI-threshold-set.patch b/target/linux/bcm27xx/patches-5.10/950-0317-vc4_hdmi-Remove-firmware-logic-for-MAI-threshold-set.patch
deleted file mode 100644
index ef776face1..0000000000
--- a/target/linux/bcm27xx/patches-5.10/950-0317-vc4_hdmi-Remove-firmware-logic-for-MAI-threshold-set.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From 3c398513990aa0edc5b9ebfbdd2395623562c6e4 Mon Sep 17 00:00:00 2001
-From: Dom Cobley <popcornmix@gmail.com>
-Date: Thu, 25 Jun 2020 18:48:40 +0100
-Subject: [PATCH] vc4_hdmi: Remove firmware logic for MAI threshold
- setting
-
-This was a workaround for bugs in hardware on earlier Pi models
-and wasn't totally successful.
-
-It makes audio quality worse on a Pi4 at the higher sample rates
-
-Signed-off-by: Dom Cobley <popcornmix@gmail.com>
----
- drivers/gpu/drm/vc4/vc4_hdmi.c | 22 ++++++----------------
- 1 file changed, 6 insertions(+), 16 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_hdmi.c
-+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -1086,22 +1086,12 @@ static int vc4_hdmi_audio_prepare(struct
- 	audio_packet_config |= VC4_SET_FIELD(channel_mask,
- 					     VC4_HDMI_AUDIO_PACKET_CEA_MASK);
- 
--	/* Set the MAI threshold.  This logic mimics the firmware's. */
--	if (vc4_hdmi->audio.samplerate > 96000) {
--		HDMI_WRITE(HDMI_MAI_THR,
--			   VC4_SET_FIELD(0x12, VC4_HD_MAI_THR_DREQHIGH) |
--			   VC4_SET_FIELD(0x12, VC4_HD_MAI_THR_DREQLOW));
--	} else if (vc4_hdmi->audio.samplerate > 48000) {
--		HDMI_WRITE(HDMI_MAI_THR,
--			   VC4_SET_FIELD(0x14, VC4_HD_MAI_THR_DREQHIGH) |
--			   VC4_SET_FIELD(0x12, VC4_HD_MAI_THR_DREQLOW));
--	} else {
--		HDMI_WRITE(HDMI_MAI_THR,
--			   VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_PANICHIGH) |
--			   VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_PANICLOW) |
--			   VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_DREQHIGH) |
--			   VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_DREQLOW));
--	}
-+	/* Set the MAI threshold */
-+	HDMI_WRITE(HDMI_MAI_THR,
-+		   VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_PANICHIGH) |
-+		   VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_PANICLOW) |
-+		   VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_DREQHIGH) |
-+		   VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_DREQLOW));
- 
- 	HDMI_WRITE(HDMI_MAI_CONFIG,
- 		   VC4_HDMI_MAI_CONFIG_BIT_REVERSE |