diff options
author | Álvaro Fernández Rojas <noltari@gmail.com> | 2021-08-21 10:54:34 +0200 |
---|---|---|
committer | Álvaro Fernández Rojas <noltari@gmail.com> | 2021-08-21 19:07:07 +0200 |
commit | 8299d1f057439f94c6a4412e2e5c5082b82a30c9 (patch) | |
tree | 1bf678d61f11f7394493be464c7876e496f7faed /target/linux/bcm27xx/patches-5.10/950-0167-drm-v3d-Don-t-clear-MMU-control-bits-on-exception.patch | |
parent | 33b6885975ce376ff075362b7f0890326043111b (diff) | |
download | upstream-8299d1f057439f94c6a4412e2e5c5082b82a30c9.tar.gz upstream-8299d1f057439f94c6a4412e2e5c5082b82a30c9.tar.bz2 upstream-8299d1f057439f94c6a4412e2e5c5082b82a30c9.zip |
bcm27xx: add kernel 5.10 support
Rebased RPi foundation patches on linux 5.10.59, removed applied and reverted
patches, wireless patches and defconfig patches.
bcm2708: boot tested on RPi B+ v1.2
bcm2709: boot tested on RPi 4B v1.1 4G
bcm2711: boot tested on RPi 4B v1.1 4G
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Diffstat (limited to 'target/linux/bcm27xx/patches-5.10/950-0167-drm-v3d-Don-t-clear-MMU-control-bits-on-exception.patch')
-rw-r--r-- | target/linux/bcm27xx/patches-5.10/950-0167-drm-v3d-Don-t-clear-MMU-control-bits-on-exception.patch | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/target/linux/bcm27xx/patches-5.10/950-0167-drm-v3d-Don-t-clear-MMU-control-bits-on-exception.patch b/target/linux/bcm27xx/patches-5.10/950-0167-drm-v3d-Don-t-clear-MMU-control-bits-on-exception.patch new file mode 100644 index 0000000000..19bb22080f --- /dev/null +++ b/target/linux/bcm27xx/patches-5.10/950-0167-drm-v3d-Don-t-clear-MMU-control-bits-on-exception.patch @@ -0,0 +1,34 @@ +From 7372f1f8c151f752aa533eaf2b85ad9b21ec9639 Mon Sep 17 00:00:00 2001 +From: Phil Elwell <phil@raspberrypi.org> +Date: Mon, 11 Nov 2019 14:01:41 +0000 +Subject: [PATCH] drm/v3d: Don't clear MMU control bits on exception + +MMU exception conditions are reported in the V3D_MMU_CTRL register as +write-1-to-clear (W1C) bits. The MMU interrupt handling code clears any +exceptions, but does so by masking out any other bits and writing the +result back. There are some important control bits in that register, +including MMU_ENABLE, so a safer approach is to simply write back the +value just read unaltered. + +This patch doesn't remove the cause of the apparent PTE errors, but it +does reduce the impact to just an error in the kernel log. + +Signed-off-by: Phil Elwell <phil@raspberrypi.org> +--- + drivers/gpu/drm/v3d/v3d_irq.c | 5 +---- + 1 file changed, 1 insertion(+), 4 deletions(-) + +--- a/drivers/gpu/drm/v3d/v3d_irq.c ++++ b/drivers/gpu/drm/v3d/v3d_irq.c +@@ -178,10 +178,7 @@ v3d_hub_irq(int irq, void *arg) + }; + const char *client = "?"; + +- V3D_WRITE(V3D_MMU_CTL, +- V3D_READ(V3D_MMU_CTL) & (V3D_MMU_CTL_CAP_EXCEEDED | +- V3D_MMU_CTL_PT_INVALID | +- V3D_MMU_CTL_WRITE_VIOLATION)); ++ V3D_WRITE(V3D_MMU_CTL, V3D_READ(V3D_MMU_CTL)); + + if (v3d->ver >= 41) { + axi_id = axi_id >> 5; |