brcm2708: rename target to bcm27xx

This change makes the names of Broadcom targets consistent by using
the common notation based on SoC/CPU ID (which is used internally
anyway), bcmXXXX instead of brcmXXXX.
This is even used for target TITLE in make menuconfig already,
only the short target name used brcm so far.

Despite, since subtargets range from bcm2708 to bcm2711, it seems
appropriate to use bcm27xx instead of bcm2708 (again, as already done
for BOARDNAME).

This also renames the packages brcm2708-userland and brcm2708-gpu-fw.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Acked-by: Álvaro Fernández Rojas <noltari@gmail.com>

1 files changed, 29 insertions, 0 deletions

diff --git a/target/linux/bcm27xx/patches-4.19/950-0768-fixup-clk-raspberrypi-Also-support-v3d-clock.patch b/target/linux/bcm27xx/patches-4.19/950-0768-fixup-clk-raspberrypi-Also-support-v3d-clock.patch
new file mode 100644
index 0000000000..64efff7754
--- /dev/null
+++ b/target/linux/bcm27xx/patches-4.19/950-0768-fixup-clk-raspberrypi-Also-support-v3d-clock.patch
@@ -0,0 +1,29 @@
+From c4374e446b6957234432d5c3f5d5f89f1acb807d Mon Sep 17 00:00:00 2001
+From: popcornmix <popcornmix@gmail.com>
+Date: Thu, 7 Nov 2019 12:25:27 +0000
+Subject: [PATCH] fixup! clk-raspberrypi: Also support v3d clock
+
+---
+ drivers/clk/bcm/clk-raspberrypi.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/clk/bcm/clk-raspberrypi.c
++++ b/drivers/clk/bcm/clk-raspberrypi.c
+@@ -474,7 +474,7 @@ raspberrypi_register_pll_divider(struct
+ 	 * PLLH's channels have a fixed divide by 10 afterwards, which
+ 	 * is what our consumers are actually using.
+ 	 */
+-	if (data->fixed_divider != 1) {
++	if (data->fixed_divider != 0) {
+ 		struct clk_lookup *lookup;
+ 		struct clk_hw *clk = clk_hw_register_fixed_factor(rpi->dev,
+ 						    data->divider_name,
+@@ -559,7 +559,7 @@ static const struct raspberrypi_clk_desc
+ 		.source_pll = "osc",
+ 		.divider_name = "pllb_arm",
+ 		.lookup = "cpu0",
+-		.fixed_divider = 2,
++		.fixed_divider = 1,
+ 		.clock_id = RPI_FIRMWARE_ARM_CLK_ID,
+ 		.flags = CLK_SET_RATE_PARENT),
+ };